TPS24771RGET

Sample & Buy Product Folder Support & Community Tools & Software Technical Documents TPS24772 TPS24771 TPS24770 SLVSCZ3 – MARCH 2015 TPS2477x 2.5 to 18-V High Performance Hot Swap 1 Features 3 Description • • The TPS2477x is a high performance analog Hot Swap Controller for 2.5 V to 18 V systems. The precise and highly programmable protection settings of the TPS2477x aid the design of high power high availability systems where isolating faults is critical. 1 • • • • • • • • 2.5V to 18V Bus Operation (30V abs max) Programmable Protection Settings: – Current Limit: ±5% at 10mV – Fast Trip: ±10% at 20mV Programmable FET SOA Protection Programable Response Time for Fast Trip Dual Timer (Inrush/Fault) Analog Current Monitor (1% at 25mV) Programmable UV and OV Status Flags for Faults and Power Good 4mm × 4mm 24-pin QFN 70 = Latch, 71 = Retry, 72 = Fast Latch Off Programmable current limit, fast shut down, and fault timer protect the load and supply during fault conditions such as a hot - short. The fast shutdown threshold and response time can be tuned to ensure a fast response to real faults, while avoiding nuisance trips. Programmable Safe Operating Area (SOA) protection and the inrush timer keep the MOSFET safe under all conditions. After asserting power good, TPS2477x acts as a circuit breaker and runs the fault timer during over current events, but doesn’t current limit. It shuts down after the fault timer expires. Two independent timers (inrush/fault) allow the user to customize protection based on system requirements. 2 Applications • • • • Enterprise Storage Enterprise Server Networking Cards 240 VA Applications Finally, the flexibility of the TPS2477x aid Hot Swap design for the 240 VA requirement and a design example is shown in the datasheet. Device Information(1) PART NUMBER TPS24770 TPS24771 TPS24772 PACKAGE BODY SIZE (NOM) RGE (24) 4.00 mm x 4.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 4 Simplified Schematic HS FET C1 0.1 F RFSTP RSET RSNS VOUT CFST VDD SET FSTP COUT RHG SENM 300 FLTb TPS2477x IMONBUF OV IMON RIMON RPLIM PLIM GND TINR CINR TFLT CFLT VA Limiting with TPS2477x Regular 20 A ILIM 280 HGATE OUTH PGHS ENHS Limiting Output Power to 240VA, 20 A ILIM vs TPS2477x Implementation Output Power Limit (W) VIN 260 240 220 200 180 10 11 12 Output Voltage (V) 13 14 C022 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TPS24772 TPS24771 TPS24770 SLVSCZ3 – MARCH 2015 www.ti.com Table of Contents 1 2 3 4 5 6 7 8 9 Features .................................................................. Applications ........................................................... Description ............................................................. Simplified Schematic............................................. Revision History..................................................... Device Comparison Table..................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 1 2 3 3 4 8.1 8.2 8.3 8.4 8.5 8.6 8.7 4 4 5 5 5 7 8 Absolute Maximum Ratings ...................................... ESD Ratings ............................................................ Recommended Operating Conditions....................... Thermal Information ................................................. Electrical Characteristics........................................... Timing Requirements ............................................... Typical Characteristics .............................................. 9.2 Functional Block Diagram ....................................... 10 9.3 Feature Description................................................. 11 9.4 Device Functional Modes........................................ 16 10 Application and Implementation........................ 17 10.1 Application Information.......................................... 17 10.2 Typical Application ............................................... 17 11 Power Supply Recommendations ..................... 40 12 Layout................................................................... 40 12.1 Layout Guidelines ................................................. 40 12.2 Layout Example .................................................... 42 13 Device and Documentation Support ................. 43 13.1 13.2 13.3 13.4 Related Links ........................................................ Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 43 43 43 43 14 Mechanical, Packaging, and Orderable Information ........................................................... 43 Detailed Description ............................................ 10 9.1 Overview ................................................................. 10 5 Revision History 2 DATE REVISION NOTES March 2015 * Initial release. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS24772 TPS24771 TPS24770 TPS24772 TPS24771 TPS24770 www.ti.com SLVSCZ3 – MARCH 2015 6 Device Comparison Table PART NUMBER (1) (1) LATCH / RETRY OPTION TPS24770 Latch TPS24771 Auto – Retry TPS24772 Fast Latch Off For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. 7 Pin Configuration and Functions 19 FSTP 4 SET 5 VDD NC 3 SENM ENHS 2 18 OUTH 20 17 NC 21 16 NC 22 15 NC 23 14 NC 24 HGATE 1 NC NC QFN 24-Pin with Thermal Pad RGE Package Top View 9 10 11 12 PLIM IMON 8 GND 7 OV 6 NC TFLT PGHS TINR FLTb 13 TPS2477x IMONBUF Pin Functions TYPE (1) PIN DESCRIPTION NAME NO. ENHS 2 I Active-high enable input of Hot Swap. Logic input. Connects to resistor divider. FLTb 4 O Active-low, open-drain output indicating various faults. FSTP 16 I Fast trip programming set pin for Hot Swap. A resistor is connected from positive terminal of RSNS to FSTP. GND 10 – Ground. HGATE 18 O Gate driver output for external Hot Swap MOSFET. IMON 12 I/O Analog monitor and current limit program point. Connect RIMON to ground. IMONBUF 13 O Voltage output proportional to the load current (0V–3.0V). 1,3, 6, 20–24 NC NC (1) No connect. Tie to ground or leave floating. I = Input; O = Output ; P = Power, NC = No Connect Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS24772 TPS24771 TPS24770 Submit Documentation Feedback 3 TPS24772 TPS24771 TPS24770 SLVSCZ3 – MARCH 2015 www.ti.com Pin Functions (continued) PIN TYPE (1) DESCRIPTION NAME NO. OUTH 19 I Output voltage sensor for monitoring Hot Swap MOSFET's power. Connects to the source terminal of the Hot Swap N channel MOSFET. OV 9 I Overvoltage comparator input. Connects to resistor divider. HGATE is pulled low when OV exceeds the threshold. Connect to ground when not used. PGHS 5 O Active-high, open-drain power-good indicator. PLIM 11 I Power limit programming pin. A resistor from this pin to GND sets the maximum power dissipation for the Hot Swap FET. Connect a 4.99 kΩ resistor to disable power limit. SENM 17 I Current-sensing input for the sense resistor. Directly connects to the negative terminal of the sense resistor. SET 15 I Current-limit programming set pin for Hot Swap. A resistor is connected from positive terminal of the sensing resistor. TFLT 8 I/O Fault timer, which runs when the device is in regular operation and there is an overcurrent condition. TINR 7 I/O Inrush timer, which runs during the inrush operation (start-up) if the part is in current limit or power limit. VDD 14 P Power Supply 8 Specifications 8.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) Input Voltage Sink Current (1) MIN MAX UNIT VDD,SET, FSTP,SENM, OUTH, ENHS, FLTb, PGHS, OV –0.3 30 V HGATE to OUTH –0.3 15 V SET to VDD –0.3 0.3 V SENM, FSTP to VDD –0.6 0.3 V TINR, TFLT, PLIM, IMON –0.3 3.6 V IMONBUF –0.3 7 V 5 mA 5 mA 150 °C FLTb, PGHS Source Current IMON, IMONBUF Storage temperature, Tstg (1) –65 Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 8.2 ESD Ratings VALUE V(ESD) (1) (1) (2) (3) 4 Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (2) ±1500 Charged-device model (CDM), per JEDEC specification JESD22-C101 (3) ±500 UNIT V Electrostatic discharge (ESD) measures device sensitivity and immunity to damage caused by assembly line electrostatic discharges into the device. JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS24772 TPS24771 TPS24770 TPS24772 TPS24771 TPS24770 www.ti.com SLVSCZ3 – MARCH 2015 8.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) VDD, SENM, SET, FSTP MIN MAX UNIT 2.5 18 ENHS, FLTb, PGHS, OUTH 0 18 Sink current FLTb, PGHS 0 2 mA Source current IMON 0 1 mA PLIM 4.99 500 kΩ IMON 1 6 kΩ FSTP 10 4000 Ω SET 10 400 Ω w/o RSTBL 10 70 3 10 10 200 Input voltage External resistance With appropriate RSTBL (1) RIMON / RSET with CHGATE > 47nF (2) TINR, TFLT HGATE, External capacitor 1 (2) nF 0 IMON IMONBUF Operating junction temperature, TJ (1) (2) V –40 1 µF 30 pF 100 pF 125 °C Refer to RSTBL Requirment for RIMON / RSET < 10 as described in section Select RSNS and VSNS,CL Setting. External capacitance tied to HGATE, should be in series with a resistor no less than 1kΩ. 8.4 Thermal Information RGE THERMAL METRIC (1) RθJA Junction-to-ambient thermal resistance 34.6 RθJC(top) Junction-to-case (top) thermal resistance 38.4 RθJB Junction-to-board thermal resistance 12.9 ψJT Junction-to-top characterization parameter 0.5 ψJB Junction-to-board characterization parameter 12.9 RθJC(bot) Junction-to-case (bottom) thermal resistance 3.2 (1) UNIT 24 PINS °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. 8.5 Electrical Characteristics Unless otherwise noted these limits apply to the following: -40°C < TJ