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TPS2552, TPS2553, TPS2552-1, TPS2553-1
SLVS841F – NOVEMBER 2008 – REVISED AUGUST 2016
TPS255xx Precision Adjustable Current-Limited Power-Distribution Switches
1 Features
3 Description
•
•
•
•
The TPS255x and TPS255x-1 power-distribution
switches are intended for applications where
precision current limiting is required or heavy
capacitive loads and short circuits are encountered
and provide up to 1.5 A of continuous load current.
These devices offer a programmable current-limit
threshold between 75 mA and 1.7 A (typical) through
an external resistor. Current-limit accuracy as tight as
±6% can be achieved at the higher current-limit
settings. The power-switch rise and fall times are
controlled to minimize current surges during turnon
and turnoff.
1
•
•
•
•
•
•
•
•
•
•
Up to 1.5-A Maximum Load Current
±6% Current-Limit Accuracy at 1.7 A (Typical)
Meets USB Current-Limiting Requirements
Backwards Compatible With TPS2550 and
TPS2551
Adjustable Current Limit: 75 mA to 1700 mA
(Typical)
Constant-Current (TPS255x) and Latch-Off
(TPS255x-1) Versions
Fast Overcurrent Response - 2 µs (Typical)
85-mΩ High-Side MOSFET (DBV Package)
Reverse Input-Output Voltage Protection
Operating Range: 2.5 V to 6.5 V
Built-In Soft Start
15-kV ESD Protection per IEC 61000-4-2 (With
External Capacitance)
UL Listed – File No. E169910 and NEMKO
IEC60950-1-am1 ed2.0
See the TI Switch Portfolio
TPS255x devices limit the output current to a safe
level by using a constant-current mode when the
output load exceeds the current-limit threshold.
TPS255x-1
devices
provide
circuit
breaker
functionality by latching off the power switch during
overcurrent or reverse-voltage situations. An internal
reverse-voltage comparator disables the powerswitch when the output voltage is driven higher than
the input to protect devices on the input side of the
switch. The FAULT output asserts low during
overcurrent and reverse-voltage conditions.
Device Information(1)
2 Applications
•
•
•
•
PART NUMBER
USB Ports and Hubs
Digital TVs
Set-Top Boxes
VOIP Phones
TPS2552
TPS2553
PACKAGE
BODY SIZE (NOM)
SOT-23 (6)
2.90 mm x 1.60 mm
WSON (6)
2.00 mm x 2.00 mm
SOT-23 (6)
2.90 mm x 1.60 mm
WSON (6)
2.00 mm x 2.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Application
TPS2552/53
5V USB
Input
USB Data
0.1 mF
IN
OUT
USB
Port
RFAULT
100 kW
120 mF
Fault Signal
Control Signal
FAULT
EN
ILIM
GND
Power Pad
RILIM
20 kW
USB requirement only*
*USB requirement that downstream
facing ports are bypassed with at least
120 mF per hub
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS2552, TPS2553, TPS2552-1, TPS2553-1
SLVS841F – NOVEMBER 2008 – REVISED AUGUST 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
9
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
4
5
5
7.1
7.2
7.3
7.4
7.5
7.6
5
6
6
6
7
8
Absolute Maximum Ratings ......................................
ESD Ratings ............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Parameter Measurement Information ................ 11
Detailed Description ............................................ 13
9.1
9.2
9.3
9.4
9.5
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
Programming...........................................................
13
13
13
15
15
10 Application and Implementation........................ 17
10.1 Application Information.......................................... 17
10.2 Typical Applications .............................................. 17
11 Power Supply Recommendations ..................... 24
11.1 Self-Powered and Bus-Powered Hubs ................. 24
11.2 Low-Power Bus-Powered and High-Power BusPowered Functions .................................................. 24
11.3 Power Dissipation and Junction Temperature ...... 24
12 Layout................................................................... 25
12.1 Layout Guidelines ................................................. 25
12.2 Layout Example .................................................... 25
13 Device and Documentation Support ................. 26
13.1
13.2
13.3
13.4
13.5
13.6
13.7
Device Support......................................................
Related Links ........................................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
26
26
26
26
26
26
26
14 Mechanical, Packaging, and Orderable
Information ........................................................... 26
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision E (February 2012) to Revision F
Page
•
Added ESD Rating table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section ................................................................................................. 1
•
Changed 1300 mA to 1700 mA in the adjustable current limit bullet under the Features section ......................................... 1
•
Changed from 1.2 A to 1.5 A.................................................................................................................................................. 4
Changes from Revision D (June 2011) to Revision E
Page
•
Changed VEN to VEN in Recommended Operating Conditions ............................................................................................... 6
•
Changed VEN to VEN in Recommended Operating Conditions ............................................................................................... 6
Changes from Revision C (September 2009) to Revision D
Page
•
Changed From: Fast Overcurrent Response - 2-µS (typ) To: Fast Overcurrent Response - 2-µs (typ) in the Features ...... 1
•
Added text To Feature - UL Listed "and NEMKO IEC60950-1-am1 ed2.0"........................................................................... 1
•
Added Features Item "See the TI Switch Portfoilo"................................................................................................................ 1
•
Changed the DEVICE INFORMATION table, and Deleted Note 3 ........................................................................................ 1
•
Added ESD-system level (contact/air) to the ABS MAX table, and Added Note 3 ................................................................ 6
•
Added text to the REVERSE-VOLTAGE PROTECTION section: "A reverse.....when this occurs.".................................... 14
2
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SLVS841F – NOVEMBER 2008 – REVISED AUGUST 2016
Changes from Revision B (February 2009) to Revision C
Page
•
Added Feature - Up to 1.5 A Maximum Load Current............................................................................................................ 1
•
Changed 1.3 A (typ) To: 1.7 A (typ) ....................................................................................................................................... 1
•
Added Text - and provide up to 1.5 A of continuous load current.......................................................................................... 1
•
Changed From: 19.1 kΩ ≤ RILIM ≤ 232 kΩ To: 15 kΩ ≤ RILIM ≤ 232 kΩ. ................................................................................. 5
•
Changed IOUT values for 1.2A and 1.5A ................................................................................................................................. 6
•
Changed TJ values for 1.2A and 1.5A .................................................................................................................................... 6
•
Added RILIM = 15 kΩ option .................................................................................................................................................... 7
•
Changed Text From: current-limit threshold between 75 mA and 1.3 A (typ) To: current-limit threshold between 75
mA and 1.7 A (typ)................................................................................................................................................................ 13
•
Changed Text From: The recommended 1% resistor range for RILIM is 19.1 kΩ ≤ RILIM ≤ 232 kΩ to ensure stability
To: The recommended 1% resistor range for RILIM is 15 kΩ ≤ RILIM ≤ 232 kΩ to ensure stability........................................ 15
•
Changed From: where 19.1 kΩ ≤ RILIM ≤ 232 kΩ. To: where 15 kΩ ≤ RILIM ≤ 232 kΩ. ........................................................ 15
•
Changed Figure 23 - Current-Limit Threshold vs RILIM ........................................................................................................ 16
•
Changed Table 2 - added rows for Current Limit of 1400 to 1700....................................................................................... 19
Changes from Revision A (December 2008) to Revision B
Page
•
Added To Features - UL Listed – File No. E169910 .............................................................................................................. 1
•
Changed Figure 17 Ttitle From: Current Limit Threshold Vs RILM ......................................................................................... 9
•
Changed Figure 18 Ttitle From: Current Limit Threshold Vs RILM ......................................................................................... 9
Changes from Original (November 2008) to Revision A
•
Page
Changed Title from: Adjustable Current-Limited Power-Distribution Switches to: Precision Adjustable CurrentLimited Power-Distribution Switches ...................................................................................................................................... 1
Copyright © 2008–2016, Texas Instruments Incorporated
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TPS2552, TPS2553, TPS2552-1, TPS2553-1
SLVS841F – NOVEMBER 2008 – REVISED AUGUST 2016
www.ti.com
5 Device Comparison Table
4
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www.ti.com
SLVS841F – NOVEMBER 2008 – REVISED AUGUST 2016
6 Pin Configuration and Functions
TPS255x DBV Package
6-Pin SOT-23
Top View
6
5
4
1
2
3
IN
GND
EN
TPS255x DRV Package
6-Pin WSON
Top View
OUT
ILIM
FAULT
1
2
3
OUT
ILIM
FAULT
EN = Active Low for the TPS2552
PAD
6 IN
5 GND
4 EN
EN = Active Low for the TPS2552
EN = Active High for the TPS2553
EN = Active High for the TPS2553
Add –1 to part number for latch-off version
Add –1 to part number for latch-off version
Pin Functions
PIN
NAME
TPS2552
SOT-23
TPS2553
I/O
WSON
SOT-23
WSON
DESCRIPTION
EN
3
4
—
—
I
Enable input, logic low turns on power switch
EN
—
—
3
4
I
Enable input, logic high turns on power switch
FAULT
4
3
4
3
O
Active-low open-drain output, asserted during
overcurrent, overtemperature, or reverse-voltage
conditions.
GND
2
5
2
5
—
Ground connection; connect externally to PowerPAD
ILIM
5
2
5
2
O
External resistor used to set current-limit threshold;
recommended 15 kΩ ≤ RILIM ≤ 232 kΩ.
IN
1
6
1
6
I
Input voltage; connect a 0.1 µF or greater ceramic
capacitor from IN to GND as close to the IC as
possible.
OUT
6
1
6
1
O
Power-switch output
PowerPAD™
—
PAD
—
PAD
—
Internally connected to GND; used to heat-sink the part
to the circuit board traces. Connect PowerPAD to GND
pin externally.
Add –1 for Latch-Off version
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
Voltage range on IN, OUT, EN or EN, ILIM, FAULT
Voltage range from IN to OUT
IO
(2)
MAX
UNIT
–0.3
7
V
–7
7
V
Internally Limited
See the Thermal Information
Continuous FAULT sink current
0
25
mA
ILIM source current
0
1
mA
–40
150
°C
–65
150
°C
Maximum junction temperature
Tstg Storage temperature
(1)
MIN
Continuous output current
Continuous total power dissipation
TJ
(1) (2)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Voltages are referenced to GND unless otherwise noted.
Copyright © 2008–2016, Texas Instruments Incorporated
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SLVS841F – NOVEMBER 2008 – REVISED AUGUST 2016
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7.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
(3)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Charged device model (CDM), per JEDEC specification JESD22C101 (2)
±500
IEC 61000-4-2 contact discharge (3)
±8000
IEC 61000-4-2 air-gap discharge (3)
±15000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
Surges per EN61000-4-2. 1999 applied to output terminals of EVM. These are passing test levels, not failure threshold.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VIN
Input voltage, IN
2.5
6.5
V
VEN
Enable voltage
TPS2552/52-1
0
6.5
V
VEN
Enable voltage
TPS2553/53-1
0
6.5
V
VIH
High-level input voltage on EN or EN
VIL
Low-level input voltage on EN or EN
IOUT
Continuous output current,
OUT
RILIM
Current-limit threshold resistor range (nominal 1%) from ILIM to GND
IO
Continuous FAULT sink current
1.1
0.66
–40 °C ≤ TJ ≤ 125 °C
0
1.2
–40 °C ≤ TJ ≤ 105 °C
0
1.5
15
232
kΩ
0
10
mA
Input de-coupling capacitance, IN to GND
Operating virtual junction
temperature (1)
TJ
(1)
V
0.1
A
µF
IOUT ≤ 1.2 A
–40
125
IOUT ≤ 1.5 A
–40
105
°C
See Power Dissipation and Junction Temperature for details on how to calculate maximum junction temperature for specific applications
and packages.
7.4 Thermal Information
TPS2552
THERMAL METRIC
(1)
TPS2553
DBV (SOT-23)
DRV (WSON)
DBV (SOT-23)
DRV (WSON)
6 PINS
6 PINS
6 PINS
6 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
182.6
72
182.6
72
°C/W
RθJC(to
Junction-to-case (top) thermal resistance
122.2
85.3
122.2
85.3
°C/W
RθJB
Junction-to-board thermal resistance
29.4
41.3
29.4
41.3
°C/W
ψJT
Junction-to-top characterization parameter
20.8
1.7
20.8
1.7
°C/W
ψJB
Junction-to-board characterization parameter
28.9
41.7
28.9
41.7
°C/W
RθJC(b
Junction-to-case (bottom) thermal resistance
—
11.1
—
11.1
°C/W
p)
ot)
(1)
6
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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SLVS841F – NOVEMBER 2008 – REVISED AUGUST 2016
7.5 Electrical Characteristics
over recommended operating conditions, VEN = 0 V, or VEN = VIN, RFAULT = 10 kΩ (unless otherwise noted)
TEST CONDITIONS (1)
PARAMETER
MIN
TYP
MAX
UNIT
POWER SWITCH
DBV package, TJ = 25°C
85
DBV package, –40°C ≤TJ ≤125°C
rDS(on)
Static drain-source on-state resistance DRV package, TJ = 25°C
100
DRV package, –40°C ≤TJ ≤105°C
Rise time, output
tf
Fall time, output
115
mΩ
140
DRV package, –40°C ≤TJ ≤125°C
tr
95
135
150
CL = 1 µF, RL = 100 Ω,
(see Figure 20)
VIN = 6.5 V
1.1
VIN = 2.5 V
0.7
1.5
CL = 1 µF, RL = 100 Ω,
(see Figure 20)
VIN = 6.5 V
0.2
0.5
VIN = 2.5 V
0.2
0.5
0.66
1.1
V
–0.5
0.5
µA
1
ms
ENABLE INPUT EN OR EN
Enable pin turn on/off threshold
IEN
Input current
VEN = 0 V or 6.5 V, VEN = 0 V or 6.5 V
ton
Turnon time
CL = 1 µF, RL = 100 Ω, (see Figure 20)
3
ms
toff
Turnoff time
CL = 1 µF, RL = 100 Ω, (see Figure 20)
3
ms
CURRENT LIMIT
RILIM = 15 kΩ, –40°C ≤TJ ≤105°C
Current-limit threshold (Maximum DC
output current IOUT delivered to load)
and Short-circuit current, OUT
connected to GND
IOS
RILIM = 20 kΩ
RILIM = 49.9 kΩ
1610
1700
1800
TJ = 25°C
1215
1295
1375
–40°C ≤TJ ≤125°C
1200
1295
1375
TJ = 25°C
490
520
550
–40°C ≤TJ ≤125°C
475
520
565
110
130
150
50
75
100
RILIM = 210 kΩ
ILIM shorted to IN
tIOS
Response time to short circuit
VIN = 5 V (see Figure 21)
2
mA
µs
REVERSE-VOLTAGE PROTECTION
Reverse-voltage comparator trip point
(VOUT – VIN)
Time from reverse-voltage condition
to MOSFET turn off
VIN = 5 V
95
135
190
mV
3
5
7
ms
SUPPLY CURRENT
IIN_off
Supply current, low-level output
VIN = 6.5 V, No load on OUT, VEN = 6.5 V or VEN = 0 V
IIN_on
Supply current, high-level output
VIN = 6.5 V, No load on OUT
IREV
Reverse leakage current
VOUT = 6.5 V, VIN = 0 V
0.1
1
µA
RILIM = 20 kΩ
120
140
µA
RILIM = 210 kΩ
100
120
µA
TJ = 25 °C
0.01
1
µA
2.35
2.45
UNDERVOLTAGE LOCKOUT
UVLO Low-level input voltage, IN
Hysteresis, IN
VIN rising
TJ = 25 °C
25
V
mV
FAULT FLAG
VOL
Output low voltage, FAULT
I/FAULT = 1 mA
Off-state leakage
V/FAULT = 6.5 V
FAULT deglitch
180
mV
1
µA
FAULT assertion or de-assertion due to overcurrent condition
5
7.5
10
ms
FAULT assertion or de-assertion due to reverse-voltage condition
2
4
6
ms
THERMAL SHUTDOWN
Thermal shutdown threshold
155
°C
Thermal shutdown threshold in
current-limit
135
°C
Hysteresis
(1)
10
°C
Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account
separately.
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7.6 Typical Characteristics
Figure 1. Turnon Delay and Rise Time
Figure 2. Turnoff Delay and Fall Time
8
Figure 3. Device Enabled into Short-Circuit
Figure 4. Full-Load to Short-Circuit Transient Response
Figure 5. Short-Circuit to Full-Load Recovery Response
Figure 6. No-Load to Short-Circuit Transient Response
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SLVS841F – NOVEMBER 2008 – REVISED AUGUST 2016
Typical Characteristics (continued)
Figure 7. Short-Circuit to No-Load Recovery Response
Figure 8. No Load to 1-Ω Transient Response
Figure 10. Reverse-Voltage Protection Response
Figure 9. 1-Ω to No Load Transient Response
2.40
RILIM = 20 kW
UVLO - Undervoltage Lockout - V
2.39
2.38
2.37
UVLO Rising
2.36
2.35
2.34
UVLO Falling
2.33
2.32
2.31
2.30
-50
Figure 11. Reverse-Voltage Protection Recovery
Copyright © 2008–2016, Texas Instruments Incorporated
0
50
TJ - Junction Temperature - °C
100
150
Figure 12. UVLO – Undervoltage Lockout – V
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Typical Characteristics (continued)
150
0.40
RILIM = 20 kW
135
IIN - Supply Current, Output Enabled - mA
IIN - Supply Current, Output Disabled - mA
0.36
0.32
0.28
0.24
VIN = 6.5 V
0.20
0.16
0.12
0.08
VIN = 2.5 V
0
50
TJ - Junction Temperature - °C
100
105
90
75
VIN = 3.3 V
VIN = 2.5 V
60
45
30
0
-50
150
Figure 13. IIN – Supply Current, Output Disabled – µA
0
50
TJ - Junction Temperature - °C
100
150
Figure 14. IIN – Supply Current, Output Enabled – µA
150
rDS(on) - Static Drain-Source On-State Resistance - mW
20
VIN = 5 V,
18
RILIM = 20 kW,
TA = 25°C
16
Current Limit Response - ms
VIN = 5 V
15
0
-50
14
12
10
8
6
4
2
125
DRV Package
100
DBV Package
75
50
25
0
-50
0
0
1.5
3
Peak Current - A
4.5
0
6
Figure 15. Current Limit Response – µs
50
TJ - Junction Temperature - °C
100
150
Figure 16. MOSFET rDS(on) Vs. Junction Temperature
1400
150
1300
140
130
IDS - Static Drain-Source Current - mA
1200
IDS - Static Drain-Source Current - mA
VIN = 6.5 V
120
0.04
TA = -40°C
1100
1000
TA = 25°C
900
TA = 125°C
800
700
600
500
400
300
200
VIN = 6.5 V,
100
RILIM = 20 kW
0
0
100
200
300
400
500
600
VIN - VOUT - 100 mV/div
700
800
900
1000
Figure 17. Switch Current Vs. Drain-Source Voltage Across
Switch
10
RILIM = 20 kW
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120
TA = 25°C
TA = -40°C
110
TA = 125°C
100
90
80
70
60
50
40
30
20
VIN = 6.5 V,
10
RILIM = 200 kW
0
0
100
200
300
400
500
600
VIN - VOUT - 100 mV/div
700
800
900
1000
Figure 18. Switch Current Vs. Drain-Source Voltage Across
Switch
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SLVS841F – NOVEMBER 2008 – REVISED AUGUST 2016
8 Parameter Measurement Information
TPS2552
10 mF
VIN
IN
VOUT
OUT
RFAULT
10 kW
150 mF
ILIM
Fault Signal
FAULT
Control Signal
RILIM
GND
EN
Power Pad
Figure 19. Typical Characteristics Reference Schematic
OUT
tf
tr
CL
RL
90%
90%
VOUT
10%
10%
TEST CIRCUIT
VEN
50%
50%
VEN
ton
VOUT
toff
toff
ton
90%
50%
50%
toff
90%
VOUT
10%
10%
VOLTAGE WAVEFORMS
Figure 20. Test Circuit and Voltage Waveforms
IOS
IOUT
tIOS
Figure 21. Response Time to Short-Circuit Waveform
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Parameter Measurement Information (continued)
Decreasing
Load Resistance
VOUT
Decreasing
Load Resistance
IOUT
IOS
Figure 22. Output Voltage vs Current-Limit Threshold
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9 Detailed Description
9.1 Overview
The TPS255x and TPS255x-1 are current-limited, power-distribution switches using N-channel MOSFETs for
applications where short circuits or heavy capacitive loads are encountered and provide up to 1.5 A of
continuous load current. These devices allow the user to program the current-limit threshold between 75 mA and
1.7 A (typical) through an external resistor. Additional device shutdown features include overtemperature
protection and reverse-voltage protection. The device incorporates an internal charge pump and gate drive
circuitry necessary to drive the N-channel MOSFET. The charge pump supplies power to the driver circuit and
provides the necessary voltage to pull the gate of the MOSFET above the source. The charge pump operates
from input voltages as low as 2.5 V and requires little supply current. The driver controls the gate voltage of the
power switch. The driver incorporates circuitry that controls the rise and fall times of the output voltage to limit
large current and voltage surges and provides built-in soft-start functionality. There are two device families that
handle overcurrent situations differently. The TPS255x family enters constant-current mode while the TPS255x-1
family latches off when the load exceeds the current-limit threshold.
9.2 Functional Block Diagram
-
Reverse
Voltage
Comparator
+
IN
OUT
4-ms
Deglitch
CS
Current
Sense
Charge
Pump
Driver
EN
Current
Limit
FAULT
(Note A)
UVLO
GND
Thermal
Sense
8-ms Deglitch
ILIM
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A.
TPS255x parts enter constant current mode during current limit condition; TPS255x-1 parts latch off
9.3 Feature Description
9.3.1 Overcurrent Conditions
The TPS255x and TPS255x-1 respond to overcurrent conditions by limiting their output current to the IOS levels
shown in Figure 23. When an overcurrent condition is detected, the device maintains a constant output current
and reduces the output voltage accordingly. Two possible overload conditions can occur.
The first condition is when a short circuit or partial short circuit is present when the device is powered-up or
enabled. The output voltage is held near zero potential with respect to ground and the TPS255x ramps the
output current to IOS. The TPS255x devices limits the current to IOS until the overload condition is removed or the
device begins to thermal cycle. The TPS255x-1 devices will limit the current to IOS until the overload condition is
removed or the internal deglitch time (7.5-ms typical) is reached and the device is turned off. The device remains
off until power is cycled or the device enable is toggled.
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Feature Description (continued)
The second condition is when a short circuit, partial short circuit, or transient overload occurs while the device is
enabled and powered on. The device responds to the overcurrent condition within time tIOS (see Figure 21). The
current-sense amplifier is overdriven during this time and momentarily disables the internal current-limit
MOSFET. The current-sense amplifier recovers and limits the output current to IOS. Similar to the previous case,
the TPS255x limits the current to IOS until the overload condition is removed or the device begins to thermal
cycle; the TPS255x-1 limits the current to IOS until the overload condition is removed or the internal deglitch time
is reached and the device is latched off.
The TPS255x thermal cycles if an overload condition is present long enough to activate thermal limiting in any of
the above cases. The device turns off when the junction temperature exceeds 135°C (typical) while in current
limit. The device remains off until the junction temperature cools 10°C (typical) and then restarts. The TPS255x
cycles on and off until the overload is removed (see Figure 5 and Figure 7) .
9.3.2 Reverse-Voltage Protection
The reverse-voltage protection feature turns off the N-channel MOSFET whenever the output voltage exceeds
the input voltage by 135 mV (typical) for 4-ms (typical). A reverse current of (VOUT – VIN)/rDS(on)) are present when
this occurs. This prevents damage to devices on the input side of the TPS255x and TPS2552-1/TPS2253-1 by
preventing significant current from sinking into the input capacitance. The TPS255x devices allow the N-channel
MOSFET to turn on once the output voltage goes below the input voltage for the same 4-ms deglitch time. The
TPS255x-1 devices keep the device turned off even if the reverse-voltage condition is removed and do not allow
the N-channel MOSFET to turn on until power is cycled or the device enable is toggled. The reverse-voltage
comparator also asserts the FAULT output (active-low) after 4-ms.
9.3.3
FAULT Response
The FAULT open-drain output is asserted (active low) during an overcurrent, overtemperature, or reverse-voltage
condition. The TPS255x asserts the FAULT signal until the fault condition is removed and the device resumes
normal operation. The TPS255x-1 asserts the FAULT signal during a fault condition and remains asserted while
the part is latched-off. The FAULT signal is de-asserted once device power is cycled or the enable is toggled and
the device resumes normal operation. The TPS255x and TPS255x-1 are designed to eliminate false FAULT
reporting by using an internal delay de-glitch circuit for overcurrent (7.5-ms typical) and reverse-voltage (4-ms
typical) conditions without the need for external circuitry. This ensures that FAULT is not accidentally asserted
due to normal operation such as starting into a heavy capacitive load. The deglitch circuitry delays entering and
leaving fault conditions. Overtemperature conditions are not deglitched and assert the FAULT signal immediately.
9.3.4 Undervoltage Lockout (UVLO)
The undervoltage lockout (UVLO) circuit disables the power switch until the input voltage reaches the UVLO
turnon threshold. Built-in hysteresis prevents unwanted on and off cycling due to input voltage drop from large
current surges.
9.3.5 ENABLE (EN or EN)
The logic enable controls the power switch, bias for the charge pump, driver, and other circuits to reduce the
supply current. The supply current is reduced to less than 1-µA when a logic low is present on EN. A logic low
input on EN or a logic high input on EN enables the driver, control circuits, and power switch. The enable input is
compatible with both TTL and CMOS logic levels.
9.3.6 Thermal Sense
The TPS255x and TPS255x-1 have self-protection features using two independent thermal-sensing circuits that
monitor the operating temperature of the power switch and disable operation if the temperature exceeds
recommended operating conditions. The TPS255x device operates in constant-current mode during an
overcurrent conditions, which increases the voltage drop across power-switch. The power dissipation in the
package is proportional to the voltage drop across the power switch, which increases the junction temperature
during an overcurrent condition. The first thermal sensor turns off the power switch when the die temperature
exceeds 135°C (minimum) and the part is in current limit. Hysteresis is built into the thermal sensor, and the
switch turns on after the device has cooled approximately 10°C.
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Feature Description (continued)
The TPS255x and TPS255x-1 also have a second ambient thermal sensor. The ambient thermal sensor turns off
the power-switch when the die temperature exceeds 155°C (minimum) regardless of whether the power switch is
in current limit and turns on the power switch after the device has cooled approximately 10°C. The TPS255x and
TPS255x-1 families continue to cycle off and on until the fault is removed.
The open-drain fault reporting output FAULT is asserted (active low) immediately during an overtemperature
shutdown condition.
9.4 Device Functional Modes
There are no other functional modes.
9.5 Programming
9.5.1 Programming the Current-Limit Threshold
The overcurrent threshold is user programmable through an external resistor. The TPS255x and TPS255x-1 use
an internal regulation loop to provide a regulated voltage on the ILIM pin. The current-limit threshold is
proportional to the current sourced out of ILIM. The recommended 1% resistor range for RILIM is 15 kΩ ≤ RILIM ≤
232 kΩ to ensure stability of the internal regulation loop. Many applications require that the minimum current limit
is above a certain current level or that the maximum current limit is below a certain current level, so it is
important to consider the tolerance of the overcurrent threshold when selecting a value for RILIM. The following
equations and Figure 23 can be used to calculate the resulting overcurrent threshold for a given external resistor
value (RILIM). Figure 23 includes current-limit tolerance due to variations caused by temperature and process.
However, the equations do not account for tolerance due to external resistor variation, so it is important to
account for this tolerance when selecting RILIM. The traces routing the RILIM resistor to the TPS255x and
TPS255x-1 must be as short as possible to reduce parasitic effects on the current-limit accuracy.
RILIM can be selected to provide a current-limit threshold that occurs 1) above a minimum load current or 2)
below a maximum load current.
To design above a minimum current-limit threshold, find the intersection of RILIM and the maximum desired load
current on the IOS(min) curve and choose a value of RILIM below this value. Programming the current limit above a
minimum threshold is important to ensure start-up into full load or heavy capacitive loads. The resulting
maximum current-limit threshold is the intersection of the selected value of RILIM and the IOS(max) curve.
To design below a maximum current-limit threshold, find the intersection of RILIM and the maximum desired load
current on the IOS(max) curve and choose a value of RILIM above this value. Programming the current limit below a
maximum threshold is important to avoid current limiting upstream power supplies, causing the input voltage bus
to droop. The resulting minimum current-limit threshold is the intersection of the selected value of RILIM and the
IOS(min) curve.
Current-Limit Threshold Equations (IOS):
IOSmax (mA) =
22980V
RILIM0.94kW
IOSnom (mA) =
23950V
RILIM0.977kW
IOSmin (mA) =
25230V
RILIM1.016kW
where
15 kΩ ≤ RILIM ≤ 232 kΩ.
(1)
While the maximum recommended value of RILIM is 232 kΩ, there is one additional configuration that allows for
a lower current-limit threshold. The ILIM pin may be connected directly to IN to provide a 75 mA (typical) currentlimit threshold. Additional low-ESR ceramic capacitance may be necessary from IN to GND in this configuration
to prevent unwanted noise from coupling into the sensitive ILIM circuitry.
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Programming (continued)
1800
1700
1600
Current Limit Threshold - mA
1500
1400
1300
1200
1100
1000
900
IOS(max)
800
700
600
IOS(nom)
500
400
300
IOS(min)
200
100
0
15 25
35 45 55 65 75 85 95 105 115 125 135 145 155 165 175 185 195 205 215 225 235
RILIM - Current Limit Resistor - kW
Figure 23. Current-Limit Threshold vs RILIM
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10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
10.1.1 Constant-Current vs Latch-Off Operation and Impact on Output Voltage
Both the constant-current devices (TPS255x) and latch-off devices (TPS255x-1) operate identically during normal
operation, that is, the load current is less than the current-limit threshold and the devices are not limiting current.
During normal operation the N-channel MOSFET is fully enhanced, and VOUT = VIN - (IOUT x rDS(on)). The voltage
drop across the MOSFET is relatively small compared to VIN, and VOUT ≉ VIN.
Both the constant-current devices (TPS255x ) and latch-off devices (TPS255x-1) operate identically during the
initial onset of an overcurrent event. Both devices limit current to the programmed current-limit threshold set to
RILIM by operating the N-channel MOSFET in the linear mode. During current-limit operation, the N-channel
MOSFET is no longer fully-enhanced and the resistance of the device increases. This allows the device to
effectively regulate the current to the current-limit threshold. The effect of increasing the resistance of the
MOSFET is that the voltage drop across the device is no longer negligible (VIN ≠ VOUT), and VOUT decreases. The
amount that VOUT decreases is proportional to the magnitude of the overload condition. The expected VOUT can
be calculated by,
IOS × RLOAD
where
IOS is the current-limit threshold and RLOAD is the magnitude of the overload condition.
(2)
For example, if IOS is programmed to 1 A and a 1 Ω overload condition is applied, the resulting VOUT is 1 V.
While both the constant-current devices (TPS255x ) and latch-off devices (TPS255x-1) operate identically during
the initial onset of an overcurrent event, they behave differently if the overcurrent event lasts longer than the
internal delay de-glitch circuit (7.5-ms typical). The constant-current devices (TPS255x ) assert the FAULT flag
after the deglitch period and continue to regulate the current to the current-limit threshold indefinitely. In practical
circuits, the power dissipation in the package increases the die temperature above the overtemperature
shutdown threshold (135°C minimum), and the device turns off until the die temperature decreases by the
hysteresis of the thermal shutdown circuit (10°C typical). The device turns on and continues to thermal cycle until
the overload condition is removed. The constant-current devices resume normal operation once the overload
condition is removed. The latch-off devices (TPS255x-1) assert the FAULT flag after the deglitch period and
immediately turn off the device. The device remains off regardless of whether the overload condition is removed
from the output. The latch-off devices remain off and do not resume normal operation until the surrounding
system either toggles the enable or cycles power to the device.
10.2 Typical Applications
10.2.1 Two-Level Current-Limit Circuit
Some applications require different current-limit thresholds depending on external system conditions. Figure 24
shows an implementation for an externally controlled, two-level current-limit circuit. The current-limit threshold is
set by the total resistance from ILIM to GND (see the Programming the Current-Limit Threshold section). A logiclevel input enables or disables MOSFET Q1 and changes the current-limit threshold by modifying the total
resistance from ILIM to GND. Additional MOSFET and resistor combinations can be used in parallel to Q1/R2 to
increase the number of additional current-limit levels.
NOTE
ILIM must never be driven directly with an external signal.
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Typical Applications (continued)
Input
0.1 mF
Output
IN
OUT
RFAULT
100 kW
CLOAD
R1
210 kW
ILIM
Fault Signal
FAULT
Control Signal
RLOAD
R2
22.1 kW
GND
EN
Power Pad
Q1
2N7002
Current Limit
Control Signal
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Figure 24. Two-Level Current-Limit Circuit
10.2.1.1 Design Requirements
For this example, use the parameters shown in Table 1.
Table 1. Design Requirements
PARAMETER
VALUE
Input voltage
5V
Output voltage
5V
Above a minimum current limit
1000 mA
Below a maximum current limit
500 mA
10.2.1.2 Detailed Design Procedures
10.2.1.2.1 Designing Above a Minimum Current Limit
Some applications require that current limiting cannot occur below a certain threshold. For this example, assume
that 1 A must be delivered to the load so that the minimum desired current-limit threshold is 1000 mA. Use the
IOS equations and Figure 23 to select RILIM.
IOSmin (mA) = 1000mA
IOSmin (mA) =
25230V
RILIM1.016 k W
1
æ 25230V ÷ö1.016
÷
RILIM (k W ) = ççç
çè IOSmin mA ÷÷ø
RILIM (k W ) = 24k W
(3)
Select the closest 1% resistor less than the calculated value: RILIM = 23.7 kΩ. This sets the minimum current-limit
threshold at 1 A . Use the IOS equations, Figure 23, and the previously calculated value for RILIM to calculate the
maximum resulting current-limit threshold.
RILIM (kW) = 23.7kW
IOSmax (mA) =
IOSmax (mA) =
22980V
RILIM0.94kW
22980V
23.70.94kW
IOSmax (mA) = 1172.4mA
(4)
The resulting maximum current-limit threshold is 1172.4 mA with a 23.7-kΩ resistor.
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10.2.1.2.2 Designing Below a Maximum Current Limit
Some applications require that current limiting must occur below a certain threshold. For this example, assume
that the desired upper current-limit threshold must be below 500 mA to protect an up-stream power supply. Use
the IOS equations and Figure 23 to select RILIM.
IOSmax (mA) = 500mA
IOSmax (mA) =
22980V
RILIM0.94kW
1
æ 22980V ÷ö0.94
÷
RILIM (kW) = ççç
çèIOSmax mA ÷÷ø
RILIM (kW) = 58.7kW
(5)
Select the closest 1% resistor greater than the calculated value: RILIM = 59-kΩ. This sets the maximum currentlimit threshold at 500 mA . Use the IOS equations, Figure 23, and the previously calculated value for RILIM to
calculate the minimum resulting current-limit threshold.
RILIM (kW) = 59kW
IOSmin (mA) =
IOSmin (mA) =
25230V
RILIM1.016kW
25230V
591.016kW
IOSmin (mA) = 400.6mA
(6)
The resulting minimum current-limit threshold is 400.6 mA with a 59-kΩ resistor.
10.2.1.2.3 Accounting for Resistor Tolerance
The previous sections described the selection of RILIM given certain application requirements and the importance
of understanding the current-limit threshold tolerance. The analysis focused only on the TPS255x and TPS255x1 performance and assumed an exact resistor value. However, resistors sold in quantity are not exact and are
bounded by an upper and lower tolerance centered around a nominal resistance. The additional RILIM resistance
tolerance directly affects the current-limit threshold accuracy at a system level. The following table shows a
process that accounts for worst-case resistor tolerance assuming 1% resistor values. Step one follows the
selection process outlined in the application examples above. Step two determines the upper and lower
resistance bounds of the selected resistor. Step three uses the upper and lower resistor bounds in the IOS
equations to calculate the threshold limits. It is important to use tighter tolerance resistors, for example, 0.5% or
0.1%, when precision current limiting is desired.
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Table 2. Common RILIM Resistor Selections
DESIRED
NOMINAL
CURRENT
LIMIT
(mA)
RESISTOR TOLERANCE
IDEAL
RESISTOR
(kΩ)
CLOSEST
1% RESISTOR
(kΩ)
75
1% LOW (kΩ)
1% HIGHT
(kΩ)
SHORT ILIM to IN
ACTUAL LIMITS
IOS MIN (mA)
IOS NOM (mA)
IOS MAX (mA)
50.0
75.0
100.0
120
226.1
226
223.7
228.3
101.3
120.0
142.1
200
134.0
133
131.7
134.3
173.7
201.5
233.9
300
88.5
88.7
87.8
89.6
262.1
299.4
342.3
400
65.9
66.5
65.8
67.2
351.2
396.7
448.7
500
52.5
52.3
51.8
52.8
448.3
501.6
562.4
600
43.5
43.2
42.8
43.6
544.3
604.6
673.1
700
37.2
37.4
37.0
37.8
630.2
696.0
770.8
800
32.4
32.4
32.1
32.7
729.1
800.8
882.1
900
28.7
28.7
28.4
29.0
824.7
901.5
988.7
1000
25.8
26.1
25.8
26.4
908.3
989.1
1081.0
1100
23.4
23.2
23.0
23.4
1023.7
1109.7
1207.5
1200
21.4
21.5
21.3
21.7
1106.0
1195.4
1297.1
1300
19.7
19.6
19.4
19.8
1215.1
1308.5
1414.9
1400
18.3
18.2
18.0
18.4
1310.1
1406.7
1517.0
1500
17.0
16.9
16.7
17.1
1412.5
1512.4
1626.4
1600
16.0
15.8
15.6
16.0
1512.5
1615.2
1732.7
1700
15.0
15.0
14.9
15.2
1594.5
1699.3
1819.4
10.2.1.2.4 Input and Output Capacitance
Input and output capacitance improves the performance of the device; the actual capacitance must be optimized
for the particular application. For all applications, TI recommends placing a 0.1-µF or greater ceramic bypass
capacitor between IN and GND as close to the device as possible for local noise de-coupling. This precaution
reduces ringing on the input due to power-supply transients. Additional input capacitance may be needed on the
input to reduce voltage overshoot from exceeding the absolute maximum voltage of the device during heavy
transient conditions. This is especially important during bench testing when long, inductive cables are used to
connect the evaluation board to the bench power-supply.
TI recommends placing a high-value electrolytic capacitor on the output pin when large transient currents are
expected on the output.
10.2.1.3 Application Curves
Figure 25. Turnon Delay and Rise Time
Figure 26. Reverse-Voltage Protection Recovery
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10.2.2 Auto-Retry Functionality
Some applications require that an overcurrent condition disables the part momentarily during a fault condition
and re-enables after a pre-set time. This auto-retry functionality can be implemented with an external resistor and
capacitor. During a fault condition, FAULT pulls low disabling the part. The part is disabled when EN is pulled
low, and FAULT goes high impedance allowing CRETRY to begin charging. The part re-enables when the voltage
on EN reaches the turnon threshold, and the auto-retry time is determined by the resistor-capacitor time
constant. The device continues to cycle in this manner until the fault condition is removed.
TPS2553
0.1 mF
Input
Output
IN
OUT
RLOAD
RFAULT
CLOAD
100 kW
ILIM
FAULT
GND
EN
RILIM
20 kW
CRETRY
Power Pad
0.1 mF
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Figure 27. Auto-Retry Functionality
Some applications require auto-retry functionality and the ability to enable or disable with an external logic signal.
Figure 28 shows how an external logic signal can drive EN through RFAULT and maintain auto-retry functionality.
The resistor-capacitor time constant determines the auto-retry time-out period.
TPS2553
0.1 mF
Input
Output
IN
OUT
RLOAD
CLOAD
External Logic
Signal & Driver
ILIM
RFAULT
RILIM
FAULT
100 kW
20 kW
GND
EN
CRETRY
Power Pad
0.1 mF
Copyright © 2016, Texas Instruments Incorporated
Figure 28. Auto-Retry Functionality With External EN Signal
10.2.2.1 Design Requirements
For this example, use the parameters shown in Table 3.
Table 3. Design Requirements
PARAMETER
VALUE
Input voltage
5V
Output voltage
5V
Current
1200 mA
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10.2.2.2 Detailed Design Procedure
Refer to Programming the Current-Limit Threshold section for the current limit setting. For auto-retry functionality,
once FAULT asserted, EN pull low, TPS2553 is disabled, FAULT des-asserted, CRETRY is slowly charged to EN
logic high through RFAULT, then enable, after deglitch time, FAULT asserted again. In the event of an overload,
TPS2553 cycles and has output average current. ON-time with output current is decided by FAULT deglitch time.
OFF-time without output current is decided by RFAULT x CRETRY constant time to EN logic high and ton time.
Therefore, set the RFAULT × CRETRY to get the desired output average current during overload.
10.2.3 Typical Application as USB Power Switch
TPS2552/53
USB Data
0.1 mF
5V USB
Input
IN
OUT
USB
Port
RFAULT
100 kW
120 mF
Fault Signal
FAULT
Control Signal
ILIM
GND
EN
Power Pad
RILIM
20 kW
USB requirement only*
*USB requirement that downstream
facing ports are bypassed with at least
120 mF per hub
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Figure 29. Typical Application as USB Power Switch
10.2.3.1 Design Requirements
For this example, use the parameters shown in Table 4.
Table 4. Design Requirements
PARAMETER
VALUE
Input voltage
5V
Output voltage
5V
Current
1200 mA
10.2.3.1.1 USB Power-Distribution Requirements
USB can be implemented in several ways regardless of the type of USB device being developed. Several powerdistribution features must be implemented.
• SPHs must:
– Current limit downstream ports
– Report overcurrent conditions
• BPHs must:
– Enable or disable power to downstream ports
– Power up at
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