TPS53315RGFT

Sample & Buy Product Folder Support & Community Tools & Software Technical Documents TPS53315 SLUSAE6A – DECEMBER 2010 – REVISED DECEMBER 2015 TPS53315 12-A Step-Down Regulator with Integrated Switcher 1 Features 2 Applications • • • • • • • • 1 • • • • • • • • • • • • • Conversion Input Voltage Range: 3 V to 15 V VDD Input Voltage Range: 4.5 V to 25 V Output Voltage Range: 0.6 V to 5.5 V 5-V LDO Output Integrated Power MOSFETs with 12-A Continuous Output Current N ´ ON R7 ´ C1 2 where • N is the coefficient to account for L and COUT variation. (14) Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: TPS53315 21 TPS53315 SLUSAE6A – DECEMBER 2010 – REVISED DECEMBER 2015 www.ti.com N is also used to provide enough margin for stability. It is recommended N = 2 for VOUT ≤ 1.8 V and N = 4 for VOUT ≥ 3.3 V or when L ≤ 250 nH. The higher VOUT needs a higher N value because the effective output capacitance is reduced significantly with higher DC bias. For example, a 6.3-V, 22-µF ceramic capacitor may have only 8 µF of effective capacitance when biased at 5 V. Because the VFB pin voltage is regulated at the valley, the increased ripple on the VFB pin causes the increase of the VFB DC value. The AC ripple coupled to the VFB pin has two components, one coupled from SW node and the other coupled from the VOUT pin and they can be calculated using Equation 15 and Equation 16 when neglecting the output voltage ripple caused by equivalent series inductance (ESL). V - VOUT D ´ VINJ _ SW = IN R7 ´ C1 fSW (15) VINJ _ OUT = ESR ´ IIND(ripple ) + IIND(ripple ) 8 ´ COUT ´ fSW (16) It is recommended that VINJ_SW to be less than 50 mV. If the calculated VINJ_SW is higher than 50 mV, then other parameters must be adjusted to reduce it. For example, COUT can be increased to satisfy Equation 14 with a higher R7 value, thereby reducing VINJ_SW. The DC voltage at the VFB pin can be calculated by Equation 17: VINJ _ SW + VINJ _ OUT VVFB = 0.6 + 2 (17) And the resistor divider value can be determined by Equation 18: - VVFB V ´ R2 R1 = OUT VVFB (18) 8.2.2.4 Application Curves FCCM VIN = 12 V IOUT= 10 A EN (5 V/div) FCCM VIN = 12 V IOUT= 0 A EN (5 V/div) VOUT (0.5 V/div) VOUT (0.5 V/div) 0.5 V pre-biased VREG (5 V/div) VREG (5 V/div) PGOOD (5 V/div) PGOOD (5 V/div) Time (1 ms/div) Time (1 ms/div) Figure 26. Start-Up 22 Figure 27. Pre-Bias Start-Up Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: TPS53315 TPS53315 www.ti.com SLUSAE6A – DECEMBER 2010 – REVISED DECEMBER 2015 EN (5 V/div) FCCM VIN = 12 V IOUT= 10 A VIN (5 V/div) FCCM VEN = 5 V IOUT= 10 A VDD = VIN VOUT (0.5 V/div) VOUT (0.5 V/div) VREG (5 V/div) VREG (5 V/div) PGOOD (5 V/div) PGOOD (5 V/div) Time (4 ms/div) Time (2 ms/div) Figure 28. Turn-Off Figure 29. UVLO Start-Up Skip Mode VIN = 12 V IOUT= 0 A FCCM VIN = 12 V IOUT = 0 A VOUT (20 mV/div) VOUT (20 mV/div) LL (5 V/div) LL (5 V/div) IL (2 A/div) IL (2 A/div) Time (2 µs/div) Time (1 µs/div) Figure 30. 1.1-V Output FCCM Steady-State Operation Skip Mode VIN = 12 V Figure 31. 1.1-V Output Skip Mode Steady-State Operation VOUT (20 mV/div) VOUT (20 mV/div) VOUT = 1.1 V Skip Mode VIN = 12 V LL (5 V/div) LL (5 V/div) VOUT = 1.1 V IL (2 A/div) Time (100 µs/div) IL (2 A/div) Time (100 µs/div) Figure 32. CCM to DCM Transition Figure 33. DCM to CCM Transition Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: TPS53315 23 TPS53315 SLUSAE6A – DECEMBER 2010 – REVISED DECEMBER 2015 www.ti.com Skip Mode VIN = 12 V FCCM VIN = 12 V VOUT = 1.1 V VOUT (20 mV/div) IOUT from 0 A to 5 A, 2.5A/µs VOUT = 1.1 V IOUT (5 A/div) IOUT (5 A/div) Time (2 µs/div) Time (100 µs/div) Figure 34. FCCM Load Transient VOUT (1 V/div) VOUT (20 mV/div) IOUT from 0 A to 5 A, 2.5A/µs Figure 35. Skip Mode Load Transient VIN = 12 V IOUT from 10 A to 15 A EN (5 V/div) LL (10 V/div) VOUT (1 V/div) IL (10 A/div) PGOOD (5 V/div) PGOOD (5 V/div) VIN = 12 V IOUT = 10 A Time (1 s/div) Time (10 ms/div) Figure 36. Overcurrent Protection Figure 37. Over-temperature Protection 9 Power Supply Recommendations The device is designed to operate from an input voltage supply range between 3 V and 15 V (4.5-V to 25-V biased). This input supply must be well regulated. Proper bypassing of input supplies and internal regulators is also critical for noise performance, as is PCB layout and grounding scheme. See the recommendations in the Layout section. 24 Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: TPS53315 TPS53315 www.ti.com SLUSAE6A – DECEMBER 2010 – REVISED DECEMBER 2015 10 Layout 10.1 Layout Guidelines Certain points must be considered before starting a layout work using the TPS53315. • The power components (including input/output capacitors, inductor and TPS53315) should be placed on one side of the PCB (solder side). Other small signal components should be placed on another side (component side). At least one inner plane should be inserted, connected to ground, in order to shield and isolate the small signal traces from noisy power lines. • All sensitive analog traces and components such as VFB, PGOOD, TRIP, MODE and RF should be placed away from high-voltage switching nodes such as LL, VBST to avoid coupling. Use internal layer(s) as ground plane(s) and shield feedback trace from power traces and components. • Place the VIN decoupling capacitors as close to the VIN and PGND pins as possible to minimize the input AC current loop. • Since the TPS53315 controls output voltage referring to voltage across the VOUT capacitor, the top-side resistor of the voltage divider should be connected to the positive node of VOUT capacitor. In a same manner both bottom side resistor and GND pad of the device should be connected to the negative node of VOUT capacitor. The trace from these resistors to the VFB pin should be short and thin. Place on the component side and avoid via(s) between these resistors and the device. • Connect the overcurrent setting resistors from TRIP pin to ground and make the connections as close as possible to the device. The trace from TRIP pin to resistor and from resistor to ground should avoid coupling to a high-voltage switching node. • Connect the frequency setting resistor from RF pin to ground, or to the VREG pin, and make the connections as close as possible to the device. The trace from the RF pin to the resistor and from the resistor to ground should avoid coupling to a high-voltage switching node. • Connect the MODE setting resistor from MODE pin to ground, or to the PGOOD pin, and make the connections as close as possible to the device. The trace from the MODE pin to the resistor and from the resistor to ground should avoid coupling to a high-voltage switching node. • The PCB trace defined as switch node, which connects the LL pins and high-voltage side of the inductor, should be as short and wide as possible. Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: TPS53315 25 TPS53315 SLUSAE6A – DECEMBER 2010 – REVISED DECEMBER 2015 www.ti.com 10.2 Layout Example Keep VFB trace short and away from noisy signals Bottom side components and trace GND shape VFB GND VDD EN GND TRIP GND PGOOD VREG VREG Vout shape VBST GND shape Vin shape LL shape Figure 38. Layout Recommendation 10.3 Thermal Considerations Figure 39 shows the thermal signature of the TPS53315 EVM at a switching frequency of 500 kHz. Figure 40 shows the thermal signature of the TPS53315 EVM at a switching frequency of 650 kHz VIN = 12 V fSW = 500 kHz IOUT= 12 A VOUT = 1.1 V TA = 25°C with no airflow Figure 39. Thermal Signature of TPS53315 EVM 26 VIN = 12 V fSW = 650 kHz IOUT= 12 A VOUT = 3.3 V TA = 25°C with no airflow Figure 40. Thermal Signature of TPS53315 EVM Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: TPS53315 TPS53315 www.ti.com SLUSAE6A – DECEMBER 2010 – REVISED DECEMBER 2015 11 Device and Documentation Support 11.1 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 11.2 Trademarks Eco-mode, D-CAP, E2E are trademarks of Texas Instruments. All other trademarks are the property of their respective owners. 11.3 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 11.4 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: TPS53315 27 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) TPS53315RGFR ACTIVE VQFN RGF 40 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 TPS 53315 TPS53315RGFT ACTIVE VQFN RGF 40 250 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 TPS 53315 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of