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TPS62293DRVRG4

TPS62293DRVRG4

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    WDFN6_EP

  • 描述:

    IC REG BUCK 1.8V 1A SYNC 6SON

  • 数据手册
  • 价格&库存
TPS62293DRVRG4 数据手册
Order Now Product Folder Technical Documents Support & Community Tools & Software TPS62290, TPS62291, TPS62293 SLVS764G – JUNE 2007 – REVISED APRIL 2018 TPS6229x 1-A Step Down Converter in 2 x 2 DRV Package 1 Features 3 Description • • • The TPS6229x devices are highly efficient synchronous step down DC/DC converters optimized for battery powered portable applications. They provide up to 1000-mA output current from a single Li-ion cell. 1 • • • • • • • • High Efficiency - up to 96% Output Current up to 1000 mA VIN Range From 2.3 V to 6.0V for Li-ion Batteries with Extended Voltage Range 2.25-MHz Fixed Frequency Operation Power Save Mode at Light Load Currents Output Voltage Accuracy in PWM Mode ±1.5% Fixed Output Voltage Options Typical 15-μA Quiescent Current 100% Duty Cycle for Lowest Dropout Voltage Positioning at Light Loads Available in a 2-mm × 2-mm × 0.8-mm WSON (6) Package (DRV) 2 Applications • • • • • • Mobile Phones, Smart-Phones Wireless LAN Pocket PCs Low Power DSP Supply Portable Media Players Point-of-Load (POL) Applications With an input voltage range of 2.3 V to 6.0 V, the devices support batteries with extended voltage range and are ideal to power portable applications like mobile phones and other portable equipment. The TPS6229x devices operate at 2.25-MHz fixed switching frequency and enter power save mode operation at light load currents to maintain high efficiency over the entire load current range. The power save mode is optimized for low output voltage ripple. For low noise applications, the devices can be forced into fixed frequency pulse width modulation (PWM) mode by pulling the MODE pin high. In the shutdown mode, the current consumption is reduced to less than 1 μA. The TPS6229x devices allow the use of small inductors and capacitors to achieve a small solution size. The TPS6229x devices operate over a free air temperature range of –40°C to 85°C. The devices are available in a 2-mm × 2-mm 6-pin WSON package (DRV). Device Information(1) PART NUMBER TPS6229x PACKAGE BODY SIZE (NOM) SON (6) 2.00 mm × 2.00 mm (1) For all available packages, see the orderable addendum at the end of the datasheet. Typical Application Schematic TPS62290DRV VIN CIN SW R1 EN 360 kW 10 mF GND MODE L1 2.2 mH C1 22 pF 100 VIN = 4.2 V 90 VIN = 3.8 V COUT 80 FB R2 180 kW Efficiency - % VIN 2.7 V to 6.0 V Efficiency vs Output Current VOUT 1.8 V, 1000 mA 70 VIN = 5 V VIN = 4.5 V 60 50 40 VOUT = 3.3 V, MODE = GND, L = 2.2 mH 30 0.00001 0.0001 0.001 0.01 0.1 IO - Output Current - A 1 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TPS62290, TPS62291, TPS62293 SLVS764G – JUNE 2007 – REVISED APRIL 2018 www.ti.com Table of Contents 1 2 3 4 5 6 7 8 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Device Comparison Table..................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 3 4 7.1 7.2 7.3 7.4 7.5 7.6 4 4 4 4 5 6 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics .......................................... Typical Characteristics .............................................. Detailed Description .............................................. 7 8.1 Overview ................................................................... 7 8.2 Functional Block Diagram ......................................... 7 8.3 Feature Description................................................... 7 8.4 Device Functional Modes.......................................... 9 9 Application and Implementation ........................ 11 9.1 Application Information............................................ 11 9.2 Typical Application .................................................. 11 9.3 System Examples ................................................... 17 10 Power Supply Recommendations ..................... 18 11 Layout................................................................... 18 11.1 Layout Guidelines ................................................. 18 11.2 Layout Example .................................................... 18 12 Device and Documentation Support ................. 19 12.1 12.2 12.3 12.4 12.5 12.6 Device Support...................................................... Related Links ........................................................ Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 19 19 19 19 19 19 13 Mechanical, Packaging, and Orderable Information ........................................................... 19 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision F (January 2016) to Revision G Page • Changed Equation 3 operator from × to + in correcting the ILmax formula. ....................................................................... 12 • Added cross references to the Third-party Products disclaimer. ........................................................................................ 12 Changes from Revision E (September 2015) to Revision F • Page Added Device Comparison Table .......................................................................................................................................... 3 Changes from Revision D (November 2009) to Revision E • 2 Page Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1 Submit Documentation Feedback Copyright © 2007–2018, Texas Instruments Incorporated Product Folder Links: TPS62290 TPS62291 TPS62293 TPS62290, TPS62291, TPS62293 www.ti.com SLVS764G – JUNE 2007 – REVISED APRIL 2018 5 Device Comparison Table OUTPUT VOLTAGE (1) DEVICE MARKING (2) TPS62290 Adjustable BYN TPS62291 3.3 V fixed CFY TPS62293 1.8 V fixed CFD PART NUMBER (1) (2) Contact TI for other fixed output voltage options For the most current package and ordering information, see Mechanical, Packaging, and Orderable Information, or see the TI website at www.ti.com 6 Pin Configuration and Functions DRV Package 6-PIN SON Top View SW MODE FB 1 2 3 ed os al p m Ex her ad T P 6 5 4 GND VIN EN Pin Functions PIN NAME NO. TYPE DESCRIPTION EN 4 IN This is the enable pin of the device. Pulling this pin to low forces the device into shutdown mode. Pulling this pin to high enables the device. This pin must be terminated. FB 3 IN Feedback pin for the internal regulation loop. Connect the external resistor divider to this pin. In case of fixed output voltage option, connect this pin directly to the output capacitor GND 6 PWR MODE 2 IN MODE pin = High forces the device to operate in fixed-frequency PWM mode. Mode pin = Low enables the power save mode with automatic transition from PFM mode to fixed-frequency PWM mode. SW 1 OUT This is the switch pin and is connected to the internal MOSFET switches. Connect the external inductor between this terminal and the output capacitor. VIN 5 PWR VIN power supply pin. Exposed Thermal Pad GND supply pin Connect the exposed thermal pad to GND. Copyright © 2007–2018, Texas Instruments Incorporated Product Folder Links: TPS62290 TPS62291 TPS62293 Submit Documentation Feedback 3 TPS62290, TPS62291, TPS62293 SLVS764G – JUNE 2007 – REVISED APRIL 2018 www.ti.com 7 Specifications 7.1 Absolute Maximum Ratings Over operating free-air temperature range (unless otherwise noted) (1) VIN MIN MAX –0.3 7 Voltage range at EN, MODE –0.3 VIN +0.3, ≤ 7 Voltage at SW –0.3 7 Input voltage range (2) Peak output current A Maximum operating junction temperature –40 125 Tstg Storage temperature –65 150 (2) V Internally limited TJ (1) UNIT °C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to network ground terminal. 7.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) ±2000 Charged-device model (CDM), per JEDEC specification JESD22-C101 (2) ±1000 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.3 Recommended Operating Conditions MIN VIN Supply voltage NOM MAX 2.3 6 UNIT V Output voltage range for adjustable voltage 0.6 VIN V TA Operating ambient temperature –40 85 °C TJ Operating junction temperature –40 125 °C 7.4 Thermal Information TPS6229x THERMAL METRIC (1) DRV (SON) UNIT 6 PINS RθJA Junction-to-ambient thermal resistance 67.8 °C/W RθJC(top) Junction-to-case (top) thermal resistance 88.6 °C/W RθJB Junction-to-board thermal resistance 37.2 °C/W ψJT Junction-to-top characterization parameter 2 °C/W ψJB Junction-to-board characterization parameter 37.6 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance 7.9 °C/W (1) 4 For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. Submit Documentation Feedback Copyright © 2007–2018, Texas Instruments Incorporated Product Folder Links: TPS62290 TPS62291 TPS62293 TPS62290, TPS62291, TPS62293 www.ti.com SLVS764G – JUNE 2007 – REVISED APRIL 2018 7.5 Electrical Characteristics Over full operating ambient temperature range, typical values are at TA = 25°C. Unless otherwise noted, specifications apply for condition VIN = EN = 3.6 V. External components CIN = 4.7 μF 0603, COUT = 10 μF 0603, L = 2.2 μH, refer to parameter measurement information. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SUPPLY VIN Input voltage IOUT Output current 2.3 6 VIN 2.7 V to 6 V IQ Operating quiescent current ISD Shutdown current UVLO 1000 VIN 2.5 V to 2.7 V 600 VIN 2.3 V to 2.5 V 300 mA IOUT = 0 mA, PFM mode enabled (MODE = GND) device not switching, See (1) 15 μA IOUT = 0 mA, switching with no load (MODE = VIN) PWM operation, VOUT = 1.8 V, VIN = 3 V 3.8 mA EN = GND Undervoltage lockout threshold V 0.1 Falling 1.85 Rising 1.95 1 μA V ENABLE, MODE VIH High level input voltage, EN, MODE 2.3 V ≤ VIN ≤ 6 V 1 VIN VIL Low level input voltage, EN, MODE 2.3 V ≤ VIN ≤ 6 V 0 0.4 IIN Input bias current, EN, MODE EN, MODE = GND or VIN 0.01 1 240 480 185 380 1.4 1.68 V V μA POWER SWITCH RDS(on) ILIMF TSD High side MOSFET on-resistance Low side MOSFET on-resistance VIN = VGS = 3.6 V, TA = 25°C Forward current limit MOSFET high-side and low side VIN = VGS = 3.6 V Thermal shutdown Increasing junction temperature 140 Thermal shutdown hysteresis Decreasing junction temperature 20 1.19 mΩ A °C OSCILLATOR fSW 2.3 V ≤ VIN ≤ 6 V Oscillator frequency 2.0 2.25 2.5 MHz OUTPUT VOUT Adjustable output voltage range Vref Reference voltage 0.6 VFB(PWM) Feedback voltage PWM mode MODE = VIN, PWM operation, 2.3 V ≤ VIN ≤ 6 V, See (2) VFB(PFM) Feedback voltage PFM mode MODE = GND, device in PFM mode, +1% voltage positioning active, See (1) VI 600 –1.5% Load regulation 0% 1.5% 1% –0.5 tStart Up Start-up time Time from active EN to reach 95% of VOUT 500 tRamp VOUT ramp-up time Time to ramp from 5% to 95% of VOUT 250 Ilkg Leakage current into SW pin VIN = 3.6 V, VIN = VOUT = VSW, EN = GND, See (3) 0.1 (1) (2) (3) V mV %/A μs μs 1 μA In PFM mode, the internal reference voltage is set to typical 1.01 × Vref . See the parameter measurement information. For VIN = VOUT + 1.0 V In fixed output voltage versions, the internal resistor divider network is disconnected from FB pin. Copyright © 2007–2018, Texas Instruments Incorporated Product Folder Links: TPS62290 TPS62291 TPS62293 Submit Documentation Feedback 5 TPS62290, TPS62291, TPS62293 SLVS764G – JUNE 2007 – REVISED APRIL 2018 www.ti.com 7.6 Typical Characteristics 0.8 20 MODE == GND, GND MODE EN == VIN, VIN EN Device Not Not Switching Switching Device 0.7 IQ – Quiescent Current – mA 18 0.6 o TA = 85 C 0.5 0.4 0.3 0.2 o 16 o C TTAA = 25°C 14 12 C TTAA == –40 -40o°C o TA = 25 C TA = -40 C 10 0.1 0 2 2.5 3 3.5 4 4.5 5 5.5 8 8 222 6 2.5 3 VIN − Input Voltage − V High Side Switching 0.7 0.6 o TA = 85 C 0.5 o TA = 25 C 0.4 0.3 0.2 o TA = -40 C 0.1 0 2.5 3 3.5 4 4.5 5 VIN − Input Voltage − V Figure 3. Static Drain-Source On-State Resistance vs Input Voltage Submit Documentation Feedback 55 4.5 4.5 44 5.5 5.5 66 Figure 2. Quiescent Current vs Input Voltage RDS(on) - Static Drain-Source On-State Resistance − W RDS(on) - Static Drain-Source On-State Resistance − W 0.8 2 3.5 V VIN InputVoltage Voltage–−VV IN–−Input Figure 1. Shutdown Current Into VIN vs Input Voltage 6 o TTAA == 85 85°C IQ - Quiescent Current − mA ISD - Shutdown Current Into VIN − mA EN = GND 0.4 Low Side Switching 0.35 0.3 o TA = 85 C 0.25 o TA = 25 C 0.2 0.15 0.1 o TA = -40 C 0.05 0 2 2.5 3 3.5 4 4.5 5 VIN − Input Voltage − V Figure 4. Static Drain-Source On-State Resistance vs Input Voltage Copyright © 2007–2018, Texas Instruments Incorporated Product Folder Links: TPS62290 TPS62291 TPS62293 TPS62290, TPS62291, TPS62293 www.ti.com SLVS764G – JUNE 2007 – REVISED APRIL 2018 8 Detailed Description 8.1 Overview The TPS6229x step down converters operate with typically 2.25-MHz fixed frequency pulse width modulation (PWM) mode at moderate to heavy load currents. At light load currents, the converters can automatically enter power save mode and operate then in pulse frequency modulation (PFM) mode. During PWM operation, the converters use a unique fast response voltage mode controller scheme with input voltage feed-forward to achieve good line and load regulation allowing the use of small ceramic input and output capacitors. At the beginning of each clock cycle initiated by the clock signal, the high side MOSFET switch is turned on. The current flows now from the input capacitor via the high side MOSFET switch through the inductor to the output capacitor and load. During this phase, the current ramps up until the PWM comparator trips and the control logic will turn off the switch. The current limit comparator also turns off the switch in case the current limit of the high side MOSFET switch is exceeded. After a dead time preventing shoot through current, the low side MOSFET rectifier is turned on and the inductor current ramps down. The current flows now from the inductor to the output capacitor and to the load. It returns to the inductor through the low side MOSFET rectifier. The next cycle is initiated by the clock signal again turning off the low side MOSFET rectifier and turning on the high side MOSFET switch. 8.2 Functional Block Diagram VIN Current Limit Comparator VIN Undervoltage Lockout 1.8 V Thermal Shutdown Limit High Side EN Reference 0.6 V VREF FB PFM Comp . +1% Voltage positioning VREF + 1% Mode MODE Softstart VOUT RAMP CONTROL Error Amp Control Stage Gate Driver Anti Shoot-Through SW1 VREF Integrator FB FB Zero-Pole AMP. PWM Comp . Limit RI1 GND Low Side RI3 RI..N Int. Resistor Network Sawtooth Generator Current Limit Comparator 2.25 MHz Oscillator GND 8.3 Feature Description 8.3.1 Dynamic Voltage Positioning This feature reduces the voltage undershoots/overshoots at load steps from light to heavy load and vice versa. It is active in power save mode and regulates the output voltage 1% higher than the nominal value. This provides more headroom for both the voltage drop at a load step, and the voltage increase at a load throw-off. Copyright © 2007–2018, Texas Instruments Incorporated Product Folder Links: TPS62290 TPS62291 TPS62293 Submit Documentation Feedback 7 TPS62290, TPS62291, TPS62293 SLVS764G – JUNE 2007 – REVISED APRIL 2018 www.ti.com Feature Description (continued) Output voltage Voltage Positioning Vout +1% PFM Comparator threshold Light load PFM Mode Vout (PWM) moderate to heavy load PWM Mode Figure 5. Power Save Mode Operation 8.3.2 Enable The device is enabled by setting EN pin to high. During the start up time tStart Up the internal circuits are settled and the soft start circuit is activated. The EN input can be used to control power sequencing in a system with various DC/DC converters. The EN pin can be connected to the output of another converter, to drive the EN pin high and getting a sequencing of supply rails. With EN = GND, the device enters shutdown mode, in which all internal circuits are disabled. In fixed output voltage versions, the internal resistor divider network is disconnected from FB pin. 8.3.3 Mode Selection The MODE pin allows mode selection between forced PWM mode and power save mode. Connecting this pin to GND enables the power save mode with automatic transition between PWM and PFM mode. Pulling the MODE pin high forces the converter to operate in fixed frequency PWM mode even at light load currents. This allows simple filtering of the switching frequency for noise sensitive applications. In this mode, the efficiency is lower compared to the power save mode during light loads. The condition of the MODE pin can be changed during operation and allows efficient power management by adjusting the operation mode of the converter to the specific system requirements. 8.3.4 Undervoltage Lockout The undervoltage lockout circuit prevents the device from malfunctioning at low input voltages and from excessive discharge of the battery and disables the output stage of the converter. The undervoltage lockout threshold is typically 1.85 V with falling VIN. 8.3.5 Thermal Shutdown As soon as the junction temperature, TJ, exceeds 140°C (typical) the device goes into thermal shutdown. In this mode, the high side and low side MOSFETs are turned-off. The device continues its operation when the junction temperature falls below the thermal shutdown hysteresis. 8 Submit Documentation Feedback Copyright © 2007–2018, Texas Instruments Incorporated Product Folder Links: TPS62290 TPS62291 TPS62293 TPS62290, TPS62291, TPS62293 www.ti.com SLVS764G – JUNE 2007 – REVISED APRIL 2018 8.4 Device Functional Modes 8.4.1 Soft-Start The TPS6229x has an internal soft start circuit that controls the ramp up of the output voltage. The output voltage ramps up from 5% to 95% of its nominal value within typical 250 μs. This limits the inrush current in the converter during ramp up and prevents possible input voltage drops when a battery or high impedance power source is used. The soft start circuit is enabled within the start up time tStart Up. 8.4.2 Power Save Mode The power save mode is enabled with MODE pin set to low level. If the load current decreases, the converter will enter power save mode operation automatically. During power save mode the converter skips switching and operates with reduced frequency in PFM mode with a minimum quiescent current to maintain high efficiency. The converter will position the output voltage typically +1% above the nominal output voltage. This voltage positioning feature minimizes voltage drops caused by a sudden load step. The transition from PWM mode to PFM mode occurs once the inductor current in the low side MOSFET switch becomes zero, which indicates discontinuous conduction mode. During the power save mode the output voltage is monitored with a PFM comparator. As the output voltage falls below the PFM comparator threshold of VOUT nominal +1%, the device starts a PFM current pulse. The high side MOSFET switch will turn on and the inductor current ramps up. After the on-time expires, the switch is turned off and the low side MOSFET switch is turned on until the inductor current becomes zero. The converter effectively delivers a current to the output capacitor and the load. If the load is below the delivered current, the output voltage will rise. If the output voltage is equal or higher than the PFM comparator threshold, the device stops switching and enters a sleep mode with typical 15 μA current consumption. If the output voltage is still below the PFM comparator threshold, a sequence of further PFM current pulses are generated until the PFM comparator threshold is reached. The converter starts switching again once the output voltage drops below the PFM comparator threshold. With a fast single threshold comparator, the output voltage ripple during PFM mode operation can be kept small. The PFM pulse is time controlled, which allows to modify the charge transferred to the output capacitor by the value of the inductor. The resulting PFM output voltage ripple and PFM frequency depend in first order on the size of the output capacitor and the inductor value. Increasing output capacitor values and inductor values will minimize the output ripple. The PFM frequency decreases with smaller inductor values and increases with larger values. The PFM mode is left and PWM mode entered in case the output current can not longer be supported in PFM mode. The power save mode can be disabled through the MODE pin set to high. The converter will then operate in fixed frequency PWM mode. 8.4.3 100% Duty Cycle Low Dropout Operation The device starts to enter 100% duty cycle mode once the input voltage comes close to the nominal output voltage. In order to maintain the output voltage, the high side MOSFET switch is turned on 100% for one or more cycles. With further decreasing VIN the high side MOSFET switch is turned on completely. In this case, the converter offers a low input-to-output voltage difference. This is particularly useful in battery-powered applications to achieve longest operation time by taking full advantage of the whole battery voltage range. The minimum input voltage to maintain regulation depends on the load current and output voltage, and can be calculated as: VINmin = VOUTmax + (IOUTmax × (RDS(on)max + RL)) where • • • • IOUTmax = Maximum output current plus inductor ripple current RDS(on)max = Maximum P-channel switch RDS(on) RL = DC resistance of the inductor VOUTmax = Nominal output voltage plus maximum output voltage tolerance Copyright © 2007–2018, Texas Instruments Incorporated Product Folder Links: TPS62290 TPS62291 TPS62293 Submit Documentation Feedback (1) 9 TPS62290, TPS62291, TPS62293 SLVS764G – JUNE 2007 – REVISED APRIL 2018 www.ti.com Device Functional Modes (continued) 8.4.4 Short-Circuit Protection The high side and low side MOSFET switches are short-circuit protected with maximum switch current equal to ILIMF. The current in the switches is monitored by current limit comparators. Once the current in the high side MOSFET switch exceeds the threshold of its current limit comparator, it turns off and the low side MOSFET switch is activated to ramp down the current in the inductor and high side MOSFET switch. The high side MOSFET switch can only turn on again, once the current in the low side MOSFET switch has decreased below the threshold of its current limit comparator. 10 Submit Documentation Feedback Copyright © 2007–2018, Texas Instruments Incorporated Product Folder Links: TPS62290 TPS62291 TPS62293 TPS62290, TPS62291, TPS62293 www.ti.com SLVS764G – JUNE 2007 – REVISED APRIL 2018 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information The TPS6229x devices are high-efficiency synchronous step-down DC/DC converters featuring power save mode or 2.25-MHz fixed frequency operation. 9.2 Typical Application VIN 2.3 V to 6.0 V TPS62290DRV VIN CIN 2.2 mH SW R1 EN 10 mF GND L1 360 kW VOUT 1.8 V, Up to 1A C1 22 pF COUT FB 10 mF R2 MODE 180 kW Figure 6. TPS62290DRV Adjustable 1.8 V 9.2.1 Design Requirements The design guideline provides a component selection to operate the device within the recommended operating condition. Table 1 shows the list of components for the Application Characterstic Curves. Table 1. List of Components COMPONENT REFERENCE PART NUMBER MANUFACTURER (1) VALUE CIN GRM188R60J106M Murata 10 μF, 6.3 V. X5R Ceramic COUT GRM188R60J106M Murata 10 μF, 6.3 V. X5R Ceramic Murata 22 pF, COG Ceramic Coilcraft 2.2 μH, 110 mΩ C1 L1 LPS3015 R1, R2 Values depending on the programmed output voltage (1) See Third-party Products disclaimer 9.2.2 Detailed Design Procedure 9.2.2.1 Output Voltage Setting The output voltage can be calculated to: æ R ö VOUT = VREF ´ ç 1 + 1 ÷ è R2 ø with an internal reference voltage VREF typical 0.6 V. To minimize the current through the feedback divider network, R2 should be 180 kΩ or 360 kΩ. The sum of R1 and R2 should not exceed ~1MΩ, to keep the network robust against noise. An external feed forward capacitor C1 is required for optimum load transient response. The value of C1 should be in the range between 22 pF and 33 pF. Route the FB line away from noise sources, such as the inductor or the SW line. Copyright © 2007–2018, Texas Instruments Incorporated Product Folder Links: TPS62290 TPS62291 TPS62293 Submit Documentation Feedback 11 TPS62290, TPS62291, TPS62293 SLVS764G – JUNE 2007 – REVISED APRIL 2018 www.ti.com 9.2.2.2 Output Filter Design (Inductor and Output Capacitor) The TPS6229x is designed to operate with inductors in the range of 1.5 μH to 4.7 μH and with output capacitors in the range of 4.7 μF to 22 μF. The part is optimized for operation with a 2.2-μH inductor and 10-μF output capacitor. Larger or smaller inductor values can be used to optimize the performance of the device for specific operation conditions. For stable operation, the L and C values of the output filter may not fall below 1-μH effective inductance and 3.5-μF effective capacitance. 9.2.2.2.1 Inductor Selection The inductor value has a direct effect on the ripple current. The selected inductor has to be rated for its DC resistance and saturation current. The inductor ripple current (ΔIL) decreases with higher inductance and increases with higher VIN or VOUT. The inductor selection has also impact on the output voltage ripple in PFM mode. Higher inductor values will lead to lower output voltage ripple and higher PFM frequency, lower inductor values will lead to a higher output voltage ripple but lower PFM frequency. Equation 2 calculates the maximum inductor current under static load conditions. The saturation current of the inductor should be rated higher than the maximum inductor current as calculated with Equation 3. This is recommended because during heavy load transient the inductor current will rise above the calculated value. VOUT VIN DIL = VOUT ´ L´f DI ILmax = IOUTmax + L 2 1- (2) where • • • • f = Switching frequency (2.25 MHz typical) L = Inductor value ΔIL = Peak-to-peak inductor ripple current ILmax = Maximum inductor current (3) A more conservative approach is to select the inductor current rating just for the maximum switch current of the corresponding converter. Accepting larger values of ripple current allows the use of low inductance values, but results in higher output voltage ripple, greater core losses, and lower output current capability. The total losses of the coil have a strong impact on the efficiency of the DC/DC conversion and consist of both the losses in the DC resistance R(DC)) and the following frequency-dependent components: • The losses in the core material (magnetic hysteresis loss, especially at high switching frequencies) • Additional losses in the conductor from the skin effect (current displacement at high frequencies) • Magnetic field losses of the neighboring windings (proximity effect) • Radiation losses Table 2. List of Inductors 3 DIMENSIONS [mm ] (1) 12 SUPPLIER (1) INDUCTOR TYPE 3 × 3 × 1.5 LPS3015 Coilcraft 3 x 3 x 1.5 LQH3NPN2R2NM0 MURATA 3.2 x 2.6 x 1.2 MIPSA3226D2R2 FDK See Third-party Products disclaimer Submit Documentation Feedback Copyright © 2007–2018, Texas Instruments Incorporated Product Folder Links: TPS62290 TPS62291 TPS62293 TPS62290, TPS62291, TPS62293 www.ti.com SLVS764G – JUNE 2007 – REVISED APRIL 2018 9.2.2.2.2 Output Capacitor Selection The advanced fast-response voltage mode control scheme of the TPS6229x allows the use of tiny ceramic capacitors. Ceramic capacitors with low ESR values have the lowest output voltage ripple and are recommended. The output capacitor requires either an X7R or X5R dielectric. Y5V and Z5U dielectric capacitors, aside from their wide variation in capacitance over temperature, become resistive at high frequencies. At nominal load current, the device operates in PWM mode and the RMS ripple current is calculated as: VOUT VIN æ 1 ö ´ç ÷ L´f è 2´ 3 ø 1IRMSCOUT = VOUT ´ (4) At nominal load current, the device operates in PWM mode and the overall output voltage ripple is the sum of the voltage spike caused by the output capacitor ESR plus the voltage ripple caused by charging and discharging the output capacitor: VOUT VIN æ 1 ö ´ç + ESR ÷ L´f 8 ´ Cout ´ f è ø 1DVOUT = VOUT ´ (5) At light load currents the converter operates in power save mode and the output voltage ripple is dependent on the output capacitor and inductor value. Larger output capacitor and inductor values minimize the voltage ripple in PFM mode and tighten DC output accuracy in PFM mode. 9.2.2.2.3 Input Capacitor Selection The buck converter has a natural pulsating input current; therefore, a low ESR input capacitor is required for best input voltage filtering and minimizing the interference with other circuits caused by high input voltage spikes. For most applications, a 10-μF ceramic capacitor is recommended. The input capacitor can be increased without any limit for better input voltage filtering. Take care when using only small ceramic input capacitors. When a ceramic capacitor is used at the input and the power is being supplied through long wires, such as from a wall adapter, a load step at the output or VIN step on the input can induce ringing at the VIN pin. The ringing can couple to the output and be mistaken as loop instability or could even damage the part by exceeding the maximum ratings. Table 3. List of Capacitor CAPACITANCE 10 μF (1) TYPE GRM188R60J106M69D SUPPLIER (1) SIZE 3 0603 1.6 × 0.8 × 0.8 mm Murata See Third-party Products disclaimer Copyright © 2007–2018, Texas Instruments Incorporated Product Folder Links: TPS62290 TPS62291 TPS62293 Submit Documentation Feedback 13 TPS62290, TPS62291, TPS62293 SLVS764G – JUNE 2007 – REVISED APRIL 2018 www.ti.com 9.2.3 Application Curves 100 100 VIN = 2.7 V 90 L = 2.2 mH VIN = 3.3 V VIN = 3.3 V VIN = 4.5 V Efficiency - % Efficiency - % 80 VIN = 3.6 V 80 70 VIN = 5 V 60 50 30 0.01 VIN = 2.7 V VIN = 5 V 60 VIN = 4.5 V 50 VIN = 3.6 V 30 20 0.1 100 10 1 IO - Output Current - mA 1000 Figure 7. Efficiency (Power Save Mode) vs Output Current, VOUT = 1.8 V 100 10 IO - Output Current - mA 1 1000 Figure 8. Efficiency (Forced PWM Mode) vs Output Current, VOUT = 1.8 V 100 100 VIN = 4.2 V VIN = 3.8 V VIN = 3.8 V 80 VIN = 5 V 70 Efficiency - % VIN = 4.5 V 70 60 60 VIN = 4.5 V 50 40 30 50 VOUT = 3.3 V, MODE = GND, L = 2.2 mH 40 30 0.01 VIN = 4.2 V 90 VIN = 5 V 80 Efficiency - % 70 40 VOUT = 1.8 V, MODE = GND, L = 2.2 mH 40 90 VOUT = 1.8 V, MODE = VIN, 90 20 VOUT = 3.3 V, MODE = VIN, 10 L = 2.2 mH 0 0.1 100 10 1 IO - Output Current - mA 1000 Figure 9. Efficiency (Power Save Mode) vs Output Current, VOUT = 3.3 V 100 10 IO - Output Current - mA 1 1000 Figure 10. Efficiency (Forced PWM Mode) vs Output Current, VOUT = 3.3 V 1.854 1.90 MODE = VIN, MODE = GND, L = 2.2 mH L = 2.2 mH 1.836 1.88 VIN = 3.6 V, TA = -40°C 1.818 DC Output Voltage - V DC Output Voltage - V VIN = 2.7 V, TA = -40°C VIN = 4.5 V, TA = -40°C 1.8 1.782 VIN = 2.7 V, TA = 25°C VIN = 3.6 V, TA = 25°C 1.764 1.746 0.01 VIN = 4.5 V, TA = 85°C VIN = 4.5 V, TA = 25°C 0.1 VIN = 3.6 V, TA = 85°C Submit Documentation Feedback VI = 3.6 V, TA = -40°C 1.84 1.82 VI = 2.7 V, TA = -40°C VI = 4.5 V, TA = -40°C PWM Mode VI = 4.5 V, TA = 85°C VI = 3.6 V, TA = 85°C VI = 4.5 V, TA = 25°C 1000 Figure 11. Output Voltage Accuracy (1.8-V Forced PWM Mode) vs Output Current 14 PFM Mode, Voltage Positioning On 1.80 VI = 2.7 V, TA = 85°C VIN = 2.7 V, TA = 85°C 1 10 100 IO - Output Current - mA 1.86 1.78 0.01 VI = 3.6 V, TA = 25°C VI = 2.7 V, TA = 25°C 0.1 1 10 100 IO - Output Current - mA 1000 Figure 12. Output Voltage Accuracy (1.8-V Power Save Mode) vs Output Current Copyright © 2007–2018, Texas Instruments Incorporated Product Folder Links: TPS62290 TPS62291 TPS62293 TPS62290, TPS62291, TPS62293 www.ti.com SLVS764G – JUNE 2007 – REVISED APRIL 2018 3.50 3.40 VO = 3.3 V, MODE = VI, 3.38 L = 2.2 mH 3.32 3.45 DC Output Voltage - V DC Output Voltage - V 3.36 3.34 Mode = GND, L = 2.2 mH TA = 25°C TA = -40°C 3.30 3.28 TA = 85°C 3.26 VI = 3.7 V, 4.2 V, 4.5 V 3.24 PFM Mode, Voltage Positioning On 3.40 VI = 4.5 V, TA = -40°C VI = 4.2 V, TA = -40°C 3.35 VI = 4.5 V, TA = 25°C VI = 4.2 V, TA = 25°C 3.30 3.22 3.20 0.01 0.1 1 10 100 IO - Output Current - mA 1000 Figure 13. Output Voltage Accuracy 3.3-V Forced PWM Mode vs Output Current PWM Mode VI = 4.5 V, TA = 85°C VI = 4.2 V, TA = 85°C 3.25 0.01 1 10 100 IO - Output Current - mA 0.1 1000 Figure 14. Output Voltage Accuracy 3.3-V Power Save Mode vs Output Current VIN 3.6 V, VOUT 1.8 V, IOUT 150 mA, VOUT 20 mV/Div VOUT 10 mV/Div L 2.2 mH, COUT 10 mF 0603 VIN 3.6 V, VOUT 1.8 V, IOUT 10 mA, SW 2 V/Div L 2.2 mH, COUT 10 mF 0603 SW 2 V/Div Icoil 200 mA/Div Icoil 200 mA/Div Time Base - 10 ms/Div Time Base - 10 ms/Div Figure 15. Typical Operation vs PFM Mode SW 2V/Div Figure 16. Typical Operation vs PWM Mode VIN 3.6 V, VOUT 1.8 V, IOUT 300 mA to 800 mA, MODE = GND VOUT 100 mV/Div VOUT 50 mV/Div IOUT 500 mA/Div VIN 3.6 V, VOUT 1.8 V, IOUT 50 mA to 250 mA, 250 mA MODE = GND 50 mA 800 mA 300 mA IOUT 200 mA/Div Icoil 500 mA/Div Icoil 500 mA/Div Time Base - 20 ms/Div Figure 17. PFM Load Transient Time Base - 20 ms/Div Figure 18. PFM Line Transient Copyright © 2007–2018, Texas Instruments Incorporated Product Folder Links: TPS62290 TPS62291 TPS62293 Submit Documentation Feedback 15 TPS62290, TPS62291, TPS62293 SLVS764G – JUNE 2007 – REVISED APRIL 2018 VIN 3.6 V to 4.2 V 500 mV/Div VIN 3.6 V to 4.2 V, 500 mV/Div VOUT = 1.8 V, 50 mV/Div, IOUT = 50 mA, MODE = GND VOUT = 1.8 V, 50 mV/Div, IOUT = 250 mA, MODE = GND Time Base - 100 ms/Div Figure 19. PWM Load Transient 16 Submit Documentation Feedback www.ti.com Time Base - 100 ms/Div Figure 20. PWM Line Transient Copyright © 2007–2018, Texas Instruments Incorporated Product Folder Links: TPS62290 TPS62291 TPS62293 TPS62290, TPS62291, TPS62293 www.ti.com SLVS764G – JUNE 2007 – REVISED APRIL 2018 9.3 System Examples L1 TPS62290DRV VIN 3.3 V to 6.0 V VIN CIN 2.2 mH SW R1 EN 10 mF 820 kW COUT FB GND VOUT 3.3 V, Up to 1A C1 22 pF 10 mF R2 MODE 182 kW Figure 21. TPS62290DRV Adjustable 3.3 V TPS62291DRV VIN = 3.3 V to 6.0 V VIN CIN L1 2.2 mH EN 10 mF GND VOUT = 3.3 V Up to 1 A SW COUT 10 mF FB MODE Figure 22. TPS62291DRV Fixed 3.3 V TPS62293DRV VIN = 2.3 V to 6.0 V VIN CIN L1 2.2 mH SW EN VOUT 1.8 V Up to 1 A COUT 10 mF 10 mF GND FB MODE Figure 23. TPS62291DRV Fixed 1.8 V Copyright © 2007–2018, Texas Instruments Incorporated Product Folder Links: TPS62290 TPS62291 TPS62293 Submit Documentation Feedback 17 TPS62290, TPS62291, TPS62293 SLVS764G – JUNE 2007 – REVISED APRIL 2018 www.ti.com 10 Power Supply Recommendations The TPS6229x devices have no special requirements for its input power supply. The input power supply's output current needs to be rated according to the supply voltage, output voltage and output current of the TPS6229x. 11 Layout 11.1 Layout Guidelines As for all switching power supplies, the layout is an important step in the design. Proper function of the device demands careful attention to PCB layout. Care must be taken in board layout to get the specified performance. If the layout is not carefully done, the regulator could show poor line and/or load regulation, stability issues as well as EMI problems. It is critical to provide a low inductance, impedance ground path. Therefore, use wide and short traces for the main current paths. The input capacitor should be placed as close as possible to the IC pins as well as the inductor and output capacitor. Connect the GND pin of the device to the exposed thermal pad of the PCB and use this pad as a star point. Use a common power GND node and a different node for the signal GND to minimize the effects of ground noise. Connect these ground nodes together to the exposed thermal pad (star point) underneath the IC. Keep the common path to the GND pin, which returns the small signal components and the high current of the output capacitors as short as possible to avoid ground noise. The FB line should be connected right to the output capacitor and routed away from noisy components and traces (for example, SW line). 11.2 Layout Example VOUT R2 GND C1 R1 COUT CIN VIN L G N D U Figure 24. Layout Diagram 18 Submit Documentation Feedback Copyright © 2007–2018, Texas Instruments Incorporated Product Folder Links: TPS62290 TPS62291 TPS62293 TPS62290, TPS62291, TPS62293 www.ti.com SLVS764G – JUNE 2007 – REVISED APRIL 2018 12 Device and Documentation Support 12.1 Device Support 12.1.1 Third-Party Products Disclaimer TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE. 12.2 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 4. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY TPS62290 Click here Click here Click here Click here Click here TPS62291 Click here Click here Click here Click here Click here TPS62293 Click here Click here Click here Click here Click here 12.3 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 12.4 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 12.5 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 12.6 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Copyright © 2007–2018, Texas Instruments Incorporated Product Folder Links: TPS62290 TPS62291 TPS62293 Submit Documentation Feedback 19 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) TPS62290DRVR ACTIVE WSON DRV 6 3000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 85 BYN TPS62290DRVT ACTIVE WSON DRV 6 250 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 85 BYN TPS62290DRVTG4 ACTIVE WSON DRV 6 250 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 85 BYN TPS62291DRVR ACTIVE WSON DRV 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 CFY TPS62291DRVT ACTIVE WSON DRV 6 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 CFY TPS62293DRVR ACTIVE WSON DRV 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 CFD TPS62293DRVRG4 ACTIVE WSON DRV 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 CFD TPS62293DRVT ACTIVE WSON DRV 6 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 CFD (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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