TPS62824, TPS62825, TPS62826, TPS62827, TPS62824A, TPS62825A, TPS62826A, TPS62827A
ZHCSHY6H – MARCH 2018 – REVISED AUGUST 2023
TPS6282x 输出精度为 1% 的 2.4V 至 5.5V 输入、1A/2A/3A/4A 降压转换器
1 特性
3 说明
• 可作为集成电感器的电源模块：TPSM82821、
TPSM82822 和 TPSM82823
• DCS-Control 拓扑
• 1% 反馈或输出电压精度（整个温度范围）
• 效率高达 97%
• 26mΩ 和 25mΩ 内部功率 MOSFET
• 2.4V 至 5.5V 输入电压范围
• 4μA 工作静态电流
• 2.2MHz 开关频率
• 可调输出电压范围为 0.6V 至 4V
• 可实现轻负载效率的省电模式
• 可实现最低压降的 100% 占空比
• 有源输出放电
• 电源正常状态输出
• 热关断保护
• 断续短路保护
• 强制 PWM 版本可支持 CCM 运行
• 使用 TPS6282x 并借助 WEBENCH® 电源设计器创
建定制设计方案
TPS6282x 是易于使用的同步直流/直流降压转换器系
列，具有仅 4μA 的超低静态电流。该器件基于 DCS
控制拓扑，可实现快速瞬态响应。由于具有内部基准，
该产品可在 -40°C 至 125°C 的结温范围内以 1% 的高
反馈电压精度将输出电压调节到 0.6V 以下。该系列器
件具有引脚对引脚和 BOM 对 BOM 兼容性。整个解决
方案需要一个小型 470nH 电感器、一个 4.7µF 输入电
容器和两个 10µF 或一个 22µF 的输出电容器。
TPS6282x 具有两种型号。第一种型号可自动进入省电
模式，在超轻负载条件下保持高效率，从而延长系统电
池的运行时间。第二种型号可实现强制 PWM 运行，以
维持连续导通模式，从而确保超低的输出电压纹波和准
固定开关频率。该器件具有电源正常信号和内部软启动
电路。该器件能够以 100% 模式运行。在故障保护方
面，该器件加入了断续短路保护以及热关断功能。该器
件采用 6 引脚 1.5mm × 1.5mm QFN 封装，可提供功
率密度超高的解决方案。
封装信息
2 应用
固态硬盘
便携式电子产品
模拟安防摄像头和 IP 网络摄像头
工业 PC
多功能打印机
通用负载点
TPS6282xx
(1)
(2)
封装尺寸(2)
DMQ（VSON-HR，
6）
1.5mm × 1.5mm ×
0.9mm
如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
封装尺寸（长 x 宽）为标称值，并包括引脚（如适用）。
100
95
90
85
Efficiency (%)
•
•
•
•
•
•
封装(1)
器件型号
80
75
70
65
Vout=3.3V
Vout=2.5V
Vout=1.8V
Vout=1.2V
Vout=0.6V
60
典型应用原理图
55
50
100P
1m
10m
Load (A)
100m
1
4
VIN = 5V 时的效率
本文档旨在为方便起见，提供有关 TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问
www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SLVSEF9
TPS62824, TPS62825, TPS62826, TPS62827, TPS62824A, TPS62825A, TPS62826A, TPS62827A
www.ti.com.cn
ZHCSHY6H – MARCH 2018 – REVISED AUGUST 2023
Table of Contents
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Device Options................................................................ 3
6 Pin Configuration and Functions...................................3
7 Specifications.................................................................. 4
7.1 Absolute Maximum Ratings........................................ 4
7.2 ESD Ratings............................................................... 4
7.3 Recommended Operating Conditions.........................4
7.4 Thermal Information....................................................4
7.5 Electrical Characteristics.............................................5
7.6 Typical Characteristics................................................ 6
8 Detailed Description........................................................7
8.1 Overview..................................................................... 7
8.2 Functional Block Diagram........................................... 7
8.3 Feature Description.....................................................8
8.4 Device Functional Modes............................................9
9 Application and Implementation.................................. 10
9.1 Application Information............................................. 10
9.2 Typical Application.................................................... 10
9.3 Power Supply Recommendations.............................21
9.4 Layout....................................................................... 21
10 Device and Documentation Support..........................23
10.1 Device Support....................................................... 23
10.2 Documentation Support.......................................... 23
10.3 支持资源..................................................................23
10.4 Trademarks............................................................. 23
10.5 静电放电警告.......................................................... 23
10.6 术语表..................................................................... 23
11 Mechanical, Packaging, and Orderable
Information.................................................................... 24
4 Revision History
Changes from Revision G (March 2022) to Revision H (August 2023)
•
•
•
•
•
•
•
Page
向模块建议中添加了 TPSM82823...................................................................................................................... 1
更改了公式格式.................................................................................................................................................. 1
删除了整个文档中图像的四向连接......................................................................................................................1
删除了 DCS-Control 的商标................................................................................................................................1
更新了首页表格.................................................................................................................................................. 1
Added an SW pin voltage specification at PFM mode in the Absolute Maximum Ratings table ....................... 4
Added the Absolute Maximum Ratings standard table note ..............................................................................4
Changes from Revision F (September 2021) to Revision G (March 2022)
Page
• 从数据表标题中删除了“采用 1.5mm × 1.5mm QFN 封装”............................................................................. 1
Changes from Revision E (December 2020) to Revision F (September 2021)
Page
• Changed the status of the TPS62824DMQ to Production Data......................................................................... 3
• Added the TPS6282533..................................................................................................................................... 3
2
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English Data Sheet: SLVSEF9
TPS62824, TPS62825, TPS62826, TPS62827, TPS62824A, TPS62825A, TPS62826A, TPS62827A
www.ti.com.cn
ZHCSHY6H – MARCH 2018 – REVISED AUGUST 2023
5 Device Options
PART NUMBER
OPERATION
MODE
OUTPUT VOLTAGE
TPS62824DMQ
Adjustable
TPS62825DMQ
Adjustable
TPS6282518DMQ
1.8 V
TPS6282533DMQ
3.3 V
TPS62826DMQ
1A
2A
PSM/PWM
Adjustable
TPS6282618DMQ
OUTPUT CURRENT
3A
1.8 V
TPS62827DMQ
Adjustable
4A
TPS62824ADMQ
Adjustable
1A
TPS62825ADMQ
Adjustable
TPS62826ADMQ
Adjustable
TPS62827ADMQ
Adjustable
Forced-PWM
2A
3A
4A
6 Pin Configuration and Functions
FB
3
4
GND
PG
2
5
SW
EN
1
6
VIN
图 6-1. DMQ Package 6-Pin VSON-HR Bottom View
表 6-1. Pin Functions
PIN
NAME
NO.
I/O
DESCRIPTION
EN
1
I
Device enable pin. To enable the device, this pin must be pulled high. Pulling this pin low
disables the device. Do not leave floating.
PG
2
O
Power-good open-drain output pin. The pullup resistor can be connected to voltages up to
5.5 V. If unused, leave the pin floating.
FB
3
I
Feedback pin. For the fixed output voltage versions, this pin must be connected to the
output.
GND
4
SW
5
PWR
Switch pin of the power stage
VIN
6
PWR
Input voltage pin
Ground pin
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English Data Sheet: SLVSEF9
TPS62824, TPS62825, TPS62826, TPS62827, TPS62824A, TPS62825A, TPS62826A, TPS62827A
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ZHCSHY6H – MARCH 2018 – REVISED AUGUST 2023
7 Specifications
7.1 Absolute Maximum Ratings
Over operating junction temperature range (unless otherwise noted) (1)
Voltage at Pins (2)
Temperature
(1)
(2)
(3)
MIN
MAX
VIN, FB, EN, PG
–0.3
6
SW (DC)
–0.3
VIN + 0.3
SW (DC, in current limit)
–1.0
VIN + 0.3
SW (AC, less than 10ns) (3)
–2.5
10
SW (AC, PFM Mode, less than 100ns) (3)
–0.3
VIN + 1.0
Operating junction temperature, TJ
–40
150
Storage temperature, Tstg
–65
150
UNIT
V
°C
Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If
used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully
functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime
All voltage values are with respect to network ground terminal.
While switching.
7.2 ESD Ratings
V(ESD)
(1)
(2)
Electrostatic discharge
VALUE
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
V
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±500
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
Over operating junction temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VIN
Input voltage range, TPS62824x, TPS62825x and TPS62826x
2.4
5.5
V
VIN
Input voltage range, TPS62827x
2.5
5.5
V
VOUT
Output voltage range
0.6
4.0
V
IOUT
Output current range, TPS62824x
0
1
A
IOUT
Output current range, TPS62825x
0
2
A
IOUT
Output current range, TPS62826x
0
3
A
IOUT
Output current range, TPS62827x
0
4
A
ISINK_PG
Sink current at PG pin
1
mA
VPG
Pull-up resistor voltage
TJ
Operating junction temperature
-40
5.5
V
125
°C
7.4 Thermal Information
DEVICE
THERMAL METRIC(1)
TPS62826EVM-794
6 pins
6 pins
UNIT
RθJA
Junction-to-ambient thermal resistance
129.5
71.4
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
103.9
n/a (2)
°C/W
RθJB
Junction-to-board thermal resistance
33.1
n/a (2)
°C/W
ψJT
Junction-to-top characterization parameter
3.8
3.9
°C/W
ψJB
Junction-to-board characterization parameter
33.1
38.6
°C/W
(1)
4
TPS6282x, JEDEC
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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English Data Sheet: SLVSEF9
TPS62824, TPS62825, TPS62826, TPS62827, TPS62824A, TPS62825A, TPS62826A, TPS62827A
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(2)
ZHCSHY6H – MARCH 2018 – REVISED AUGUST 2023
Not applicable to an EVM.
7.5 Electrical Characteristics
TJ = -40 °C to 125 °C, and VIN = 2.4 V to 5.5 V. Typical values are at TJ = 25 °C and VIN = 5 V , unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
10
UNIT
SUPPLY
IQ
Quiescent current
EN = High, no load, device not switching
4
IQ
Quiescent current
EN = High, no load, FPWM devices
8
ISD
Shutdown current
EN = Low, TJ = -40 ℃ to 85 ℃
Under voltage lock out threshold
VIN falling
Under voltage lock out hysteresis
VIN rising
160
mV
Thermal shutdown threshold
TJ rising
150
°C
Thermal shutdown hysteresis
TJ falling
20
°C
VUVLO
TJSD
2.1
µA
mA
0.05
0.5
µA
2.2
2.3
V
LOGIC INTERFACE EN
VIH
High-level threshold voltage
VIL
Low-level threshold voltage
IEN,LKG
Input leakage current into EN pin
1.0
V
0.4
V
0.1
µA
EN = High
0.01
Time from EN high to 95% of VOUT nominal, TPS62827
1.75
ms
Time from EN high to 95% of VOUT nominal,
TPS62824x/5x/6x/7A
1.25
ms
SOFT START, POWER GOOD
tSS
Soft start time
Power good lower threshold
VPG
Power good upper threshold
VPG rising, VFB referenced to VFB nominal
94
96
98
%
VPG falling, VFB referenced to VFB nominal
90
92
94
%
VPG rising, VFB referenced to VFB nominal
103
105
107
%
VPG falling, VFB referenced to VFB nominal
108
110
112
%
0.4
V
0.1
µA
VPG,OL
Low-level output voltage
Isink = 1 mA
IPG,LKG
Input leakage current into PG pin
VPG = 5.0 V
0.01
PG rising edge
100
PG falling edge
20
tPG,DLY
Power good deglitch delay
µs
OUTPUT
VOUT
Output voltage accuracy
TPS6282533, PWM mode
3.267
3.3
3.333
VOUT
Output voltage accuracy
TPS6282x18, PWM mode
VFB
Feedback regulation voltage
PWM mode
IFB,LKG
Feedback input leakage current for adjustable
output voltage
VFB = 0.6 V
RFB
Internal resistor divider connected to FB pin, for
fixed output votlage
TPS6282518, TPS6282618, TPS6282533
IDIS
Output discharge current
VSW = 0.4V; EN = LOW
Load regulation
IOUT = 0.5 A to 3 A, VOUT = 1.8 V
V
1.78
1.8
1.82
V
594
600
606
mV
0.01
0.05
µA
7.5
MΩ
400
mA
0.1
%/A
High-side FET on-resistance
26
mΩ
Low-side FET on-resistance
25
75
POWER SWITCH
RDS(on)
ILIM
High-side FET switch current limit, DC
1.7
2.1
2.4
A
TPS62825x
2.74
3.3
3.9
A
TPS62826x
3.7
4.3
5.0
A
TPS62827x
4.8
5.6
6.4
A
ILIM
Low-side FET negative current limit, DC
TPS62824A/5A/6A/7A
fSW
PWM switching frequency
IOUT = 1 A, VOUT = 1.8 V
Copyright © 2023 Texas Instruments Incorporated
mΩ
TPS62824A
A
–1.6
2.2
MHz
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English Data Sheet: SLVSEF9
TPS62824, TPS62825, TPS62826, TPS62827, TPS62824A, TPS62825A, TPS62826A, TPS62827A
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ZHCSHY6H – MARCH 2018 – REVISED AUGUST 2023
70.0
70.0
60.0
60.0
50.0
50.0
RDS(on) (mOhm)
RDS(on) (mOhm)
7.6 Typical Characteristics
40.0
30.0
20.0
0.0
2.5
3.0
30.0
20.0
TJ = 0 °C
TJ = 25 °C
TJ = 85 °C
TJ = 125 °C
10.0
40.0
3.5
4.0
4.5
Input Voltage (V)
5.0
0.0
2.5
5.5
4.0
4.5
Input Voltage (V)
5.0
5.5
D011
8.0
$
TJ = -40 °C
TJ = 25 °C
TJ = 85 °C
TJ = 125 °C
4XLHVFHQW &XUUHQW
$
6KXWGRZQ &XUUHQW
3.5
图 7-2. Low-Side FET On-Resistance
0.5
0.3
0.2
0.1
0.0
2.5
3.0
D010
图 7-1. High-Side FET On-Resistance
0.4
TJ = 0 °C
TJ = 25 °C
TJ = 85 °C
TJ = 125 °C
10.0
3.0
3.5
4.0
4.5
Input Voltage (V)
5.0
6.0
4.0
2.0
0.0
2.5
5.5
TJ = -40 °C
TJ = 25 °C
TJ = 85 °C
TJ = 125 °C
3.0
3.5
D000
图 7-3. Shutdown Current
4.0
4.5
Input Voltage (V)
5.0
5.5
D001
图 7-4. Quiescent Current
500
Output Discharge Current (mA)
450
400
350
300
250
200
150
TJ = 0 °C
TJ = 25 °C
TJ = 85 °C
TJ = 125 °C
100
50
0
2.5
3.0
3.5
4.0
4.5
Input Voltage (V)
5.0
5.5
D012
图 7-5. Output Discharge Current
6
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English Data Sheet: SLVSEF9
TPS62824, TPS62825, TPS62826, TPS62827, TPS62824A, TPS62825A, TPS62826A, TPS62827A
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ZHCSHY6H – MARCH 2018 – REVISED AUGUST 2023
8 Detailed Description
8.1 Overview
The TPS6282x are synchronous step-down converters based on the DCS-Control topology with an adaptive
constant on-time control and a stabilized switching frequency. The devices operate in PWM (pulse width
modulation) mode for medium to heavy loads and in PSM (power save mode) at light load conditions, keeping
the output voltage ripple small. The nominal switching frequency is about 2.2 MHz with a small and controlled
variation over the input voltage range. As the load current decreases, the converter enters PSM, reducing the
switching frequency to keep efficiency high over the entire load current range. Because combining both PWM
and PSM within a single building block, the transition between modes is seamless and without effect on the
output voltage. In forced-PWM devices, the converter maintains a continuous conduction mode operation and
keeps the output voltage ripple very low across the whole load range and at a nominal switching frequency of
2.2 MHz. The devices offer both excellent dc voltage and fast load transient regulation, combined with a very low
output voltage ripple.
8.2 Functional Block Diagram
PG
Control Logic
EN
VFB
VREF
Soft-Start
UVLO
Thermal
Shutdown
VIN
VFB
FB
Ramp
VSW
VIN
Peak Current Detect
VREF
EA
HICCUP
Comp
VSW
Modulator
SW
Gate Drive
Ton
Output
Discharge
VIN
VSW
Zero Current Detect
0.6 V
Or
Fixed Output Voltages
Copyright © 2023 Texas Instruments Incorporated
VREF
GND
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English Data Sheet: SLVSEF9
TPS62824, TPS62825, TPS62826, TPS62827, TPS62824A, TPS62825A, TPS62826A, TPS62827A
ZHCSHY6H – MARCH 2018 – REVISED AUGUST 2023
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8.3 Feature Description
8.3.1 Pulse Width Modulation (PWM) Operation
At load currents larger than half the inductor ripple current, the device operates in pulse width modulation in
continuous conduction mode (CCM). The PWM operation is based on an adaptive constant on-time control with
stabilized switching frequency. To achieve a stable switching frequency in a steady state condition, the on-time is
calculated as:
V
TON = VOUT × 450ns
IN
(1)
In forced-PWM devices, the device always operates in pulse width modulation in continuous conduction mode
(CCM).
8.3.2 Power Save Mode (PSM) Operation
× To maintain high efficiency at light loads, the device enters power save mode (PSM) at the boundary to
discontinuous conduction mode (DCM). This happens when the output current becomes smaller than half of the
ripple current of the inductor. The device operates now with a fixed on-time and the switching frequency further
decreases proportional to the load current. It can be calculated as:×
fPSM =
2 × IOUT
VIN VIN − VOUT
2
TON × V
L
OUT
(2)
In PSM, the output voltage rises slightly above the nominal target, which can be minimized using larger output
capacitance. At duty cycles larger than 90%, the device can not enter PSM. The device maintains output
regulation in PWM mode.
8.3.3 Minimum Duty Cycle and 100% Mode Operation
There is no limitation for small duty cycles since even at very low duty cycles, the switching frequency is reduced
as needed to always ensure a proper regulation.
If the output voltage level comes close to the input voltage, the device enters 100% mode. While the high-side
switch is constantly turned on, the low-side switch is switched off. The difference between VIN and VOUT is
determined by the voltage drop across the high-side FET and the DC resistance of the inductor. The minimum
VIN that is needed to maintain a specific VOUT value is estimated as:
where
•
•
•
•
VIN, min = VOUT + IOUT, MAX × RDS on + RL
(3)
VIN,MIN = Minimum input voltage to maintain an output voltage
IOUT,MAX = Maximum output current
RDS(on) = High-side FET ON-resistance
RL = Inductor ohmic resistance (DCR)
8.3.4 Soft Start
About 250 μs after EN goes High, the internal soft-start circuitry controls the output voltage during start-up. This
action avoids excessive inrush current and ensures a controlled output voltage ramp. This action also prevents
unwanted voltage drops from high-impedance power sources or batteries. The TPS6282x can start into a prebiased output.
8.3.5 Switch Current Limit and HICCUP Short-Circuit Protection
The switch current limit prevents the device from drawing excessive current in case of externally-caused
overcurrent or short-circuit condition. Due to an internal propagation delay (typically 60 ns), the actual AC peak
current can exceed the static current limit during that time.
8
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English Data Sheet: SLVSEF9
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ZHCSHY6H – MARCH 2018 – REVISED AUGUST 2023
If the current limit threshold is reached, the device delivers maximum output current. Detecting this condition for
32 switching cycles (about 13 μs), the device turns off the high-side MOSFET for about 100 μs which allows
the inductor current to decrease through the low-side MOSFET body diode and then restarts again with a soft
start cycle. As long as the overload condition is present, the device hiccups that way, limiting the output power.
In forced PWM devices, a negative current limit (ILIMN) is enabled to prevent excessive current flowing
backwards to the input. When the inductor current reaches ILIMN, the low-side MOSFET turns off and the highside MOSFET turns on and kept on until TON time expires.
8.3.6 Undervoltage Lockout
The undervoltage lockout (UVLO) function prevents misoperation of the device if the input voltage drops below
the UVLO threshold. The undervoltage lockout is set to about 2.2 V with a hysteresis of typically 160 mV.
8.3.7 Thermal Shutdown
The junction temperature (TJ) of the device is monitored by an internal temperature sensor. If TJ exceeds 150°C
(typ.), the device goes in thermal shutdown with a hysteresis of typically 20°C. After TJ has decreased enough,
the device resumes normal operation.
8.4 Device Functional Modes
8.4.1 Enable, Disable, and Output Discharge
The device starts operation when Enable (EN) is set High. The input threshold levels are typically 0.9 V for rising
and 0.7 V for falling signals. Do not leave EN floating. Shutdown is forced if EN is pulled Low with a shutdown
current of typically 50 nA. During shutdown, the internal power MOSFETs as well as the entire control circuitry
are turned off and the output voltage is actively discharged through the SW pin by a current sink. Therefore VIN
must remain present for the discharge to function.
8.4.2 Power Good
The TPS6282x has a built-in power-good (PG) function. The PG pin goes high impedance when the output
voltage has reached its nominal value. Otherwise, including when disabled, in UVLO or in thermal shutdown, PG
is Low (see 表 8-1). The PG function is formed with a window comparator, which has an upper and lower voltage
threshold. The PG pin is an open-drain output and is specified to sink up to 1 mA. The power-good output
requires a pullup resistor connecting to any voltage rail less than 5.5 V.
The PG signal can be used for sequencing of multiple rails by connecting it to the EN pin of other converters.
Leave the PG pin unconnected when not used. The PG rising edge has a 100-µs blanking time and the PG
falling edge has a deglitch delay of 20 µs.
表 8-1. PG Pin Logic
DEVICE CONDITIONS
EN = High, VFB ≥ 0.576 V
LOGIC STATUS
HIGH Z
EN = High, VFB ≤ 0.552 V
Enable
EN = High, VFB ≤ 0.63 V
LOW
√
√
√
EN = High, VFB ≥ 0.66 V
√
Shutdown
EN = Low
√
Thermal Shutdown
TJ > TJSD
√
UVLO
0.7 V < VIN < VUVLO
Power Supply Removal
VIN < 0.7 V
Copyright © 2023 Texas Instruments Incorporated
√
√
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ZHCSHY6H – MARCH 2018 – REVISED AUGUST 2023
9 Application and Implementation
备注
以下应用部分中的信息不属于 TI 器件规格的范围，TI 不担保其准确性和完整性。TI 的客 户应负责确定
器件是否适用于其应用。客户应验证并测试其设计，以确保系统功能。
9.1 Application Information
The following section discusses the design of the external components to complete the power supply design for
several input and output voltage options by using typical applications as a reference.
9.2 Typical Application
VIN
2.4 V to 5.5 V
TPS62826
VIN
R3
100 k
C1
4.7 µF
L1
0.47 µH
VOUT
1.8 V
SW
C2
2x10 µF
EN
R1
200 k
C3
120 pF
VPG
PG GND FB
R2
100 k
图 9-1. Typical Application of TPS62826x
VIN
2.5 V to 5.5 V
TPS62827
VIN
R3
100 k
C1
4.7 µF
L1
0.47 µH
VOUT
1.8 V
SW
EN
C2
3x10 µF
R1
200 k
C3
120 pF
VPG
PG GND FB
R2
100 k
图 9-2. Typical Application of TPS62827
9.2.1 Design Requirements
For this design example, use the parameters listed in 表 9-1 as the input parameters.
表 9-1. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Input voltage, TPS62826x
2.4 V to 5.5 V
Input voltage, TPS62827x
2.5 V to 5.5 V
Output voltage
1.8 V
Output ripple voltage
< 20 mV
Maximum output current, TPS62826x
3A
Maximum output current, TPS62827x
4A
表 9-2 lists the components used for the example.
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ZHCSHY6H – MARCH 2018 – REVISED AUGUST 2023
表 9-2. List of Components
REFERENCE
C1
DESCRIPTION
4.7 µF, Ceramic capacitor, 6.3 V, X7R, size 0603, JMK107BB7475MA
C2,
2 × 10 µF, Ceramic capacitor, 10 V, X7R, size 0603, GRM188Z71A106MA73D
TPS62824x/5x/6x/7A
C2, TPS62827
3 × 10 µF, Ceramic capacitor, 10 V, X7R, size 0603, GRM188Z71A106MA73D
C3
120 pF, Ceramic capacitor, 50 V, size 0402
MANUFACTURER
Taiyo Yuden
Murata
Murata
Std
L1
0.47 µH, Power Inductor, XFL4015-471MEB
R1
Depending on the output voltage, 1%, size 0402
Coilcraft
Std
R2
100 kΩ, Chip resistor, 1/16 W, 1%, size 0402
Std
R3
100 kΩ, Chip resistor, 1/16 W, 1%, size 0402
Std
9.2.2 Detailed Design Procedure
9.2.2.1 Custom Design With WEBENCH® Tools
Click here to create a custom design using the TPS6282x device with the WEBENCH® Power Designer.
1. Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements.
2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial.
3. Compare the generated design with other possible solutions from Texas Instruments.
The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time
pricing and component availability.
In most cases, these actions are available:
• Run electrical simulations to see important waveforms and circuit performance
• Run thermal simulations to understand board thermal performance
• Export customized schematic and layout into popular CAD formats
• Print PDF reports for the design, and share the design with colleagues
Get more information about WEBENCH tools at www.ti.com/WEBENCH.
9.2.2.2 Setting The Output Voltage
The output voltage is set by an external resistor divider according to 方程式 4:
R1 = R2 ×
VOUT
VOUT
VFB − 1 = R2 × 0.6 V − 1
(4)
R2 must not be higher than 100 kΩ to achieve high efficiency at light load while providing acceptable noise
sensitivity. 方程式 5 shows how to compute the value of the feedforward capacitor for a given R2 value. For the
recommended 100k value for R2, a 120-pF feedforward capacitor is used.
12μ
C3 = R2
(5)
For the fixed output voltage versions, connect the FB pin to the output. R1, R2, and C3 are not needed. The
fixed output voltage devices have an internal feedforward capacitor.
9.2.2.3 Output Filter Design
The inductor and the output capacitor together provide a low-pass filter. To simplify this process, 表 9-3 outlines
possible inductor and capacitor value combinations for most applications. Checked cells represent combinations
that are proven for stability by simulation and lab test. check further combinations for each individual application.
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ZHCSHY6H – MARCH 2018 – REVISED AUGUST 2023
表 9-3. Matrix of Output Capacitor and Inductor Combinations, TPS62824x, TPS62825x, TPS62826x, and
TPS62827A
NOMINAL COUT [µF](3)
NOMINAL L [µH](2)
10
2 × 10 or 22
47
+
+(1)
+
100
0.33
0.47
1.0
(1)
(2)
(3)
This LC combination is the standard value and recommended for most applications.
Inductor tolerance and current derating is anticipated. The effective inductance can vary by 20% and –30%.
Capacitance tolerance and bias voltage derating is anticipated. The effective capacitance can vary by 20% and –35%.
表 9-4. Matrix of Output Capacitor and Inductor Combinations, TPS62827
NOMINAL COUT [µF](3)
NOMINAL L [µH](2)
22
3 × 10
47
100
+(1)
+
+
0.33
0.47
1.0
9.2.2.4 Inductor Selection
The main parameter for the inductor selection is the inductor value and then the saturation current of the
inductor. To calculate the maximum inductor current under static load conditions, 方程式 6 is given.
∆I
IL, MAX = IOUT, MAX + 2 L
where
•
•
•
•
(6)
V
1 − VOUT
∆ IL = VOUT × L × f IN
SW
IOUT,MAX = Maximum output current
ΔIL = Inductor current ripple
fSW = Switching frequency
L = Inductor value
TI recommends to choose a saturation current for the inductor that is approximately 20% to 30% higher than
IL,MAX. In addition, DC resistance and size must also be taken into account when selecting an appropriate
inductor. 表 9-5 lists recommended inductors.
表 9-5. List of Recommended Inductors
INDUCTANCE [µH]
CURRENT RATING
[A]
DIMENSIONS [L × W
× H mm]
MAX. DC
RESISTANCE [mΩ]
MFR PART NUMBER(1)
4.8
2.0 × 1.6 × 1.0
32
HTEN20161T-R47MDR, Cyntec
4.6
2.0 × 1.2 × 1.0
25
HTEH20121T-R47MSR, Cyntec
4.8
2.0 × 1.6 × 1.0
32
DFE201610E - R47M, MuRata
4.8
2.0 × 1.6 × 1.0
32
DFE201210S - R47M, MuRata
5.1
2.0 × 1.6 × 1.0
34
TFM201610ALM-R47MTAA, TDK
5.2
2.0 × 1.6 × 1.0
25
TFM201610ALC-R47MTAA, TDK
6.6
4.0 × 4.0 × 1.6
8.36
XFL4015-471ME, Coilcraft
8.0
3.5 × 3.2 × 2.0
10.85
XEL3520-471ME, Coilcraft
6.8
4.5 × 4 × 1.8
11.2
WE-LHMI-744373240047, Würth
0.47
(1)
12
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ZHCSHY6H – MARCH 2018 – REVISED AUGUST 2023
9.2.2.5 Capacitor Selection
The input capacitor is the low-impedance energy source for the converters which helps provide stable operation.
TI recommends a low-ESR multilayer ceramic capacitor for best filtering and must be placed between VIN and
GND as close as possible to those pins. For most applications, a minimum effective input capacitance of 3 µF
must be present, though a larger value reduces input current ripple.
The architecture of the device allows the use of tiny ceramic output capacitors with low equivalent series
resistance (ESR). These capacitors provide low output voltage ripple and are recommended. To keep its low
resistance up to high frequencies and to get narrow capacitance variation with temperature, TI recommends
using X7R or X5R dielectrics. Considering the DC-bias derating the capacitance, the minimum effective output
capacitance is 10 µF for TPS62824x, TPS62825x, TPS62826x. and TPS62827A and 20 µF for TPS62827.
A feed forward capacitor is required for the adjustable version, as described in Setting the Output Voltage. This
capacitor is not required for the fixed output voltage versions.
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ZHCSHY6H – MARCH 2018 – REVISED AUGUST 2023
9.2.3 Application Curves
VIN = 5.0 V, VOUT = 1.8 V, TA = 25°C, BOM = 表 9-2, unless otherwise noted.
95
0.612
90
0.609
85
0.606
0.603
75
Vout (V)
Efficiency (%)
80
70
65
0.6
0.597
60
V IN
V IN
V IN
V IN
55
50
45
100P
1m
10m
Load (A)
100m
0.594
= 2.5V
= 3.3V
= 4.2V
= 5.0V
1
V IN
V IN
V IN
V IN
0.591
0.588
100P
4
= 2.5 V
= 3.3 V
= 4.2 V
= 5.0 V
1m
10m
Load (A)
D002
100m
1
D021
VOUT = 0.6 V
VOUT = 0.6 V
图 9-4. Load Regulation
图 9-3. Efficiency
100
0.609
VIN=2.5V
VIN=3.3V
VIN=4.2V
VIN=5.0V
95
0.606
90
0.603
80
Vout (V)
Efficiency (%)
85
75
70
65
0.6
0.597
60
55
VIN=2.5V
VIN=3.3V
VIN=4.2V
VIN=5.0V
50
45
0.594
0.591
40
0
0.5
1
1.5
2
2.5
Load (A)
VOUT = 0.6 V
3
3.5
0
4
1
1.5
2
2.5
Load (A)
3
3.5
4
F-PWM devices
图 9-6. Load Regulation
100
1.212
95
1.209
90
1.206
85
1.203
Vout (V)
Efficiency (%)
0.5
VOUT = 0.6 V
F-PWM devices
图 9-5. PWM Efficiency
80
75
1.2
1.197
70
V IN
V IN
V IN
V IN
65
60
55
100P
1m
10m
Load (A)
100m
VOUT = 1.2 V
图 9-7. Efficiency
14
4
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1.194
= 2.5V
= 3.3V
= 4.2V
= 5.0V
1
1.191
4
D003
1.188
100P
V IN
V IN
V IN
V IN
= 2.4 V
= 3.3 V
= 4.5 V
= 5.0 V
1m
10m
Load (A)
100m
1
4
D031
VOUT = 1.2 V
图 9-8. Load Regulation
Copyright © 2023 Texas Instruments Incorporated
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English Data Sheet: SLVSEF9
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ZHCSHY6H – MARCH 2018 – REVISED AUGUST 2023
100
1.218
VIN=2.5V
VIN=3.3V
VIN=4.2V
VIN=5.0V
95
1.212
90
1.206
80
Vout (V)
Efficiency (%)
85
75
70
65
1.2
1.194
60
55
VIN=2.5V
VIN=3.3V
VIN=4.2V
VIN=5.0V
50
45
1.188
1.182
40
0
0.5
1
1.5
2
2.5
Load (A)
VOUT = 1.2 V
3
3.5
0
4
0.5
1
1.5
2
2.5
Load (A)
VOUT = 1.2 V
F-PWM devices
3
100
F-PWM devices
1.818
95
V IN
V IN
V IN
V IN
1.812
90
= 2.5 V
= 3.3 V
= 4.2 V
= 5.0 V
1.806
85
Vout (V)
Efficiency (%)
4
图 9-10. Load Regulation
图 9-9. PWM Efficiency
80
75
1.8
1.794
70
V IN
V IN
V IN
V IN
65
60
100P
1m
10m
Load (A)
100m
= 2.5V
= 3.3V
= 4.2V
= 5.0V
1
1.788
1.782
100P
4
1m
10m
Load (A)
D004
100m
1
4
D041
VOUT = 1.8 V
VOUT = 1.8 V
图 9-12. Load Regulation
图 9-11. Efficiency
100
1.827
95
1.821
VIN=2.5V
VIN=3.3V
VIN=4.2V
VIN=5.0V
90
1.815
85
1.809
80
Vout (V)
Efficiency (%)
3.5
75
70
65
1.803
1.797
1.791
60
55
1.785
VIN=2.5V
VIN=3.3V
VIN=4.2V
VIN=5.0V
50
45
1.779
1.773
40
0
0.5
1
1.5
2
2.5
Load (A)
VOUT = 1.8 V
3.5
F-PWM devices
图 9-13. PWM Efficiency
Copyright © 2023 Texas Instruments Incorporated
3
4
0
0.5
1
VOUT = 1.8 V
1.5
2
2.5
Load (A)
3
3.5
4
F-PWM devices
图 9-14. Load Regulation
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ZHCSHY6H – MARCH 2018 – REVISED AUGUST 2023
100
2.525
VIN = 3.3 V
VIN = 4.2 V
VIN = 5.0 V
95
2.515
85
Vout (V)
Efficiency (%)
90
80
75
70
60
100P
1m
10m
Load (A)
100m
1
2.495
2.485
VIN = 3.3V
VIN = 4.2V
VIN = 5.0V
65
2.505
2.475
100P
4
1m
10m
Load (A)
D006
1
4
D061
VOUT = 2.5 V
VOUT = 2.5 V
图 9-16. Load Regulation
图 9-15. Efficiency
100
2.5375
95
2.53
90
2.5225
85
VIN=3.3V
VIN=4.2V
VIN=5.0V
2.515
80
Vout (V)
Efficiency (%)
100m
75
70
65
2.5075
2.5
2.4925
60
2.485
55
2.4775
VIN=3.3V
VIN=4.2V
VIN=5.0V
50
45
2.47
2.4625
40
0
0.5
1
1.5
2
2.5
Load (A)
VOUT = 2.5 V
3
3.5
0
4
0.5
1
1.5
2
2.5
Load (A)
VOUT = 2.5 V
F-PWM devices
3
3.5
4
F-PWM devices
图 9-18. Load Regulation
图 9-17. PWM Efficiency
100
3.340
95
Vout (V)
Efficiency (%)
3.320
90
85
3.300
80
3.280
75
VIN = 4.2V
VIN = 5.0V
V IN = 4.2V
V IN = 5.0V
70
100P
1m
10m
Load (A)
100m
VOUT = 3.3 V
图 9-19. Efficiency
16
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1
4
D005
3.260
100P
1m
10m
Load (A)
100m
1
4
D051
VOUT = 3.3 V
图 9-20. Load Regulation
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ZHCSHY6H – MARCH 2018 – REVISED AUGUST 2023
100
3.3495
95
3.3396
90
3.3297
3.3198
80
Vout (V)
Efficiency (%)
85
VIN=4.2V
VIN=5.0V
75
70
65
60
3.3099
3.3
3.2901
3.2802
55
3.2703
50
3.2604
VIN=4.2V
VIN=5.0V
45
3.2505
40
0
0.5
1
1.5
2
2.5
Load (A)
VOUT = 3.3 V
3
3.5
0
4
0.5
3000
2750
2750
2500
2500
Switching Frequency (kHz)
Switching Frequency (kHz)
3000
2250
2000
1750
1500
1250
1000
VOUT = 0.6V
VOUT = 1.2V
VOUT = 1.8V
VOUT = 2.5V
250
0
0.0
0.5
1.0
1.5
Load (A)
2.0
2.5
1500
1250
1000
VOUT = 0.6V
VOUT = 1.2V
VOUT = 1.8V
VOUT = 2.5V
VOUT = 3.3V
750
0
2.5
3.0
3.0
2.70x106
2.40x106
Switching Frequency (Hz)
2.25x106
6
2.00x10
1.75x106
1.50x106
1.25x106
1.00x106
3
750.00x10
VOUT=0.6V
VOUT=1.2V
VOUT=1.8V
VOUT=2.5V
3
500.00x10
250.00x103
0
VIN = 3.3 V
3
3.5
TPS62824A/5A/6A/7A
图 9-25. Switching Frequency
Copyright © 2023 Texas Instruments Incorporated
5.0
5.5
D009
TPS62824/5/6
2.10x106
1.80x106
1.50x106
1.20x106
900.00x103
VOUT=0.6V
VOUT=1.2V
VOUT=1.8V
VOUT=2.5V
VOUT=3.3V
600.00x103
300.00x103
0.00x10
2
2.5
Load (A)
4.0
4.5
Input Voltage (V)
图 9-24. Switching Frequency
2.75x106
1.5
3.5
IOUT = 1.0 A
2.50x106
Switching Frequency (Hz)
1750
250
TPS62824/5/6
1
4
2000
3.00x106
0.5
3.5
F-PWM devices
500
图 9-23. Switching Frequency
0
3
2250
D008
VIN = 3.3 V
2
2.5
Load (A)
图 9-22. Load Regulation
图 9-21. PWM Efficiency
500
1.5
VOUT = 3.3 V
F-PWM devices
750
1
4
0.00x100
2.4
2.8
IOUT = 1.0 A
3.2
3.6
4
4.4
Input Voltgae (V)
4.8
5.2
5.5
TPS62824A/5A/6A/7A
图 9-26. Switching Frequency
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3000
3000
2750
2750
2500
2500
Switching Frequency (kHz)
Switching Frequency (kHz)
ZHCSHY6H – MARCH 2018 – REVISED AUGUST 2023
2250
2000
1750
1500
1250
1000
750
VOUT = 0.6V
VOUT = 1.2V
VOUT = 1.8V
VOUT = 2.5V
500
250
0
0.0
0.5
1.0
1.5
2.0
2.5
Load (A)
VIN = 3.3 V
3.0
3.5
2250
2000
1750
1500
1250
1000
500
250
0
2.5
4.0
4
Output Current (A)
Output Current (A)
4
3
2
75
85
95
105
Ambient Temperature (°C)
VOUT = 1.2 V
115
0
45
125
55
65
75
85
95
105
Ambient Temperature (°C)
VOUT = 1.8 V
θJA= 71.4°C/W
115
125
D015
θJA= 71.4°C/W
图 9-30. Thermal Derating
5
5
4
4
Output Current (A)
Output Current (A)
D014
TPS62827
VIN = 2.5 V
VIN = 3.3 V
VIN = 5.0 V
D020
3
2
1
3
2
1
VIN = 3.3 V
VIN = 5.0 V
55
65
VIN = 5.0 V
75
85
95
105
Ambient Temperature (°C)
VOUT = 2.5 V
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115
θJA= 71.4°C/W
图 9-31. Thermal Derating
18
5.5
2
图 9-29. Thermal Derating
0
45
5.0
3
1
VIN = 2.5 V
VIN = 3.3 V
VIN = 5.0 V
65
4.0
4.5
Input Voltage (V)
图 9-28. Switching Frequency
5
55
3.5
IOUT = 1.0 A
TPS62827
图 9-27. Switching Frequency
0
45
3.0
D013
5
1
VOUT = 0.6V
VOUT = 1.2V
VOUT = 1.8V
VOUT = 2.5V
VOUT = 3.3V
750
125
D017
0
45
55
65
75
85
95
105
Ambient Temperature (°C)
VOUT = 3.3 V
115
125
D016
θJA= 71.4°C/W
图 9-32. Thermal Derating
Copyright © 2023 Texas Instruments Incorporated
Product Folder Links: TPS62824 TPS62825 TPS62826 TPS62827 TPS62824A TPS62825A TPS62826A TPS62827A
English Data Sheet: SLVSEF9
TPS62824, TPS62825, TPS62826, TPS62827, TPS62824A, TPS62825A, TPS62826A, TPS62827A
www.ti.com.cn
ZHCSHY6H – MARCH 2018 – REVISED AUGUST 2023
IOUT = 1.0 A
TPS62824/5/6/7
图 9-33. PWM Operation
IOUT = 1.0 A
TPS62824A/5A/6A/7A
图 9-35. PWM Operation at F-PWM
Load = 0.6 Ω
TPS62825/6/7
图 9-37. Start-Up With Load
Copyright © 2023 Texas Instruments Incorporated
IOUT = 0.1 A
TPS62824/5/6/7
图 9-34. PSM Operation
No load
TPS62824A/5A/6A/7A
图 9-36. PWM Operation at F-PWM
TPS62824/5/6/7
图 9-38. Start-Up With No Load
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Product Folder Links: TPS62824 TPS62825 TPS62826 TPS62827 TPS62824A TPS62825A TPS62826A TPS62827A
English Data Sheet: SLVSEF9
TPS62824, TPS62825, TPS62826, TPS62827, TPS62824A, TPS62825A, TPS62826A, TPS62827A
www.ti.com.cn
ZHCSHY6H – MARCH 2018 – REVISED AUGUST 2023
Load = 0.6 Ω
TPS62825A/6A/7A
图 9-39. Start-Up With Load
Load = 1.8 Ω
TPS62824/5/6/7
图 9-43. Load Transient
20
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图 9-40. Start-Up With No Load
TPS6282x
图 9-41. Disable, Active Output Discharge
IOUT = 0.05 A to 1 A
TPS62824A/5A/6A/7A
TPS6282x
图 9-42. Disable, Active Output Discharge at No
Load
IOUT = 1 A to 2 A
TPS62825/6/7
图 9-44. Load Transient
Copyright © 2023 Texas Instruments Incorporated
Product Folder Links: TPS62824 TPS62825 TPS62826 TPS62827 TPS62824A TPS62825A TPS62826A TPS62827A
English Data Sheet: SLVSEF9
TPS62824, TPS62825, TPS62826, TPS62827, TPS62824A, TPS62825A, TPS62826A, TPS62827A
www.ti.com.cn
ZHCSHY6H – MARCH 2018 – REVISED AUGUST 2023
IOUT = 0.05 A to 1 A
TPS62824A/5A/6A/7A
IOUT = 1 A to 2 A
图 9-45. Load Transient
图 9-46. Load Transient
VPG
5V/DIV
VPG
5V/DIV
ICOIL
2A/DIV
ICOIL
2A/DIV
VOUT
1V/DIV
VOUT
1V/DIV
7LPH
TPS62825A/6A/7A
V ',9
7LPH
V ',9
D018
IOUT = 1 A
TPS6282x
图 9-47. HICCUP Short-Circuit Protection
D019
IOUT = 1 A
TPS6282x
图 9-48. HICCUP Short-Circuit Protection (Zoom In)
9.3 Power Supply Recommendations
The device is designed to operate from an input voltage supply range from 2.4 V to 5.5 V. Ensure that the input
power supply has a sufficient current rating for the application.
9.4 Layout
9.4.1 Layout Guidelines
The printed-circuit-board (PCB) layout is an important step to maintain the high performance of the device. See
Layout Example for the recommended PCB layout.
• Place the input, output capacitors and the inductor as close as possible to the IC. This placement keeps the
power traces short. Routing these power traces direct and wide results in low trace resistance and low
parasitic inductance.
• Connect the low side of the input and output capacitors properly to the GND pin to avoid a ground potential
shift.
• The sense traces connected to FB is a signal trace. Take special care to avoid noise being induced. Keep
these traces away from SW nodes. The connection of the output voltage trace for the FB resistors must be
made at the output capacitor.
• Refer to Layout Example for an example of component placement, routing, and thermal design.
Copyright © 2023 Texas Instruments Incorporated
Submit Document Feedback
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Product Folder Links: TPS62824 TPS62825 TPS62826 TPS62827 TPS62824A TPS62825A TPS62826A TPS62827A
English Data Sheet: SLVSEF9
TPS62824, TPS62825, TPS62826, TPS62827, TPS62824A, TPS62825A, TPS62826A, TPS62827A
www.ti.com.cn
ZHCSHY6H – MARCH 2018 – REVISED AUGUST 2023
9.4.2 Layout Example
VIN
VOUT
L1
C2
FB
VIN
EN
PG
SW
Solution size = 31mm2
GND
C1
R2
R1
GND
C3
图 9-49. PCB Layout Recommendation
9.4.2.1 Thermal Considerations
Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires
special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added
heat sinks and convection surfaces, and the presence of other heat-generating components affect the power
dissipation limits of a given component.
Two basic approaches for enhancing thermal performance are:
• Improving the power dissipation capability of the PCB design
• Introducing airflow in the system
The Thermal Data section in Thermal Information provides the thermal metric of the device on the EVM after
considering the PCB design of real applications. The big copper planes connecting to the pads of the IC on the
PCB improve the thermal performance of the device. For more details on how to use the thermal parameters,
see Thermal Characteristics of Linear and Logic Packages Using JEDEC PCB Designs application note and
Semiconductor and IC Package Thermal Metrics application note.
22
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Copyright © 2023 Texas Instruments Incorporated
Product Folder Links: TPS62824 TPS62825 TPS62826 TPS62827 TPS62824A TPS62825A TPS62826A TPS62827A
English Data Sheet: SLVSEF9
TPS62824, TPS62825, TPS62826, TPS62827, TPS62824A, TPS62825A, TPS62826A, TPS62827A
www.ti.com.cn
ZHCSHY6H – MARCH 2018 – REVISED AUGUST 2023
10 Device and Documentation Support
10.1 Device Support
10.1.1 第三方产品免责声明
TI 发布的与第三方产品或服务有关的信息，不能构成与此类产品或服务或保修的适用性有关的认可，不能构成此
类产品或服务单独或与任何 TI 产品或服务一起的表示或认可。
10.1.2 Development Support
10.1.2.1 Custom Design With WEBENCH® Tools
Click here to create a custom design using the TPS6282x device with the WEBENCH® Power Designer.
1. Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements.
2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial.
3. Compare the generated design with other possible solutions from Texas Instruments.
The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time
pricing and component availability.
In most cases, these actions are available:
• Run electrical simulations to see important waveforms and circuit performance
• Run thermal simulations to understand board thermal performance
• Export customized schematic and layout into popular CAD formats
• Print PDF reports for the design, and share the design with colleagues
Get more information about WEBENCH tools at www.ti.com/WEBENCH.
10.2 Documentation Support
10.2.1 Related Documentation
For related documentation, see the following:
• Texas Instruments, Thermal Characteristics of Linear and Logic Packages Using JEDEC PCB Designs
application note
• Texas Instruments, Semiconductor and IC Package Thermal Metrics application note
10.3 支持资源
TI E2E™ 支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解
答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅
TI 的《使用条款》。
10.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
WEBENCH® is a registered trademark of Texas Instruments.
所有商标均为其各自所有者的财产。
10.5 静电放电警告
静电放电 (ESD) 会损坏这个集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理
和安装程序，可能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级，大至整个器件故障。精密的集成电路可能更容易受到损坏，这是因为非常细微的参
数更改都可能会导致器件与其发布的规格不相符。
10.6 术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
Copyright © 2023 Texas Instruments Incorporated
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Product Folder Links: TPS62824 TPS62825 TPS62826 TPS62827 TPS62824A TPS62825A TPS62826A TPS62827A
English Data Sheet: SLVSEF9
TPS62824, TPS62825, TPS62826, TPS62827, TPS62824A, TPS62825A, TPS62826A, TPS62827A
ZHCSHY6H – MARCH 2018 – REVISED AUGUST 2023
www.ti.com.cn
11 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
24
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Copyright © 2023 Texas Instruments Incorporated
Product Folder Links: TPS62824 TPS62825 TPS62826 TPS62827 TPS62824A TPS62825A TPS62826A TPS62827A
English Data Sheet: SLVSEF9
PACKAGE OPTION ADDENDUM
www.ti.com
2-Sep-2023
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
TPS62824ADMQR
ACTIVE
VSON-HR
DMQ
6
3000
RoHS & Green
Call TI | SN
Level-1-260C-UNLIM
-40 to 125
JM
Samples
TPS62824DMQR
ACTIVE
VSON-HR
DMQ
6
3000
RoHS & Green
Call TI | SN | NIPDAU
Level-1-260C-UNLIM
-40 to 125
JL
Samples
TPS6282518DMQR
ACTIVE
VSON-HR
DMQ
6
3000
RoHS & Green
Call TI | SN
Level-1-260C-UNLIM
-40 to 125
CJ
Samples
TPS6282518DMQT
ACTIVE
VSON-HR
DMQ
6
250
RoHS & Green
Call TI | SN | NIPDAU
Level-1-260C-UNLIM
-40 to 125
CJ
Samples
TPS6282533DMQR
ACTIVE
VSON-HR
DMQ
6
3000
RoHS & Green
Call TI | SN | NIPDAU
Level-1-260C-UNLIM
-40 to 125
L1
Samples
TPS62825ADMQR
ACTIVE
VSON-HR
DMQ
6
3000
RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
-40 to 125
JN
Samples
TPS62825DMQR
ACTIVE
VSON-HR
DMQ
6
3000
RoHS & Green
Call TI | SN
Level-1-260C-UNLIM
-40 to 125
CI
Samples
TPS62825DMQT
ACTIVE
VSON-HR
DMQ
6
250
RoHS & Green
Call TI | SN
Level-1-260C-UNLIM
-40 to 125
CI
Samples
TPS6282618DMQR
ACTIVE
VSON-HR
DMQ
6
3000
RoHS & Green
Call TI | SN | NIPDAU
Level-1-260C-UNLIM
-40 to 125
CK
Samples
TPS6282618DMQT
ACTIVE
VSON-HR
DMQ
6
250
RoHS & Green
Call TI | SN | NIPDAU
Level-1-260C-UNLIM
-40 to 125
CK
Samples
TPS62826ADMQR
ACTIVE
VSON-HR
DMQ
6
3000
RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
-40 to 125
JO
Samples
TPS62826DMQR
ACTIVE
VSON-HR
DMQ
6
3000
RoHS & Green
Call TI | SN
Level-1-260C-UNLIM
-40 to 125
CL
Samples
TPS62826DMQT
ACTIVE
VSON-HR
DMQ
6
250
RoHS & Green
Call TI | SN
Level-1-260C-UNLIM
-40 to 125
CL
Samples
TPS62827ADMQR
ACTIVE
VSON-HR
DMQ
6
3000
RoHS & Green
Call TI | SN
Level-1-260C-UNLIM
-40 to 125
JP
Samples
TPS62827DMQR
ACTIVE
VSON-HR
DMQ
6
3000
RoHS & Green
Call TI | SN
Level-1-260C-UNLIM
-40 to 125
EH
Samples
TPS62827DMQT
ACTIVE
VSON-HR
DMQ
6
250
RoHS & Green
Call TI | SN
Level-1-260C-UNLIM
-40 to 125
EH
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
2-Sep-2023
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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