User's Guide
SNVU651 – January 2019
TPS65653-Q1 EVM user's guide
This user’s guide describes the characteristics, operation, and use of the TPS65653-Q1 evaluation
module (EVM). This user’s guide includes a Evaluation Board Schematic and Bill of Materials (BOM).
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Contents
Related Documentation from Texas Instruments ........................................................................ 2
FCC Warning ................................................................................................................. 2
If You Need Assistance ..................................................................................................... 2
Introduction ................................................................................................................... 3
Setup .......................................................................................................................... 4
2.1
Input/Output Connector Description .............................................................................. 4
2.2
Software Installation ................................................................................................ 4
2.3
Power Supply Setup ................................................................................................ 5
2.4
Notes on Efficiency Measurement Procedure................................................................... 6
GUI Overview ................................................................................................................ 6
3.1
Main Tab ............................................................................................................. 7
3.2
Other Tabs and Menus............................................................................................. 7
3.3
Console .............................................................................................................. 7
Board Layout ................................................................................................................. 7
Evaluation Board Schematic ............................................................................................... 9
Bill of Materials ............................................................................................................. 12
List of Figures
1
TPS65653-Q1 EVM ......................................................................................................... 3
2
Evaluation Software GUI When EVM is Connected to the PC using USB Cable ................................... 5
3
Evaluation Software GUI Showing Steps Needed to Power up the TPS65653-Q1................................. 6
4
TPS65653-Q1 Board Layout ............................................................................................... 8
5
EVM Schematic .............................................................................................................. 9
6
EVM Connectors ........................................................................................................... 10
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EVM I2C Interface .......................................................................................................... 11
List of Tables
Trademarks
Windows is a registered trademark of Microsoft Corporation.
All other trademarks are the property of their respective owners.
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Related Documentation from Texas Instruments
1
www.ti.com
Related Documentation from Texas Instruments
TPS65653-Q1 data sheet and TPS6565342-Q1 technical reference manual.
2
FCC Warning
This equipment is intended for use in a laboratory test environment only. It generates, uses, and can
radiate radio frequency energy and has not been tested for compliance with the limits of computing
devices pursuant to subpart J of part 15 of FCC rules, which are designed to provide reasonable
protection against radio frequency interference. Operation of this equipment in other environments may
cause interference with radio communications, in which case the user, at their own expense, will be
required to take whatever measures may be required to correct this interference.
3
If You Need Assistance
Contact your local TI sales representative.
2
TPS65653-Q1 EVM user's guide
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User's Guide
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Using the TPS65653-Q1 Evaluation Module
1
Introduction
The Texas Instruments TPS65653-Q1 evaluation module (EVM) help designers evaluate the operation
and performance of the TPS65653xx-Q1 devices. The TPS65653-Q1 is designed to meet the powermanagement requirements of the latest processor and platform needs in automotive camera and radar
applications. These devices contain two step-down DC-DC converters, and a general-purpose digitaloutput signal. The device is controlled by an I2C-compatible serial interface.
space
space
Figure 1. TPS65653-Q1 EVM
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Setup
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Setup
This section describes the jumpers and connectors on the EVM as well and how to properly connect, set
up, and use the TPS65653-Q1 EVM.
Many of the components on the TPS65653-Q1 EVM are susceptible to damage by electrostatic discharge
(ESD). Customers are advised to observe proper ESD handling precautions when unpacking and handling
the EVM, including the use of a grounded wrist strap at an approved ESD workstation.
On opening the TPS65653-Q1 EVM package, ensure that these items are included:
• TPS65653Q1EVM evaluation board
• USB cable
If any of the items are missing, contact the closest Texas Instruments Product Information Center to
inquire about a replacement.
2.1
Input/Output Connector Description
The description of the main connectors on the EVM board are as follows:
• Connector J4 is the power input terminal for the EVM board. The terminal block provides a power (VIN)
and ground (GND) connection to allow the user to attach the EVM to a cable harness.
• Connector J14 is the regulated output voltage of the BUCK0 converter. The terminal block provides a
power (+) and ground (–) connection to allow the user to attach the EVM to a cable harness for
connecting a load.
• Connector J19 is also a regulated output voltage of the BUCK0 converter, with additional capacitors
and inductors available for LC filtering. The terminal block provides a power (+) and ground (–)
connection to allow the user to attach the EVM to a cable harness for connecting a load.
• Connector J16 is the regulated output voltage of the BUCK1 converter. The terminal block provides a
power (+) and ground (–) connection to allow the user to attach the EVM to a cable harness for
connecting a load.
• Connector J20 is also a regulated output voltage of the BUCK1 converter, with additional capacitors
and inductors available for LC filtering. The terminal block provides a power (+) and ground (–)
connection to allow the user to attach the EVM to a cable harness for connecting a load.
• Use connector J7 to sense VOUT from BUCK0 and BUCK1.
• Use connector J6 tor sensing input voltage to both regulators BUCK0, and BUCK1.
• Connector J18 is for connecting USB cable to EVM board. It is compatible with a Mini USB Type B
receptacle.
2.2
Software Installation
The EVM is controlled through a graphical user interface (GUI) software. The software communicates with
the EVM through an available USB port. The minimum hardware requirements for the EVM software are:
• IBM PC-compatible computer running a Microsoft Windows® XP or newer operating system
• Available USB port
• Mouse
The latest downloadable software is available at http://www.ti.com/tool/TPS65653Q1EVM. Download the
zip file onto your local hard drive, and then unzip this folder. Connect the EVM to the PC with the USB
cable. Refer to Figure 1.
1. With the power supply disconnected from the EVM unit, open the un-zipped folder and click on the
TPS65653_installer.exe file to start the software.
2. On the evaluation software window bottom left corner, you should see text “Hardware connected”.
Refer to Figure 2.
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Setup
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Figure 2. Evaluation Software GUI When EVM is Connected to the PC using USB Cable
2.3
Power Supply Setup
A bench-top DC power supply is needed to power up the EVM. For full-load testing of the
TPS65653Q1EVM, a DC-power supply capable of at least 8 A and 4 V is required. 4 A is suggested as a
practical minimum for partial load. The power supply is connected to the EVM using connector J4. The
power supply and cabling must present low impedance to the UUT; the length of power supply cables
must be minimized. Remote sense, using connector J8, can be used to compensate for voltage drops in
the cabling.
With the power supply disconnected from the EVM, set the supply to 3.7-V DC and the current limit to 4 A,
minimum. Set the power supply output OFF. Connect the positive terminal (+) of the power supply to VIN
and negative terminal (–) to GND on the EVM (J5 power-in terminal block). Check that jumpers on the
board are set as shown in (factory default jumper configuration).
Set power supply output ON, and then continue with the following steps:
1. Click on Assert EN check box. See marking 1 in Figure 3..
2. Click on Read Registers button (marking 2 in Figure 3). User should see “I2C Status: ready” message
on the green background next to the Read Registers button.
The EVM is now ready for testing with default register settings loaded.
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Setup
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Figure 3. Evaluation Software GUI Showing Steps Needed to Power up the TPS65653-Q1
2.4
Notes on Efficiency Measurement Procedure
Output Connections: An appropriate electronic load or high-power system source meter instrument,
specified for operation down to 700 mV, is desirable for loading the EVM. The maximum load current is
specified as 8 A. Be sure to choose the correct wire size when attaching the electronic load. A wire
resistance that is too high causes a voltage drop in the power distribution path, which becomes significant
compared to the absolute value of the output voltage. Connect an electric load to J14 or J16. It is advised
that, prior to connecting the load, it be set to sink 0 A to avoid power surges or possible shocks.
Voltage drop across the PCB traces yield inaccurate efficiency measurements. For the most accurate
voltage measurement at the EVM, use J6 to measure the input voltage and J7 to measure the output
voltage.
To measure the current flowing to/from the UUT, use the current meter of the DC power supply/electric
load as long as it is accurate. Some power source ammeters may show offset of several milliamps and
thus yields inaccurate efficiency measurements. In order to perform very accurate IQ measurements on the
EVM, disconnect input protective Zener diode D1 by removing the shunt J5 from the board. When
connected, this diode will cause some leakage, especially at high VIN voltages.
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GUI Overview
The evaluation software has the following tabs: Main, Config, and Advanced. The three tabs together
provide the user access to the whole register map of the TPS65653 devices.
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GUI Overview
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3.1
Main Tab
The Main tab has the elemental controls for the EVM and provides a view of the chip status. Starting from
top, the main controls are:
• Assert EN: This checkbox asserts logic high level voltage to the TPS65653 EN pin. Asserting EN may
enable the Buck regulator(s) depending on the register settings.
• Assert SW Reset: To perform a complete SW reset to the chip, click this checkbox. See the TPS65653
data sheet for explanation of various reset scenarios.
The "Bucks" section provides enable controls and status information for bucks as follows:
• Enable check boxes provide enable/disable control for all bucks.
• The “Current” field provides approximate level of load current on each buck.
The "System Flags / Interrupts / Pins" section as well as the "Interrupt bits" and the "Status bits" sections
give data on system faults and warnings. If the interrupt is set for any reason the Interrupt field shall show
‘1’ on red background. The flag causing the interrupt will also be set on the Main tab. Interrupts on
TPS65653 can only be cleared by writing '1’ to associated registers. Any individual flag can be cleared by
clicking the "Clear" button next to each flag. Some of the flags also have a mask bit. If "Mask" check-box
of certain flag is checked, the interrupt is not generated. The "Status" bits will show the current status of
the faults.
At the bottom of the GUI window is the "Auto Write" checkbox. If "Auto Write" is checked (default) any
checking, un-checking or pull-down menu selections will immediately launch I2C writes to the chip
register(s). If not checked, the user can update the chip registers to correspond the configuration selected
on the GUI by clicking "Write Registers".
If "Poll Status" is selected the software sends a query to the TPS65653 device at a fixed interval in order
to detect the status of the chip, including operation mode and load current. If not selected, user can read
the registers by clicking "Read Registers".
3.2
Other Tabs and Menus
The "Tools" pulldown menu hosts another way of accessing the TPS65653 registers. The "Direct Register
Access" tool can be used to read or write any register. When using direct register access, un-checking the
“Poll Status” check-box is recommended. This way the GUI only does the reads and writes commanded
from the direct access dialog.
The "Config" and "Advanced" tabs provide the user with pulldown menus and check-boxes for the part of
the register space that is not covered by the Main tab, such as output voltage control. These controls are
self-explanatory. Please refer to the TPS65653 datasheet for explanation of the functions.
3.3
Console
To show or hide the console, toggle the option in the View pulldown menu. The console can be used to
access any of the TPS65653 registers. Registers can be read or written simply by referring to the logical
registers by their name.
The console supports use of scripts. If a text file containing commands supported by the console is stored
in the same folder as the evaluation software executable, then the script can be launched from the
console by typing the text file name, like script.txt.
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Board Layout
This section describes the board layout of the TPS65653-Q1. See the TPS65653 data sheet for specific
PCB layout recommendations. The board is constructed on a 4-layer PCB. Figure 4 shows the top view of
the entire board. Routing is mostly done on top and bottom layers. Top layer contains the copper areas
connecting the VOUT pads of the inductors and output capacitors together and to the load terminals. 2nd
layer is the ground plane and 3rd layer contains the VIN copper area and copper areas for the VOUT nets.
Also the bottom layer contains large copper area filled with ground. Input capacitors are placed as close
as possible to the TPS65653 device for keeping the critical VIN and GND traces short. Output capacitors
and inductors are placed around the input capacitors.
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Board Layout
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Figure 4. TPS65653-Q1 Board Layout
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Evaluation Board Schematic
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Evaluation Board Schematic
Figure 5. EVM Schematic
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Evaluation Board Schematic
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Figure 6. EVM Connectors
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Evaluation Board Schematic
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Figure 7. EVM I2C Interface
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Bill of Materials
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Bill of Materials
Qua
ntity
Designator
Description
PartNumber
Manufacturer
1
!PCB1
Printed Circuit Board
BMC046
Any
2
C1, C5
CAP, CERM, 10 uF, 10 V, +/10%, X7R, 0805
GCM21BR71A106KE22L
MuRata
1
C10
CAP, TA, 220 uF, 10 V, +/10%, 0.05 ohm, SMD
TPSD227K010R0050
AVX
1
C11
CAP, CERM, 100 uF, 6.3 V, +/20%, X5R, 1206
GRM31CR60J107ME39L
MuRata
2
C14, C32
CAP, CERM, 10 pF, 100 V,+/5%, C0G/NP0, AEC-Q200
Grade 1, 0603
GCM1885C2A100JA16D
MuRata
2
C15, C16
CAP, CERM, 15 pF, 100 V,+/5%, C0G/NP0, AEC-Q200
Grade 1, 0603
GCM1885C2A150JA16D
MuRata
4
C18, C25, C27, C35
CAP, CERM, 10 uF, 16 V, +/20%, X5R, 0603
GRM188R61C106MAALD
MuRata
6
C2, C4, C7, C9, C12, C13
CAP, CERM, 22 uF, 10 V, +/10%, X7R, AEC-Q200 Grade 1,
1206
GCM31CR71A226KE02
MuRata
16
C3, C6, C8, C17, C19, C20, C21, C22,
C23, C24, C26, C28, C29, C30, C31,
C34
CAP, CERM, 0.1 uF, 50 V, +/10%, X7R, 0603
GCM188R71H104KA57D
MuRata
1
C33
CAP, CERM, 10 uF, 16 V, +/10%, X5R, 0805
GRM21BR61C106KE15L
MuRata
4
C36, C37, C38, C39
CAP, CERM, 1 uF, 25 V, +/10%, X7R, AEC-Q200 Grade 1,
0603
GCM188R71E105KA64D
MuRata
1
C40
CAP, CERM, 0.01 uF, 50 V, +/5%, C0G/NP0, 0603
GRM1885C1H103JA01D
MuRata
6
C41, C42, C43, C44, C45, C46
CAP, CERM, 22 uF, 10 V, +/20%, X7S, 0805
C2012X7S1A226M125AC
TDK
2
C47, C48
CAP, CERM, 390 pF, 50 V, +/10%, X7R, 0603
C0603C391K5RACTU
Kemet
1
D1
Diode, Zener, 5.1 V, 5 W, SMB
SMBJ5338B-TP
Micro Commercial
Components
1
D2
Diode, Schottky, 30 V, 0.2 A,
SOD-323
BAT42WS-7-F
Diodes Inc.
0
FID1, FID2, FID3, FID4, FID5, FID6
Fiducial mark. There is nothing
to buy or mount.
N/A
N/A
4
H1, H2, H3, H4
Bumpon, Hemisphere, 0.44 X
0.20, Clear
SJ-5303 (CLEAR)
3M
1
H5
CABLE MINI USB 5PIN 1M 2.0
VERS
AK672M/2-1-R
Assman WSW
3
J1, J2, J5, J6, J11, J15
Header, 100 mil, 2 x 1, Gold, TH TSW-102-07-G-S
Samtec
0
J12
JUMPER TIN SMD
S1911-46R
Harwin
0
J13
Connector, MMCX,Vertical RCP
6GHz, 50Ohm, TH
135-9701-201
Cinch Connectivity
1
J17
Header, 100 mil, 3 x 1, Gold, TH HTSW-103-07-G-S
Samtec
1
J18
Connector, Receptacle, MiniUSB Type B, R/A, Top Mount
SMT
TE Connectivity
1
J3
Header, 100 mil, 2 x 2, Gold, TH TSW-102-07-G-D
Samtec
5
J4, J14, J16, J19, J20
Terminal Block, 5.08 mm, 2 x 1,
TH
1715721
Phoenix Contact
1
J7
Terminal Block, 8 x 1, 2.54 mm,
TH
1725711
Phoenix Contact
12
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2
J8, J10
Terminal Block, 100 mil, 2 x 1, 6 1725656
A, 63 V, TH
Phoenix Contact
0
J9
Connector, 7 pos, 2.54 mm,
R/A, SMT
OPP-07-01-T-S-M
Samtec
2
L1, L2
Inductor, Shielded, 470 nH, 4.7
A, 0.021 ohm, SMD
DFE252012PD-R47M
MuRata Toko
1
L3
Inductor, Wirewound, Ferrite, 10 LB2012T100KR
uH, 0.12 A, 0.5 ohm, SMD
Taiyo Yuden
2
L4, L5
Ferrite Bead, 30 ohm @ 100
MHz, 6 A, 0805
MPZ2012S300AT000
TDK
1
LBL1
Thermal Transfer Printable
Labels, 1.250" W x 0.250" H 10,000 per roll
THT-13-457-10
Brady
3
R1, R3, R19
RES, 0, 5%, 0.1 W, AEC-Q200
Grade 0, 0402
ERJ-2GE0R00X
Panasonic
0
R2, R18, R20
RES, 0, 5%, 0.1 W, AEC-Q200
Grade 0, 0603
CRCW06030000Z0EA
Vishay-Dale
0
R22
RES, 50, 1%, 0.1 W, AEC-Q200 CRCW060350R0FKEA
Grade 0, 0603
Vishay-Dale
1
R23
RES, 6.80 k, 1%, 0.1 W, 0603
RC0603FR-076K8L
Yageo
2
R24, R25
RES, 39.0, 1%, 0.1 W, 0603
RC0603FR-0739RL
Yageo
1
R26
RES, 68.0 k, 1%, 0.1 W, 0603
RC0603FR-0768KL
Yageo
1
R27
RES, 33.0 k, 0.1%, 0.1 W, 0603
RG1608P-333-B-T5
Susumu Co Ltd
1
R28
RES, 1.0, 5%, 0.1 W, AECQ200 Grade 0, 0603
CRCW06031R00JNEA
Vishay-Dale
1
R29
RES, 470 k, 5%, 0.1 W, AECQ200 Grade 0, 0603
CRCW0603470KJNEA
Vishay-Dale
2
R30, R31
RES, 1.02 k, 1%, 0.1 W, 0603
RC0603FR-071K02L
Yageo
2
R32, R33
RES, 3.92, 1%, 0.063 W, AECQ200 Grade 0, 0402
CRCW04023R92FKED
Vishay-Dale
0
R4, R6, R7
RES, 0, 5%, 0.063 W, AECQ200 Grade 0, 0402
CRCW04020000Z0ED
Vishay-Dale
1
R5
RES, 0.01, 1%, 3 W, 2512
CRA2512-FZ-R010ELF
Bourns
5
R8, R15, R16, R17, R21
RES, 0.005, 1%, 0.25 W, AECQ200 Grade 1, 0603
ERJ3LWFR005V
Panasonic
3
'R9, R10, R11, R12, R13, R14
RES, 1.8 k, 5%, 0.1 W, AECQ200 Grade 0, 0603
CRCW06031K80JNEA
Vishay-Dale
4
SH-J1, SH-J2, SH-J3, SH-J4
Shunt, 2mm, Gold plated, Black
2SN-BK-G
Samtec
11
TP1, TP2, TP3, TP5, TP6, TP7, TP8,
TP9, TP10, TP11, TP12
Test Point, Miniature, Yellow,
TH
5004
Keystone
2
TP4, TP13
Terminal, Turret, TH, Double
1502-2
Keystone
1
U1
Dual Buck Converters for Radar
Applications, RHD0028W
(VQFN-28)
TPS6565342RHDRQ1
Texas Instruments
1
U2
AT91SAM ARM-based Flash
MCU, LQFP100
ATSAM3U2CA-AU
Atmel
1
U3
Dual Linear Regulator with 300
mA and 150 mA Outputs and
Power-On-Reset, 10-pin LLP,
Pb-Free
LP3996SD-1833/NOPB
Texas Instruments
1
Y1
Crystal, 12 MHz, 12pF, SMD
CX5032GB12000H0PESZZ
AVX
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Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Original (February 2017) to A Revision .................................................................................................. Page
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