TPS71501MDCKREP

TPS71501-EP        www.ti.com ......................................................................................................................................................................................... SGLS396 – SEPTEMBER 2008 50-mA, 24-V, 3.2-µA SUPPLY CURRENT, LOW-DROPOUT LINEAR REGULATOR FEATURES 1 • Controlled Baseline – One Assembly Site – One Test Site – One Fabrication Site • Extended Temperature Performance of –55°C to 125°C • Enhanced Diminishing Manufacturing Sources (DMS) Support • Enhanced Product-Change Notification • Qualification Pedigree(1) • 24-V Maximum Input Voltage • Low 3.2-µA Quiescent Current at 50 mA • Stable With Any Capacitor (≥ 0.47 µF) • 50-mA Low-Dropout Regulator • Adjustable Output Voltage (1.2 V to 15 V) • Designed to Support MSP430 Families: – 1.9-V Version Ensured to be Higher Than Minimum VIN of 1.8 V – 2.3-V Version Ensured to Meet 2.2-V Minimum VIN for Flash on MSP430F2xx – 3.45-V Version Ensured to be Lower Than Maximum VIN of 3.6 V – Wide Variety of Fixed Output Voltage Options to Match VIN to the Minimum Required for Desired MSP430 Speed 2 (1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits. • • • APPLICATIONS • • • 1 GND 2 NC 3 Ultra-Low Power Microcontrollers Cellular/Cordless Handsets Portable/Battery-Powered Equipment DESCRIPTION The TPS71501 low-dropout (LDO) voltage regulators offer the benefits of high input voltage, low dropout voltage, low-power operation, and miniaturized packaging. The device, which operates over an input range of 2.5 V to 24 V, is stable with any capacitor (≥0.47 µF). The low dropout voltage and low quiescent current allow operation at extremely low power levels. Therefore, the devices are ideal for powering battery-management ICs. Specifically, because the devices are enabled as soon as the applied voltage reaches the minimum input voltage, the output is quickly available to power continuously operating battery-charging ICs. The usual PNP pass transistor has been replaced by a PMOS pass element. Because the PMOS pass element behaves as a low-value resistor, the low dropout voltage, typically 415 mV at 50 mA of load current, is directly proportional to the load current. The low quiescent current (3.2 µA typically) is stable over the entire range of output load current (0 mA to 50 mA). DCK PACKAGE (TOP VIEW) FB Minimum/Maximum Specified Current Limit 5-Pin SC70/SOT-323 (DCK) Package For 80-mA Rated Current and Higher Power Package, See TPS715Axx IN 5 OUT 4 IN Solar Cell TPS715xx OUT GND MSP430 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2008, Texas Instruments Incorporated On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. TPS71501-EP SGLS396 – SEPTEMBER 2008 ......................................................................................................................................................................................... www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION (1) PACKAGE (2) TJ –55°C to 125°C (1) (2) SC70 – DCK ORDERABLE PART NUMBER Reel of 3000 TPS71501MDCKREP TOP-SIDE MARKING CVP For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. ABSOLUTE MAXIMUM RATINGS over operating junction temperature range unless otherwise noted (1) (2) VIN Input voltage range IN VOUT Output voltage range OUT –0.3 V to 24 V –0.3 V to 6 V Peak output current Internally limited Continuous total power dissipation TJ Junction temperature range Tstg Storage temperature range ESD (1) (2) See Dissipation Ratings Table –55°C to 150°C –65°C to 150°C Electrostatic discharge rating Human-Body Model (HBM) 2000 V Charged-Device Model (CDM) 500 V Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under the Electrical Characteristics is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability. All voltage values are with respect to the network ground terminal. DISSIPATION RATINGS BOARD PACKAGE RθJC°C/W RθJA°C/W DERATING FACTOR ABOVE TA = +25°C TA ≤ 25°C POWER RATING TA = 70°C POWER RATING TA = 85°C POWER RATING Low-K (1) DCK 165 395 2.52 mW/°C 250 mW 140 mW 100 mW High-K (2) DCK 165 315 3.18 mW/°C 320 mW 175 mW 130 mW (1) (2) 2 The JEDEC Low-K (1s) board design used to derive this data was a 3-in × 3-in, two-layer board with 2-oz copper traces on top of the board. The JEDEC High-K (2s2p) board design used to derive this data was a 3-in × 3-in, multilayer board with 1-oz internal power and ground planes and 2-oz copper traces on top and bottom of the board. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS71501-EP TPS71501-EP www.ti.com ......................................................................................................................................................................................... SGLS396 – SEPTEMBER 2008 ELECTRICAL CHARACTERISTICS Over operating junction temperature range (TJ = –55°C to 125°C), VIN = VOUT(NOM) + 1 V, IOUT = 1 mA, and COUT = 1 µF (unless otherwise noted). Typical values are at TJ = 25°C. PARAMETER TEST CONDITIONS Input voltage (1) VIN Over VIN, IOUT, and temperature Ground pin current (2) IGND TYP UNIT 24 IO = 50 mA 3 24 1.2 15 V –6.25 +6.25 % VIN + 1.0 V ≤ VIN ≤ 24 V 100 µA ≤ IOUT ≤ 50 mA 0 ≤ IOUT ≤ 50 mA, TJ = –40°C to +85°C 3.2 4.2 0 mA ≤ IOUT ≤ 50 mA 3.2 4.8 0 mA ≤ IOUT ≤ 50 mA, VIN = 24 V ΔVOUT/ΔIOUT IOUT = 100 µA to 50 mA 22 Output voltage line regulation (1) ΔVOUT/ΔVIN VOUT + 1 V < VIN ≤ 24 V 20 BW = 200 Hz to 100 kHz, COUT = 10 µF, IOUT = 50 mA Output noise voltage Vn Output current limit ICL Power-supply ripple rejection PSRR f = 100 kHz, COUT = 10 µF Dropout voltage VIN = VOUT(NOM) – 1 V VDO IOUT = 50 mA V µA 5.8 Load regulation (1) (2) MAX 2.5 VOUT voltage range VOUT accuracy (1) MIN IO = 10 mA mV 75 mV µVrms 575 VOUT = 0 V, VIN ≥ 3.5 V 125 750 mA VOUT = 0 V, VIN < 3.5 V 90 750 mA 60 415 dB 750 mV Minimum VIN = VOUT + VDO or the value shown for Input voltage in this table, whichever is greater. See Figure 1. The TPS71501 employs a leakage null control circuit. This circuit is active only if output current is less than pass FET leakage current. The circuit is typically active when output load is less than 5 µA, VIN is greater than 18 V, and die temperature is greater than 100°C. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS71501-EP 3 TPS71501-EP SGLS396 – SEPTEMBER 2008 ......................................................................................................................................................................................... www.ti.com FUNCTIONAL BLOCK DIAGRAM V(OUT) V(IN) Current Sense Leakage Null Control Circuit ILIM _ GND R1 + FB Bandgap Reference R2 Vref = 1.205 V Figure 1. Functional Block Diagram Table 1. Terminal Functions TERMINAL 4 NAME NO. DESCRIPTION FB 1 Feedback. This terminal is used to set the output voltage. GND 2 Ground NC 3 No connection IN 4 Input supply OUT 5 Output of the regulator, any output capacitor ≥ 0.47 µF can be used for stability. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS71501-EP TPS71501-EP www.ti.com ......................................................................................................................................................................................... SGLS396 – SEPTEMBER 2008 TYPICAL CHARACTERISTICS OUTPUT VOLTAGE vs OUTPUT CURRENT OUTPUT VOLTAGE vs JUNCTION TEMPERATURE 3.320 3.305 3.300 3.295 3.290 0 10 20 30 40 3.28 3.27 3.26 VIN = 4.3 V COUT = 1 µF −40 −25 −10 5 20 35 50 65 80 95 110 125 TJ − Junction Temperature − °C Figure 4. OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY OUTPUT IMPEDANCE vs FREQUENCY DROPOUT VOLTAGE vs OUTPUT CURRENT 600 VIN = 4.3 V VOUT = 3.3 V COUT = 1 µF TJ = 25°C 16 6 IOUT = 50 mA 4 3 2 1 14 12 10 8 6 IOUT = 1 mA 4 2 0 1k 10 k f − Frequency − Hz 10 100 k VIN = 3.2 V COUT = 1 µF 500 TJ = 125°C 400 TJ = 25°C 300 200 TJ = −40°C 100 IOUT = 50 mA 0 100 V DO − Dropout Voltage − mV VIN = 4.3 V VOUT = 3.3 V COUT = 1 µF IOUT = 1 mA 100 1k 10k 100k 1M 0 10 M 0 f − Frequency − Hz 10 20 30 40 IOUT − Output Current − mA Figure 6. Figure 7. TPS71501 DROPOUT VOLTAGE vs INPUT VOLTAGE DROPOUT VOLTAGE vs JUNCTION TEMPERATURE POWER-SUPPLY RIPPLE REJECTION vs FREQUENCY 1 600 IOUT = 50 mA VIN = 3.2 V V DO − Dropout Voltage − mV 0.8 TJ = 125°C 0.7 TJ = 25°C 0.6 0.5 0.4 TJ = −40°C 0.3 0.2 500 IOUT = 50 mA 400 300 200 IOUT = 10 mA 100 0.1 0 3 6 9 12 15 VIN − Input Voltage − V Figure 8. 0 −40 −25 −10 5 20 35 50 65 80 95 110 125 TJ − Junction Temperature − °C Figure 9. PSRR − Power Supply Ripple Rejection − dB Figure 5. 0.9 0 2.5 2 18 5 3 Figure 3. 8 7 3.5 Figure 2. Zo − Output Impedance − Ω Hz IOUT = 50 mA 3.29 VIN = 4.3 V VOUT = 3.3 V IOUT = 1 µF 4 3.30 3.25 −40 −25 −10 5 20 35 50 65 80 95 110 125 TJ − Junction Temperature − °C 50 IO − Output Current − mA µ V/ IOUT = 1 mA IGND − Ground Current − µ A VOUT − Output Voltage − V VOUT − Output Voltage − V 3.31 3.310 Output Spectral Noise Density − 4.5 3.32 VIN = 4.3 V COUT = 1 µF TJ = 25°C 3.315 V DO − Dropout Voltage − V QUIESCENT CURRENT vs JUNCTION TEMPERATURE 100 VIN = 4.3 V VOUT = 3.3 V COUT = 10 µF TJ = 25°C 90 80 70 60 IOUT = 1 mA 50 40 30 20 IOUT = 50 mA 10 0 10 100 1k 10k 100k 1M Product Folder Link(s): TPS71501-EP 10 M f − Frequency − Hz Figure 10. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated 50 5 TPS71501-EP SGLS396 – SEPTEMBER 2008 ......................................................................................................................................................................................... www.ti.com TYPICAL CHARACTERISTICS (continued) DVOUT − Change in Output Voltage − mV VIN − Input Voltage − V VOUT − Output Voltage − V 6 5 4 3 VIN 2 VOUT 1 0 0 2 4 6 8 10 12 14 t − Time − ms 16 18 Figure 11. 6 20 VIN − Input Voltage − V VOUT = 3.3 V RL = 66 Ω COUT = 10 µF 7 VOUT = 3.3 V IOUT = 50 mA COUT = 10 µF 100 50 0 −50 5.3 4.3 0 50 100 150 200 250 300 350 400 450 500 t − Time − µs Figure 12. Submit Documentation Feedback LOAD TRANSIENT RESPONSE DVOUT - Change in Output Voltage - mV LINE TRANSIENT RESPONSE IOUT - Output Current - mA POWER UP / POWER DOWN 8 400 200 VIN = 4.3 V VOUT = 3.3 V COUT = 10 mF 0 -200 60 40 20 0 0 100 200 300 400 500 600 700 800 900 1000 ms t − Time − Figure 13. Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS71501-EP TPS71501-EP www.ti.com ......................................................................................................................................................................................... SGLS396 – SEPTEMBER 2008 APPLICATION INFORMATION The TPS71501 LDO regulator has been optimized for ultra-low power applications such as the MSP430 microcontroller. Its ultra-low supply current maximizes efficiency at light loads, and its high input voltage range makes it suitable for supplies such as unconditioned solar panels. External Capacitor Requirements Although not required, a 0.047-µF or larger input bypass capacitor, connected between IN and GND and located close to the device, is recommended to improve transient response and noise rejection of the power supply as a whole. A higher-value input capacitor may be necessary if large, fast-rise-time load transients are anticipated and the device is located several inches from the power source. The TPS71501 requires an output capacitor connected between OUT and GND to stabilize the internal control loop. Any capacitor (including ceramic and tantalum) ≥ 0.47 µF properly stabilizes this loop. X7R type capacitors are recommended but X5R and others may be used. Power Dissipation and Junction Temperature To ensure reliable operation, worst-case junction temperature should not exceed +125°C. This restriction limits the power dissipation the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation, PD(max), and the actual dissipation, PD, which must be less than or equal to PD(max). The maximum-power-dissipation limit is determined using the following equation: T max * T A P + J D(max) R qJA (1) where: • TJmax is the maximum allowable junction temperature. • RθJA is the thermal resistance junction-to-ambient for the package (see the Dissipation Ratings table). • TA is the ambient temperature. The regulator dissipation is calculated using: P D + ǒVIN*V OUTǓ I OUT (2) For a higher power package version of the TPS715xx, see the TPS715Axx. Regulator Protection The TPS71501 PMOS-pass transistor has a built-in back diode that conducts reverse current when the input voltage drops below the output voltage (e.g., during power-down). Current is conducted from the output to the input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting might be appropriate. The TPS71501 features internal current limiting. During normal operation, the TPS71501 limits output current to approximately 500 mA. When current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. Take care not to exceed the power dissipation ratings of the package. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS71501-EP 7 TPS71501-EP SGLS396 – SEPTEMBER 2008 ......................................................................................................................................................................................... www.ti.com Programming the TPS71501 Adjustable LDO Regulator The output voltage of the TPS71501 adjustable regulator is programmed using an external resistor divider as shown in Figure 14. The output voltage operating range is 1.2 V to 15 V, and is calculated using: ǒ1 ) R1 Ǔ R2 V OUT + VREF (3) where: • VREF = 1.205 V typ (the internal reference voltage) Resistors R1 and R2 should be chosen for approximately 1.5-µA divider current. Lower value resistors can be used for improved noise performance, but the solution consumes more power. Higher resistor values should be avoided as leakage current into/out of FB across R1/R2 creates an offset voltage that artificially increases/decreases the feedback voltage and thus erroneously decreases/increases VOUT. The recommended design procedure is to choose R2 = 1 MΩ to set the divider current at 1.5 µA, and then calculate R1 using Equation 4: R1 + ǒVV OUT REF Ǔ *1 R2 (4) OUTPUT VOLTAGE PROGRAMMING GUIDE VIN IN VOUT OUT TPS71501 R1 0.1µF GND CFB 0.47µF FB R2 VOUT + VREF OUTPUT VOLTAGE R1 R2 1.8 V 0.499 MΩ 1 MΩ 2.8 V 1.33 MΩ 1 MΩ 5.0 V 3.16 MΩ 1 MΩ ǒ1 ) R1 Ǔ R2 Figure 14. TPS71501 Adjustable LDO Regulator Programming Power the MSP430 Microcontroller Several versions of the TPS715xx are ideal for powering the MSP430 microcontroller. Table 2 shows potential applications of some voltage versions. Table 2. Typical MSP430 Applications DEVICE VOUT (TYP) TPS71519 1.9 V APPLICATION VOUT, MIN > 1.800 V required by many MSP430s. Allows lowest power consumption operation. TPS71523 2.3 V VOUT, MIN > 2.200 V required by some MSP430s FLASH operation. TPS71530 3.0 V VOUT, MIN > 2.700 V required by some MSP430s FLASH operation. TPS715345 3.45 V VOUT, MIN < 3.600 V required by some MSP430s. Allows highest speed operation. The TPS715xx family offers many output voltage versions to allow designers to minimize the supply voltage for the processing speed required of the MSP430. This minimizes the supply current consumed by the MSP430. 8 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS71501-EP PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) TPS71501MDCKREP ACTIVE SC70 DCK 5 3000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -55 to 125 CVP V62/08619-01XE ACTIVE SC70 DCK 5 3000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -55 to 125 CVP (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of