TPS71501-Q1
TPS71525-Q1, TPS71530-Q1
TPS71533-Q1, TPS71550-Q1
www.ti.com
SGLS272A – OCTOBER 2004 – REVISED OCTOBER 2004
50 mA, 24 V, 3.2-µA Supply Current
Low-Dropout Linear Regulator in SC70 Package
FEATURES
•
•
•
•
•
•
•
•
•
•
•
DESCRIPTION
(1)
Qualification in Accordance With AEC-Q100
Qualified for Automotive Applications
Customer-Specific Configuration Control Can
Be Supported Along With Major-Change
Approval
24-V Maximum Input Voltage
Low 3.2-µA Quiescent Current at 50 mA
Stable With Any Capacitor (> 0.47 µF)
50-mA Low-Dropout Regulator
Available in 2.5 V, 3 V, 3.3 V, 5 V, and
Adjustable (12 V to 15 V)
Minimum/Maximum Specified Current Limit
5-Pin SC70/SOT-323 (DCK) Package
-40°C to 125°C Specified Junction
Temperature Range
(1)
Contact Texas Instruments for details. Q100
qualification data available on request.
The TPS715xx low-dropout (LDO) voltage regulators
offer the benefits of high input voltage, low-dropout
voltage, low-power operation, and miniaturized
packaging. The devices, which operate over an input
range of 2.5 V to 24 V, are stable with any capacitor
(> 0.47 µF). The low dropout voltage and low
quiescent current allow operations at extremely low
power levels. Therefore, the devices are ideal for
powering battery management ICs. Specifically, since
the devices are enabled as soon as the applied
voltage reaches the minimum input voltage, the
output is quickly available to power continuously
operating battery charging ICs.
The usual PNP pass transistor has been replaced by
a PMOS pass element. Because the PMOS pass
element behaves as a low-value resistor, the low
dropout voltage, typically 415 mV at 50 mA of load
current, is directly proportional to the load current.
The low quiescent current (3.2 µA typically) is stable
over the entire range of output load current (0 mA to
50 mA).
APPLICATIONS
•
•
•
Ultra Low Power Microcontrollers
Cellular/Cordless Handsets
Portable/Battery-Powered Equipment
DCK PACKAGE
(TOP VIEW)
FB/NC
1
GND
2
NC
3
5
IN
OUT
OUT
TPS715xx
MSP430
Li−
4
IN
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004, Texas Instruments Incorporated
TPS71501-Q1
TPS71525-Q1, TPS71530-Q1
TPS71533-Q1, TPS71550-Q1
www.ti.com
SGLS272A – OCTOBER 2004 – REVISED OCTOBER 2004
These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
AVAILABLE OPTIONS (1)
TJ
VOLTAGE
PACKAGE
PART NUMBER
SYMBOL
2.5 V
SC70/SOT-323 (DCK)
TPS71525QDCKRQ1
ANU
3V
SC70/SOT-323 (DCK)
TPS71530QDCKRQ1
ANV
3.3 V
SC70/SOT-323 (DCK)
TPS71533QDCKRQ1
ANW
5V
SC70/SOT-323 (DCK)
TPS71550QDCKRQ1
ANX
(Adjustable) 1.2 V-15 V
SC70/SOT-323 (DCK)
TPS71501QDCKRQ1
ANS
-40°C to 125°C
(1)
Contact Texas Instruments for other voltage options between 1.25 V and 5.85 V.
ABSOLUTE MAXIMUM RATINGS
over operating temperature range (unless otherwise noted) (1) (2)
UNIT
VIN range
-0.3 V to 24 V
Peak output current
Internally limited
ESD rating, HBM
2 kV
ESD rating, CDM
500 V
Continuous total power dissipation
See Dissipation Rating Table
Junction temperature range, TJ
-40°C to 150°C
Storage temperature range, Tstg
-65°C to 150°C
(1)
(2)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground terminal.
DISSIPATION RATING TABLE
BOARD
PACKAGE
RθJC°C/W
RθJA°C/W
DERATING FACTOR
ABOVE TA = 25°C
TA ≤ 25°C
POWER RATING
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
Low-K (1)
DCK
165
395
2.52 mW/°C
250 mW
140 mW
100 mW
High-K (2)
DCK
165
315
3.18 mW/°C
320 mW
175 mW
130 mW
(1)
(2)
2
The JEDEC Low-K (1s) board design used to derive this data was a 3 inch x 3 inch, two-layer board with 2 ounce copper traces on top
of the board.
The JEDEC High-K (2s2p) board design used to derive this data was a 3 inch x 3 inch, multilayer board with 1 ounce internal power and
ground planes and 2 ounce copper traces on top and bottom of the board.
TPS71501-Q1
TPS71525-Q1, TPS71530-Q1
TPS71533-Q1, TPS71550-Q1
www.ti.com
SGLS272A – OCTOBER 2004 – REVISED OCTOBER 2004
ELECTRICAL CHARACTERISTICS
over operating junction temperature range (TJ = -40°C to 125°C), VIN = VOUT(NOM) + 1 V, IOUT = 1 mA, COUT = 1 µF unless
otherwise noted. Typical values are at TJ = 25°C.
PARAMETER
Input voltage (1)
TEST CONDITIONS
VIN
Over VIN, IOUT, and T
TYP
24
IO = 50 mA
3
24
1.2
15
-4%
+4%
VIN + 1 V ≤ VIN ≤ 24 V
100 µA ≤ IOUT ≤ 50 mA
0 mA ≤ IOUT ≤ 50 mA
3.2
Load regulation
∆VOUT/∆IOUT
IOUT = 100 µA to 50 mA
22
Output voltage
line regulation (1)
∆VOUT/∆VIN
VOUT + 1 V < VIN ≤ 24 V
20
Ground pin current
IGND
Output noise voltage
Vn
BW = 200 Hz to 100 kHz, COUT = 10 µF,
IOUT = 50 mA
Output current limit
ICL
VO = 0 V
Power-supply ripple rejection
PSRR
f = 100 kHz, COUT = 10 µF
Dropout voltage
VIN = VOUT(NOM) - 1 V
VDO
IOUT = 50 mA
(1)
MAX
2.5
VOUT voltage range (TPS71501)
VOUT accuracy (1)
MIN
IO = 10 mA
12
60
V
µA
mV
µVrms
750
60
415
V
mV
575
125
UNIT
mA
dB
750
mV
Minimum VIN = VOUT + VDO or the value shown for input voltage in this table, whichever is greater.
3
TPS71501-Q1
TPS71525-Q1, TPS71530-Q1
TPS71533-Q1, TPS71550-Q1
www.ti.com
SGLS272A – OCTOBER 2004 – REVISED OCTOBER 2004
FUNCTIONAL BLOCK DIAGRAM—ADJUSTABLE VERSION
V(OUT)
V(IN)
Current
Sense
ILIM
_
R1
+
GND
FB
R2
Vref = 1.205 V
Bandgap
Reference
FUNCTIONAL BLOCK DIAGRAM—FIXED VERSION
V(OUT)
V(IN)
Current
Sense
ILIM
_
R1
+
GND
R2
Vref = 1.205 V
Bandgap
Reference
R2 = 840 kΩ
Table 1. Terminal Functions
TERMINAL
NAME
NO.
FIXED
FB
4
DESCRIPTION
ADJ.
1
Adjustable version. This terminal is used to set the output voltage.
NC
1
No connection
GND
2
2
Ground
NC
3
3
No connection
IN
4
4
Unregulated input supply.
OUT
5
5
Output of the regulator, any output capacitor ≥ 0.47 µF can be used for stability.
TPS71501-Q1
TPS71525-Q1, TPS71530-Q1
TPS71533-Q1, TPS71550-Q1
www.ti.com
SGLS272A – OCTOBER 2004 – REVISED OCTOBER 2004
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
3.320
3.32
VOUT − Output Voltage − V
3.305
3.300
3.295
3.290
10
20
30
40
IOUT = 50 mA
3.28
3.27
3.26
VIN = 4.3 V
COUT = 1 µF
−40 −25 −10 5
20 35 50 65 80 95 110 125
TJ − Free-Air Temperature − °C
Figure 3.
OUTPUT SPECTRAL
NOISE DENSITY
vs
FREQUENCY
OUTPUT IMPEDANCE
vs
FREQUENCY
DROPOUT VOLTAGE
vs
OUTPUT CURRENT
600
VIN = 4.3 V
VOUT = 3.3 V
COUT = 1 µF
TJ = 25°C
16
6
IOUT = 50 mA
4
3
2
14
12
V DO − Dropout Voltage − mV
VIN = 4.3 V
VOUT = 3.3 V
COUT = 1 µF
IOUT = 1 mA
10
8
6
IOUT = 1 mA
4
2
1
0
100
1k
10 k
f − Frequency − Hz
100 k
VIN = 3.2 V
COUT = 1 µF
500
TJ = 125°C
400
TJ = 25°C
300
200
TJ = −40°C
100
IOUT = 50 mA
0
10
100
1k
10k
100k
1M
0
10 M
0
f − Frequency − Hz
10
20
30
40
IOUT − Output Current − mA
Figure 4.
Figure 5.
Figure 6.
TPS71501
DROPOUT VOLTAGE
vs
INPUT VOLTAGE
DROPOUT VOLTAGE
vs
FREE-AIR TEMPERATURE
POWER-SUPPLY
RIPPLE REJECTION
vs
FREQUENCY
1
600
IOUT = 50 mA
VIN = 3.2 V
0.8
V DO − Dropout Voltage − mV
0.9
TJ = 125°C
0.7
TJ = 25°C
0.6
0.5
0.4
TJ = −40°C
0.3
0.2
500
IOUT = 50 mA
400
300
200
IOUT = 10 mA
100
0.1
0
0
2.5
2
18
5
3
Figure 2.
8
7
3.5
Figure 1.
Zo − Output Impedance − Ω
Hz
µ V/
3.30
3.29
VIN = 4.3 V
VOUT = 3.3 V
IOUT = 1 µF
4
3.25
−40 −25 −10 5 20 35 50 65 80 95 110 125
TJ − Free−Air Temperature − °C
50
IO − Output Current − mA
Output Spectral Noise Density −
IOUT = 1 mA
3
6
9
VIN − Input Voltage − V
Figure 7.
12
15
0
−40 −25 −10 5 20 35 50 65 80 95 110 125
TJ − Free-Air Temperature − °C
Figure 8.
PSRR − Power Supply Ripple Rejection − dB
VOUT − Output Voltage − V
3.310
0
4.5
3.31
IGND − Ground Current − µ A
VIN = 4.3 V
COUT = 1 µF
TJ = 25°C
3.315
V DO − Dropout Voltage − V
QUIESCENT CURRENT
vs
FREE-AIR TEMPERATURE
50
100
VIN = 4.3 V
VOUT = 3.3 V
COUT = 10 µF
TJ = 25°C
90
80
70
60
IOUT = 1 mA
50
40
30
IOUT = 50 mA
20
10
0
10
100
1k
10k
100k
1M
10 M
f − Frequency − Hz
Figure 9.
5
TPS71501-Q1
TPS71525-Q1, TPS71530-Q1
TPS71533-Q1, TPS71550-Q1
www.ti.com
SGLS272A – OCTOBER 2004 – REVISED OCTOBER 2004
TYPICAL CHARACTERISTICS (continued)
VOUT = 3.3 V
RL = 66 Ω
COUT = 10 µF
6
VIN − Input Voltage − V
VOUT − Output Voltage − V
7
5
50
0
−50
4
3
VIN
2
VOUT
1
0
0
2
4
6
8 10 12 14
t − Time − ms
Figure 10.
6
VOUT = 3.3 V
IOUT = 50 mA
COUT = 10 µF
100
16 18
20
5.3
4.3
0
50 100 150 200 250 300 350 400 450 500
t − Time − ms
Figure 11.
LOAD TRANSIENT RESPONSE
VOUT − Change In
Output Voltage − mV IOUT − Output Current − mV
LINE TRANSIENT RESPONSE
VIN − Input Voltage − V
VOUT − Output Voltage − mV
POWER UP / POWER DOWN
8
400
200
VIN = 4.3 V
VOUT = 3.3 V
COUT = 10 µF
0
-200
60
40
20
0
0 100 200 300 400 500 600 700 800 900 1000
t − Time − µs
Figure 12.
TPS71501-Q1
TPS71525-Q1, TPS71530-Q1
TPS71533-Q1, TPS71550-Q1
www.ti.com
SGLS272A – OCTOBER 2004 – REVISED OCTOBER 2004
APPLICATION INFORMATION
The TPS715xx family of LDO regulators has been optimized for ultra-low power applications such as the
MSP430 microcontroller. Its ultralow supply current maximizes efficiency at light loads and its high input voltage
range makes it suitable for supplies such as unconditioned solar panels.
VI
C1
0.1 µF
4
IN
OUT
5
VO
3
NC
1
NC/FB
GND
0.47 µF
2
Figure 13. Typical Application Circuit (Fixed Voltage Version)
External Capacitor Requirements
Although not required, a 0.047-µF or larger input bypass capacitor, connected between IN and GND and located
close to the device, is recommended to improve transient response and noise rejection of the power supply as a
whole. A higher-value input capacitor may be necessary if large, fast-rise-time load transients are anticipated and
the device is located several inches from the power source.
The TPS715xx requires an output capacitor connected between OUT and GND to stabilize the internal control
loop. Any capacitor (including ceramic and tantalum) ≥ 0.47 µF properly stabilizes this loop.
Power Dissipation and Junction Temperature
To ensure reliable operation, worst-case junction temperature should not exceed 125°C. This restriction limits the
power dissipation the regulator can handle in any given application. To ensure the junction temperature is within
acceptable limits, calculate the maximum allowable dissipation, PD(max) and the actual dissipation, PD, which must
be less than or equal to PD(max).
The maximum-power-dissipation limit is determined using the following equation:
T max T
A
P
J
D(max)
R
JA
(1)
where:
• TJmax is the maximum allowable junction temperature
• RθJA is the thermal resistance junction-to-ambient for the package (see the Dissipation Ratings table)
• TA is the ambient temperature
The regulator dissipation is calculated using:
P
D
V V
I
I
O
O
(2)
Power dissipation resulting from quiescent current is negligible.
Regulator Protection
The TPS715xx PMOS-pass transistor has a built-in back diode that conducts reverse current when the input
voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the
input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting might be
appropriate.
7
TPS71501-Q1
TPS71525-Q1, TPS71530-Q1
TPS71533-Q1, TPS71550-Q1
www.ti.com
SGLS272A – OCTOBER 2004 – REVISED OCTOBER 2004
APPLICATION INFORMATION (continued)
The TPS715xx features internal current limiting. During normal operation, the TPS715xx limits output current to
approximately 500 mA. When current limiting engages, the output voltage scales back linearly until the
overcurrent condition ends. Take care not to exceed the power dissipation ratings of the package.
Programming the TPS71501 Adjustable LDO Regulator
The output voltage of the TPS71501 adjustable regulator is programmed using an external resistor divider as
shown in Figure 14. The output voltage is calculated using:
V
O
V
ref
1 R1
R2
(3)
where:
• VREF = 1.205 V typ (the internal reference voltage)
Resistors R1 and R2 should be chosen for approximately 1.5-µA divider current. Lower value resistors can be
used for improved noise performance, but the solution consumes more power. Higher resistor values should be
avoided as leakage current into/out of FB across R1/R2 creates an offset voltage that artificially
increases/decreases the feedback voltage and thus erroneously decreases/increases VO. The recommended
design procedure is to choose R2 = 1 MΩ to set the divider current at 1.5 µA and then calculate R1 using:
R1
V
V
O 1
ref
R2
(4)
TPS71501
VI
OUTPUT VOLTAGE
PROGRAMMING GUIDE
IN
0.1 µF
OUT
VO
R1
FB
GND
0.47 µF
OUTPUT
VOLTAGE
R1
1.8 V
0.499 MΩ
1 MΩ
2.8 V
1.33 MΩ
1 MΩ
5.0 V
3.16 MΩ
1 MΩ
R2
Figure 14. TPS71501 Adjustable LDO Regulator Programming
8
R2
PACKAGE OPTION ADDENDUM
www.ti.com
26-Apr-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TPS71501QDCKRQ1
ACTIVE
SC70
DCK
5
3000
TBD
CU NIPDAU
Level-1-260C-UNLIM
TPS71525QDCKRQ1
ACTIVE
SC70
DCK
5
3000
TBD
CU NIPDAU
Level-1-260C-UNLIM
TPS71533QDCKRQ1
ACTIVE
SC70
DCK
5
3000
TBD
CU NIPDAU
Level-1-260C-UNLIM
TPS71550QDCKRQ1
ACTIVE
SC70
DCK
5
3000
TBD
CU NIPDAU
Level-1-260C-UNLIM
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MPDS025C – FEBRUARY 1997 – REVISED FEBRUARY 2002
DCK (R-PDSO-G5)
PLASTIC SMALL-OUTLINE PACKAGE
0,30
0,15
0,65
5
0,10 M
4
1,40
1,10
1
0,13 NOM
2,40
1,80
3
Gage Plane
2,15
1,85
0,15
0°–8°
0,46
0,26
Seating Plane
1,10
0,80
0,10
0,00
0,10
4093553-2/D 01/02
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion.
Falls within JEDEC MO-203
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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