TPS77930DGKR

TPS77901, TPS77918, TPS77925, TPS77930 250-mA LDO REGULATOR WITH INTEGRATED RESET IN A MSOP8 PACKAGE SLVS283D – MARCH 2000 – REVISED OCTOBER 2000 D D D D D D D D D D Open Drain Power-On Reset With 220-ms Delay 250-mA Low-Dropout Voltage Regulator Available in 1.8-V, 2.5-V, 3-V, Fixed Output and Adjustable Versions Dropout Voltage Typically 200 mV at 250 mA (TPS77930) Ultralow 92-µA Quiescent Current (Typ) 8-Pin MSOP (DGK) Package Low Noise (55 µVrms) With No Bypass Capacitor (TPS77918) 2% Tolerance Over Specified Conditions For Fixed-Output Versions Fast Transient Response Thermal Shutdown Protection See the TPS773xx and TPS774xx Family of Devices for Active Low Enable description TPS779xx DGK PACKAGE (TOP VIEW) FB/SENSE RESET EN GND 1 2 3 4 8 7 6 5 OUT OUT IN IN TPS77930 DROPOUT VOLTAGE vs JUNCTION TEMPERATURE 400 VI = 2.9 V 350 VDO – Dropout Voltage – mV D 300 IO= 0.25 A 250 200 IO= 0.15 A 150 The TPS779xx is a low-dropout regulator with integrated power-on reset. The device is capable 100 of supplying 250 mA of output current with a IO= 0.05 A dropout of 200 mV (TPS77930). Quiescent 50 current is 92 µA at full load dropping down to 1 µA when the device is disabled. The device is 0 optimized to be stable with a wide range of output 90 110 130 –50 –30 –10 10 30 50 70 capacitors including low ESR ceramic (10 µF) or TJ – Junction Temperature – °C low capacitance (1 µF) tantalum capacitors. The device has extremely low noise output performance (55 µVrms) without using any added filter capacitors. TPS779xx is designed to have a fast transient response for larger load current changes. The TPS779xx is offered in 1.8-V, 2.5-V, and 3-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5.5 V). Output voltage tolerance is 2% over line, load, and temperature ranges. The TPS779xx family is available in 8-pin MSOP (DGK) packages. Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 200 mV at an output current of 250 mA for 3.3 volt option) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 92 µA over the full range of output current, 0 mA to 250 mA). These two key specifications yield a significant improvement in operating life for battery-powered systems. The device is enabled when the EN pin is connected to a high-level input voltage. This LDO family also features a sleep mode; applying a TTL low signal to EN (enable) shuts down the regulator, reducing the quiescent current to less than 1 µA at TJ = 25°C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  2000, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TPS77901, TPS77918, TPS77925, TPS77930 250-mA LDO REGULATOR WITH INTEGRATED RESET IN A MSOP8 PACKAGE SLVS283D – MARCH 2000 – REVISED OCTOBER 2000 description (continued) The TPS779xx features an integrated power-on reset, commonly used as a supply voltage supervisor (SVS), or reset output voltage. The RESET output of the TPS779xx initiates a reset in DSP, microcomputer, or microprocessor systems at power-up and in the event of an undervoltage condition. An internal comparator in the TPS779xx monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage. When OUT reaches 95% of its regulated voltage, RESET will go to a high-impedance state after a 220 ms delay. RESET will go to low-impedance state when OUT is pulled below 95% (i.e. over load condition) of its regulated voltage. AVAILABLE OPTIONS OUTPUT VOLTAGE (V) TJ – 40°C to 125°C PACKAGED DEVICES TYP MSOP (DGK) SYMBOL 3.0 TPS77930DGK AHY 2.5 TPS77925DGK AHX 1.8 TPS77918DGK AHW Adjustable 1.5 V to 5.5 V TPS77901DGK† AHV † The TPS77901 is programmable using an external resistor divider (see application information). The DGK package is available taped and reeled. Add an R suffix to the device type (e.g., TPS77901DGKR). VI 5 IN OUT 6 OUT IN SENSE 0.1 µF 3 EN RESET 7 VO 8 1 2 RESET Output + GND 10 µF 4 Figure 1. Typical Application Configuration (For Fixed Output Options) 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPS77901, TPS77918, TPS77925, TPS77930 250-mA LDO REGULATOR WITH INTEGRATED RESET IN A MSOP8 PACKAGE SLVS283D – MARCH 2000 – REVISED OCTOBER 2000 functional block diagram—adjustable version IN EN RESET _ + OUT + _ 220 ms Delay Vref = 1.1834 V R1 FB/SENSE R2 GND External to the device functional block diagram—fixed-voltage version IN EN RESET _ + OUT + _ SENSE 220 ms Delay R1 Vref = 1.1834 V R2 GND POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 TPS77901, TPS77918, TPS77925, TPS77930 250-mA LDO REGULATOR WITH INTEGRATED RESET IN A MSOP8 PACKAGE SLVS283D – MARCH 2000 – REVISED OCTOBER 2000 TPS779xx RESET timing diagram VI Vres† Vres t VIT +‡ VO VIT +‡ Threshold Voltage VIT –‡ VIT –‡ t RESET Output Output Undefined ÎÎ ÎÎ ÎÎ ÎÎ ÎÎ 220 ms Delay 220 ms Delay ÎÎ ÎÎ ÎÎ ÎÎ ÎÎ Output Undefined t † Vres is the minimum input voltage for a valid RESET. The symbol Vres is not currently listed within EIA or JEDEC standards for semiconductor symbology. ‡ VIT – Trip voltage is typically 5% lower than the output voltage (95%VO) VIT– to VIT+ is the hysteresis voltage. Terminal Functions (TPS779xx) TERMINAL NAME NO. I/O DESCRIPTION FB/SENSE 1 I Feedback input voltage for adjustable device (sense input for fixed options) RESET 2 O Reset output EN 3 I Enable input GND 4 Regulator ground IN 5, 6 I Input voltage OUT 7, 8 O Regulated output voltage 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPS77901, TPS77918, TPS77925, TPS77930 250-mA LDO REGULATOR WITH INTEGRATED RESET IN A MSOP8 PACKAGE SLVS283D – MARCH 2000 – REVISED OCTOBER 2000 detailed description pin functions enable (EN) The EN terminal is an input which enables or shuts down the device. If EN is a logic low, the device will be in shutdown mode. When EN goes to logic high, then the device will be enabled. sense (SENSE) The SENSE terminal of the fixed-output options must be connected to the regulator output, and the connection should be as short as possible. Internally, SENSE connects to a high-impedance wide-bandwidth amplifier through a resistor-divider network and noise pickup feeds through to the regulator output. It is essential to route the SENSE connection in such a way to minimize/avoid noise pickup. Adding RC networks between the SENSE terminal and VO to filter noise is not recommended because it can cause the regulator to oscillate. feedback (FB) FB is an input terminal used for the adjustable-output options and must be connected to an external feedback resistor divider. The FB connection should be as short as possible. It is essential to route it in such a way to minimize/avoid noise pickup. Adding RC networks between FB terminal and VO to filter noise is not recommended because it can cause the regulator to oscillate. reset (RESET) The RESET terminal is an open drain, active low output that indicates the status of VO. When VO reaches 95% of the regulated voltage, RESET will go to a high-impedance state after a 220-ms delay. RESET will go to a low-impedance state when Vout is below 95% of the regulated voltage. The open-drain output of the RESET terminal requires a pullup resistor. absolute maximum ratings over operating junction temperature range (unless otherwise noted)Ĕ Input voltage range‡, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 13.5 V Voltage range at EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 16.5 V Maximum RESET voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16.5 V Peak output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internally limited Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Output voltage, VO (OUT, FB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Operating virtual junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 125°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C ESD rating, HBM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. ‡ All voltage values are with respect to network terminal ground. DISSIPATION RATING TABLE – FREE-AIR TEMPERATURES PACKAGE DGK θJA θJC AIR FLOW (CFM) (°C/W) (°C/W) TA < 25°C POWER RATING DERATING FACTOR ABOVE TA = 25°C TA = 70°C POWER RATING TA = 85°C POWER RATING 0 266.2 3.84 376 mW 3.76 mW/°C 207 mW 150 mW 150 255.2 3.92 392 mW 3.92 mW/°C 216 mW 157 mW 250 242.8 4.21 412 mW 4.12 mW/°C 227 mW 165 mW POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 TPS77901, TPS77918, TPS77925, TPS77930 250-mA LDO REGULATOR WITH INTEGRATED RESET IN A MSOP8 PACKAGE SLVS283D – MARCH 2000 – REVISED OCTOBER 2000 recommended operating conditions MIN MAX UNIT Input voltage, VI† 2.7 10 Output voltage range, VO 1.5 5.5 V 0 250 mA Output current, IO (see Note 1) V Operating virtual junction temperature, TJ (see Note 1) – 40 125 °C † To calculate the minimum input voltage for your maximum output current, use the following equation: VI(min) = VO(max) + VDO(max load). NOTE 1: Continuous current and operating junction temperature are limited by internal protection circuitry, but it is not recommended that the device operate under conditions beyond those specified in this table for extended periods of time. electrical characteristics over recommended operating junction temperature range (TJ = –40°C to 125°C), VI = VO(typ) + 1 V, IO = 1 mA, EN = 5 V, CO = 10 µF (unless otherwise noted) PARAMETER TEST CONDITIONS 1.5 V ≤ VO ≤ 5.5 V, Adjustable voltage VO 1.5 V ≤ VO ≤ 5.5 V TJ = 25°C, 2.8 V < VI < 10 V 2.8 V < VI < 10 V 2 5 V Output 2.5 TJ = 25°C, 3.5 V < VI < 10 V 3.5 V < VI < 10 V 3 0 V Output 3.0 TJ = 25°C, 4.0 V < VI < 10 V 4.0 V < VI < 10 V Output noise voltage 1.8 1.764 2.45 TPS77918 Peak output current 3.06 92 0.005 1 50% duty cycle µVrms 1.3 400 °C 1 µA EN = VI 3 µA FB = 1.5 V 1 µA EN = VI, Adjustable voltage A mA 144 Standby current %/V mV 55 0.9 µA %/V 0.05 Thermal shutdown junction temperature VIH VIL 2.55 2.94 VO = 0 V 2 ms pulse width, V 3.0 TJ = 25°C BW = 300 Hz to 100 kHz, TJ = 25°C, Output current limit FB input current 1.836 2.5 VO + 1 V < VI ≤ 10 V, TJ = 25°C VO + 1 V < VI ≤ 10 V Load regulation UNIT 1.02VO 125 Output voltage line regulation (∆VO/VO) (see Note 3) Vn Io MAX VO TJ = 25°C Quiescent current (GND current) (see Notes 2 and 4) TYP 0.98VO 1 8 V Output 1.8 Output voltage g (see Notes 2 and 4) MIN TJ = 25°C TJ = 25°C High level enable input voltage 2 Low level enable input voltage Enable input current –1 V 0.7 V 1 µA Power supply ripple rejection (TPS77318, TPS77418) f = 1 KHz, TJ = 25°C 55 dB NOTES: 2. Minimum input operating voltage is 2.7 V or VO(typ) + 1 V, whichever is greater. Maximum input voltage = 10 V, minimum output current 1 mA. 3. If VO < 1.8 V then VImax = 10 V, VImin = 2.7 V: Line Regulation (mV) + ǒ%ńVǓ V O ǒ V ǒ If VO > 2.5 V then VImax = 10 V, VImin = Vo + 1 V: Line Regulation (mV) + ǒ%ńVǓ V O Ǔ * 2.7 V Imax 100 V * ǒ Imax 100 V O )1 1000 ǓǓ 1000 4. IO = 1 mA to 250 mA 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPS77901, TPS77918, TPS77925, TPS77930 250-mA LDO REGULATOR WITH INTEGRATED RESET IN A MSOP8 PACKAGE SLVS283D – MARCH 2000 – REVISED OCTOBER 2000 electrical characteristics over recommended operating junction temperature range (TJ = –40°C to 125°C), VI = VO(typ) + 1 V, IO = 1 mA, EN = 5 V, CO = 10 µF (unless otherwise noted) (continued) PARAMETER TEST CONDITIONS Trip threshold voltage I(RESET) = 300 µA VO decreasing Hysteresis voltage Measured at VO Output low voltage VI = 2.7 V, V(RESET) = 5 V Minimum input voltage for valid RESET Reset Leakage current Dropout voltage (see Note 5) TYP MAX UNIT 98% VO VO 1.1 92% V 0.5% I(RESET) = 1 mA RESET time-out delay VDO MIN 0.15 0.4 V 1 µA 220 3 V Output IO = 250 mA, IO = 250 mA TJ = 25°C ms 250 mV 475 NOTE 5: IN voltage equals VO(typ) – 100 mV; 1.8 V, and 2.5 V dropout voltage limited by input voltage range limitations (i.e., 3.3 V input voltage needs to drop to 3.2 V for purpose of this test). TYPICAL CHARACTERISTICS Table of Graphs FIGURE VO Output voltage vs Output current 2, 3 vs Junction temperature 4, 5 Ground current vs Junction temperature 6 Power supply rejection ratio vs Frequency 7 Output spectral noise density vs Frequency 8 Zo Output impedance vs Frequency 9 VDO Dropout voltage vs Input voltage 10 vs Junction temperature 11 Line transient response 12, 14 Load transient response 13, 15 Output voltage and enable pulse vs Time (at startup) Equivalent series resistance vs Output current POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 16 18 – 21 7 TPS77901, TPS77918, TPS77925, TPS77930 250-mA LDO REGULATOR WITH INTEGRATED RESET IN A MSOP8 PACKAGE SLVS283D – MARCH 2000 – REVISED OCTOBER 2000 TPS77930 TPS77918 OUTPUT VOLTAGE vs OUTPUT CURRENT OUTPUT VOLTAGE vs OUTPUT CURRENT 3.002 1.802 3.001 1.801 VO – Output Voltage – V VO – Output Voltage – V TYPICAL CHARACTERISTICS 3.0 1.800 1.799 2.999 2.998 1.798 0 50 100 150 200 IO – Output Current – mA 0 250 50 100 150 200 IO – Output Current – mA Figure 2 Figure 3 TPS77930 TPS77918 OUTPUT VOLTAGE vs JUNCTION TEMPERATURE OUTPUT VOLTAGE vs JUNCTION TEMPERATURE 1.86 3.05 VI = 2.8 V VI = 4.3 V 1.84 VO – Output Voltage – V VO – Output Voltage – V 3.03 IO = 250 mA 3.01 2.99 1.82 1.80 0 40 80 120 TJ – Junction Temperature – °C 140 1.76 –40 0 40 Figure 5 POST OFFICE BOX 655303 80 120 TJ – Junction Temperature – °C Figure 4 8 IO = 1 mA IO = 50 mA IO = 250 mA 1.78 2.97 2.95 –40 250 • DALLAS, TEXAS 75265 140 TPS77901, TPS77918, TPS77925, TPS77930 250-mA LDO REGULATOR WITH INTEGRATED RESET IN A MSOP8 PACKAGE SLVS283D – MARCH 2000 – REVISED OCTOBER 2000 TYPICAL CHARACTERISTICS TPS779xx GROUND CURRENT vs JUNCTION TEMPERATURE 115 110 Ground Current – µ A 105 100 IO = 1 mA 95 90 85 IO = 250 mA 80 –40 10 60 110 140 TJ – Junction Temperature – °C Figure 6 TPS77930 TPS77930 POWER SUPPLY REJECTION RATIO vs FREQUENCY OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY 10 Hz 90 IO = 1 mA Output Spectral Noise Density – µV/ PSRR – Power Supply Rejection Ratio – dB 100 80 70 60 50 40 30 IO = 250 mA 20 10 0 10 100 1k 10k 100k 1M 10M IO = 250 mA 1 IO = 1 mA 0.1 0.01 100 f – Frequency – Hz 1k 10k 100k f – Frequency – Hz Figure 8 Figure 7 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 TPS77901, TPS77918, TPS77925, TPS77930 250-mA LDO REGULATOR WITH INTEGRATED RESET IN A MSOP8 PACKAGE SLVS283D – MARCH 2000 – REVISED OCTOBER 2000 TYPICAL CHARACTERISTICS TPS77930 OUTPUT IMPEDANCE vs FREQUENCY 10 Zo – Output Impedance – Ω IO = 1 mA 1 0.1 IO = 250 mA 0.01 10 100 1k 10k 100k f – Frequency – Hz 1M 10M Figure 9 TPS77901 TPS77930 DROPOUT VOLTAGE vs INPUT VOLTAGE DROPOUT VOLTAGE vs JUNCTION TEMPERATURE 400 400 IO = 250 mA VI = 2.9 V TJ = 125 °C 350 TJ = 25 °C 300 VDO – Dropout Voltage – mV VDO – Dropout Voltage – mV 350 TJ = –40 °C 250 200 150 100 300 IO= 0.25 A 250 200 IO= 0.15 A 150 100 IO= 0.05 A 50 0 2.7 50 3.2 3.7 4.2 VI – Input Voltage – V 4.7 0 –50 –30 Figure 11 Figure 10 10 90 –10 10 30 50 70 TJ – Junction Temperature – °C POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 110 130 TPS77901, TPS77918, TPS77925, TPS77930 250-mA LDO REGULATOR WITH INTEGRATED RESET IN A MSOP8 PACKAGE SLVS283D – MARCH 2000 – REVISED OCTOBER 2000 TPS77918 TPS77918 LINE TRANSIENT RESPONSE LOAD TRANSIENT RESPONSE IO – Output Current – mA VI – Input Voltage – V TYPICAL CHARACTERISTICS 3.8 2.8 250 0 ∆ VO – Change in Output Voltage – mV ∆ VO – Change in Output Voltage – mV 10 0 –10 Co = 10 µF TJ = 25 °C IO = 250 mA 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 t – Time – ms 0.9 0 –50 Co = 10 µF TJ = 25 °C IO = 250 mA –100 0 1 0.2 0.8 1 1.2 1.4 1.6 t – Time – ms 1.8 2 Figure 13 Figure 12 TPS77930 TPS77930 LINE TRANSIENT RESPONSE LOAD TRANSIENT RESPONSE IO – Output Current – mA VI – Input Voltage – V 0.4 0.6 5 4 250 0 ∆ VO – Change in Output Voltage – mV ∆ VO – Change in Output Voltage – mV 10 0 –10 Co = 10 µF TJ = 25 °C IO = 250 mA 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 t – Time – ms 0.9 1 0 –50 Co = 10 µF TJ = 25 °C IO = 250 mA –100 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 t – Time – ms 0.9 1 Figure 15 Figure 14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 TPS77901, TPS77918, TPS77925, TPS77930 250-mA LDO REGULATOR WITH INTEGRATED RESET IN A MSOP8 PACKAGE SLVS283D – MARCH 2000 – REVISED OCTOBER 2000 TYPICAL CHARACTERISTICS TPS77930 VO – Output Voltage – V Enable Pulse – V OUTPUT VOLTAGE AND ENABLE PULSE vs TIME (AT STARTUP) EN 0 0 Co = 10 µF 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 t – Time (At Startup) – ms 2.0 Figure 16 VI To Load IN OUT + EN RL Co GND ESR Figure 17. Test Circuit for Typical Regions of Stability (Figures 18 through 21) (Fixed Output Options) 12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPS77901, TPS77918, TPS77925, TPS77930 250-mA LDO REGULATOR WITH INTEGRATED RESET IN A MSOP8 PACKAGE SLVS283D – MARCH 2000 – REVISED OCTOBER 2000 TYPICAL CHARACTERISTICS TYPICAL REGION OF STABILITY TYPICAL REGION OF STABILITY EQUIVALENT SERIES RESISTANCE† vs OUTPUT CURRENT EQUIVALENT SERIES RESISTANCE† vs OUTPUT CURRENT 10 Region of Instability ESR – Equivalent Series Resistance – Ω ESR – Equivalent Series Resistance – Ω 10 Region of Instability VO = 3.0 V Co = 1 µF VI = 4.3 V TJ = 25°C 1 Region of Stability 1 Region of Stability 0.1 VO = 3.0 V Co = 10 µF VI = 4.3 V TJ = 25°C Region of Instability Region of Instability 0.1 0 50 100 150 200 250 0.01 0 50 100 150 200 250 IO – Output Current – mA IO – Output Current – mA Figure 18 Figure 19 TYPICAL REGION OF STABILITY TYPICAL REGION OF STABILITY EQUIVALENT SERIES RESISTANCE† vs OUTPUT CURRENT EQUIVALENT SERIES RESISTANCE† vs OUTPUT CURRENT 10 10 ESR – Equivalent Series Resistance – Ω ESR – Equivalent Series Resistance – Ω Region of Instability Region of Instability VO = 3.0 V Co = 1 µF VI = 4.3 V TJ = 125 °C 1 Region of Stability 1 Region of Stability 0.1 VO = 3.0 V Co = 10 µF VI = 4.3 V TJ = 125°C Region of Instability Region of Instability 0.01 0.1 0 50 100 150 200 250 0 50 100 150 200 250 IO – Output Current – mA IO – Output Current – mA Figure 20 Figure 21 † Equivalent series resistance (ESR) refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance to Co. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13 TPS77901, TPS77918, TPS77925, TPS77930 250-mA LDO REGULATOR WITH INTEGRATED RESET IN A MSOP8 PACKAGE SLVS283D – MARCH 2000 – REVISED OCTOBER 2000 APPLICATION INFORMATION external capacitor requirements An input capacitor is not usually required; however, a bypass capacitor (0.047 µF or larger) improves load transient response and noise rejection if the TPS779xx is located more than a few inches from the power supply. A higher-capacitance capacitor may be necessary if large (hundreds of milliamps) load transients with fast rise times are anticipated. Most low noise LDOs require an external capacitor to further reduce noise. This will impact the cost and board space. The TPS779xx has a very low noise specification requirement without using any external component. Like all low dropout regulators, the TPS779xx requires an output capacitor connected between OUT (output of the LDO) and GND (signal ground) to stabilize the internal control loop. The minimum recommended capacitance value is 1 µF provided the ESR meets the requirement in Figures 19 and 21. In addition, a low-ESR capacitor can be used if the capacitance is at least 10 µF and the ESR meets the requirements in Figures 18 and 20. Solid tantalum electrolytic, aluminum electrolytic, and multilayer ceramic capacitors are all suitable, provided they meet the requirements described previously. Ceramic capacitors have different types of dielectric material with each exhibiting different temperature and voltage variation. The most common types are X5R, X7R, Y5U, Z5U, and NPO. The NPO type ceramic type capacitors are generally the most stable over temperature. However, the X5R and X7R are also relatively stable over temperature (with the X7R being the more stable of the two) and are therefore acceptable to use. The Y5U and Z5U types provide high capacitance in a small geometry, but exhibit large variations over temperature; therefore, the Y5U and Z5U are not generally recommended for use on this LDO. Independent of which type of capacitor is used, one must make certain that at the worst case condition the capacitance/ESR meets the requirement specified in Figures 18 through 21. Figure 22 shows the output capacitor and its parasitic impedances in a typical LDO output stage. IO LDO – VESR RESR + + VI RLOAD VO – Co Figure 22. – LDO Output Stage With Parasitic Resistances ESR 14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPS77901, TPS77918, TPS77925, TPS77930 250-mA LDO REGULATOR WITH INTEGRATED RESET IN A MSOP8 PACKAGE SLVS283D – MARCH 2000 – REVISED OCTOBER 2000 APPLICATION INFORMATION external capacitor requirements (continued) In steady state (dc state condition), the load current is supplied by the LDO (solid arrow) and the voltage across the capacitor is the same as the output voltage (V(Co) = VO). This means no current is flowing into the Co branch. If IO suddenly increases (transient condition), the following occurs: D D The LDO is not able to supply the sudden current need due to its response time (t1 in Figure 23). Therefore, capacitor Co provides the current for the new load condition (dashed arrow). Co now acts like a battery with an internal resistance, ESR. Depending on the current demand at the output, a voltage drop will occur at RESR. This voltage is shown as VESR in Figure 22. When Co is conducting current to the load, initial voltage at the load will be VO = V(Co) – VESR. Due to the discharge of Co, the output voltage VO will drop continuously until the response time t1 of the LDO is reached and the LDO will resume supplying the load. From this point, the output voltage starts rising again until it reaches the regulated voltage. This period is shown as t2 in Figure 23. The figure also shows the impact of different ESRs on the output voltage. The left brackets show different levels of ESRs where number 1 displays the lowest and number 3 displays the highest ESR. From above, the following conclusions can be drawn: D D The higher the ESR, the larger the droop at the beginning of load transient. The smaller the output capacitor, the faster the discharge time and the bigger the voltage droop during the LDO response period. conclusion To minimize the transient output droop, capacitors must have a low ESR and be large enough to support the minimum output voltage requirement. IO VO 1 2 ESR 1 3 ESR 2 ESR 3 t1 t2 Figure 23. – Correlation of Different ESRs and Their Influence to the Regulation of VO at a Load Step From Low-to-High Output Current POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15 TPS77901, TPS77918, TPS77925, TPS77930 250-mA LDO REGULATOR WITH INTEGRATED RESET IN A MSOP8 PACKAGE SLVS283D – MARCH 2000 – REVISED OCTOBER 2000 APPLICATION INFORMATION programming the TPS77901 adjustable LDO regulator The output voltage of the TPS77901 adjustable regulator is programmed using an external resistor divider as shown in Figure 24. The output voltage is calculated using: V O ǒ) Ǔ + Vref 1 R1 R2 (1) Where: Vref = 1.1834 V typ (the internal reference voltage) Resistors R1 and R2 should be chosen for approximately 50-µA divider current. Lower value resistors can be used but offer no inherent advantage and waste more power. Higher values should be avoided as leakage currents at FB increase the output voltage error. The recommended design procedure is to choose R2 = 30.1 kΩ to set the divider current at 50 µA and then calculate R1 using: R1 + ǒ Ǔ V V O ref *1 (2) R2 OUTPUT VOLTAGE PROGRAMMING GUIDE TPS77x01 VI RESET IN 0.1 µF OUTPUT VOLTAGE RESET Output 250 kΩ EN OUT VO R1 FB/SENSE GND Co R1 R2 UNIT 2.5 V 33.5 30.1 kΩ 3.3 V 53.8 30.1 kΩ 3.6 V 61.5 30.1 kΩ NOTE: To reduce noise and prevent oscillation, R1 and R2 need to be as close as possible to the FB/SENSE terminal. R2 Figure 24. TPS77901 Adjustable LDO Regulator Programming regulator protection The TPS779xx PMOS-pass transistor has a built-in back diode that conducts reverse currents when the input voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the input and is not internally limited. When extended reverse voltage is anticipated, external limiting may be appropriate. The TPS779xx also features internal current limiting and thermal protection. During normal operation, the TPS779xx limits output current to approximately 0.9 A. When current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of the device exceeds 150°C(typ), thermal-protection circuitry shuts it down. Once the device has cooled below 130°C(typ), regulator operation resumes. 16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPS77901, TPS77918, TPS77925, TPS77930 250-mA LDO REGULATOR WITH INTEGRATED RESET IN A MSOP8 PACKAGE SLVS283D – MARCH 2000 – REVISED OCTOBER 2000 APPLICATION INFORMATION power dissipation and junction temperature Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation, PD(max), and the actual dissipation, PD, which must be less than or equal to PD(max). The maximum-power-dissipation limit is determined using the following equation: P D(max) * TA + TJmax R qJA Where: TJmax is the maximum allowable junction temperature. RθJA is the thermal resistance junction-to-ambient for the package, i.e., 266.2°C/W for the 8-terminal MSOP with no airflow. TA is the ambient temperature. ǒ Ǔ The regulator dissipation is calculated using: P D + VI * VO I O Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger the thermal protection circuit. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 17 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) TPS77901DGK ACTIVE VSSOP DGK 8 80 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AHV Samples TPS77901DGKG4 ACTIVE VSSOP DGK 8 80 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AHV Samples TPS77901DGKR ACTIVE VSSOP DGK 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AHV Samples TPS77918DGK ACTIVE VSSOP DGK 8 80 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AHW Samples TPS77925DGK ACTIVE VSSOP DGK 8 80 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AHX Samples TPS77930DGK ACTIVE VSSOP DGK 8 80 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AHY Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of