TRSF3232E
SLLS825B – AUGUST 2007 – REVISED JUNE 2021
TRSF3232E 3-V TO 5.5-V Two-Channel RS-232 1-Mbit/s Line Driver and Reciever
with ±15-kV IEC ESD Protection in Small Package
1 Features
3 Description
•
•
•
•
•
•
The TRSF3232E consists of two line drivers, two line
receivers, and a dual charge-pump circuit with ±15-kV
ESD protection pin to pin (serial-port connection pins,
including GND). This device provides the electrical
interface between an asynchronous communication
controller and the serial-port connector. The charge
pump and four small external capacitors allow
operation from a single 3-V to 5.5-V supply. The
TRSF3232E operates at data signaling rates up to 1
Mbit/s and a driver output slew rate of 14 V/μs to 150
V/μs.
•
•
Operates with 3-V to 5.5-V VCC supply
Operates up to 1 Mbit/s
Low supply current: 300 μA typical
External capacitors: 4 × 0.1 μF
Accept 5-V logic input with 3.3-V supply
Latch-up performance exceeds 100 mA Per JESD
78, class II
ESD protection for RS-232 pins
– ±15-kV Human-Body Model (HBM)
– ±15-kV IEC 61000-4-2 air-gap discharge
– ±8-kV IEC 61000-4-2 contact discharge
Available in near chip scale QFN (3mmx3mm)
package (85% smaller than SOIC-16)
Device Information
PART NUMBER
2 Applications
•
•
•
•
•
•
•
•
Industrial PCs
Wired networking
Data center and enterprise computing
Battery-powered systems
PDAs
Notebooks
Palmtop PCs
Hand-held equipment
TRSF3232E
(1)
11
PACKAGE(1)
BODY SIZE (NOM)
D (SOIC)
9.90 mm x 3.91 mm
DB (SSOP)
6.20 mm x 5.30 mm
DW (SOIC)
10.3 mm x 7.50 mm
PW (TSSOP)
5.00 mm x 4.40 mm
RGT (VQFN)
3.00 mm x 3.00 mm
For all available packages, see the orderable addendum at
the end of the data sheet.
14
DIN1
DIN1
10
7
DIN2
DIN2
12
13
RIN1
ROUT1
5k
9
8
RIN2
ROUT2
5k
Logic Diagram (Positive Logic)
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TRSF3232E
www.ti.com
SLLS825B – AUGUST 2007 – REVISED JUNE 2021
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings............................................................... 4
6.3 ESD Protection, Driver................................................4
6.4 ESD Protection, Receiver........................................... 4
6.5 Recommended Operating Conditions.........................5
6.6 Thermal Information....................................................5
6.7 Electrical Characteristics.............................................5
6.8 Electrical Characteristics, Driver................................. 6
6.9 Electrical Characteristics, Receiver............................ 6
6.10 Switching Characteristics, Driver.............................. 7
6.11 Switching Characteristics, Reveiver..........................7
6.12 Typical Characteristics.............................................. 8
7 Parameter Measurement Information............................ 9
8 Detailed Description......................................................10
8.1 Overview................................................................... 10
8.2 Functional Block Diagram......................................... 10
8.3 Feature Description...................................................10
8.4 Device Functional Modes..........................................11
9 Application and Implementation.................................. 12
9.1 Application Information............................................. 12
9.2 Typical Application.................................................... 12
10 Power Supply Recommendations..............................14
11 Layout........................................................................... 14
11.1 Layout Guidelines................................................... 14
11.2 Layout Example...................................................... 14
12 Device and Documentation Support..........................15
12.1 Receiving Notification of Documentation Updates..15
12.2 Support Resources................................................. 15
12.3 Trademarks............................................................. 15
12.4 Electrostatic Discharge Caution..............................15
12.5 Glossary..................................................................15
13 Mechanical, Packaging, and Orderable
Information.................................................................... 15
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (December 2020) to Revision B (June 2021)
Page
• Added Applications: Industrial PCs, Wired networking, and Data center and enterprise computing..................1
• Changed the table note in the ESD Protection, Driver table to make it applicable to D and PW packages....... 4
• Changed the table note in the ESD Protection, Reciever table to make it applicable to D and PW packages....
4
• Changed the thermal parameter values for D and PW packages in the Thermal Information table...................5
Changes from Revision * (August 2007) to Revision A (December 2020)
Page
• Added Device Information table, ESD Ratings table, Feature Description section, Device Functional Modes,
Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section............ 1
• Added Note to the ESD Protection, Driver .........................................................................................................4
• Added Note to the ESD Protection, Receiver .................................................................................................... 4
• Added tsk(p) row for RGT package in the Switching Characteristics, Driver........................................................7
• Added tPLH and tPHL rows for RGT package in the Switching Characteristics, Reveiver ...................................7
• Added tsk(p) row for RGT package in the Switching Characteristics, Reveiver .................................................. 7
2
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TRSF3232E
TRSF3232E
www.ti.com
SLLS825B – AUGUST 2007 – REVISED JUNE 2021
5 Pin Configuration and Functions
C1+
V+
C1−
C2+
C2−
V−
DOUT2
RIN2
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC
GND
DOUT1
RIN1
ROUT1
DIN1
DIN2
ROUT2
C1-
1
C2+
2
C1+
V+
VCC
GND
16
15
14
13
12
DOUT1
11
RIN1
10
ROUT1
9
DIN1
Thermal Pad
C2-
3
V-
4
5
6
7
8
DOUT2 RIN2 ROUT2 DIN2
Figure 5-2. RGT, VQFN Package (Top View)
Figure 5-1. D, DB, DW, or PW Package (Top View)
Table 5-1. Pin Functions
PIN
NAME
I/O(1)
DESCRIPTION
D, DB, DW or PW
RGT
C1+
1
16
-
Positive lead of C1 capacitor
V+
2
15
O
Positive charge pump output for storage capacitor only
C1-
3
1
-
Negative lead of C1 capacitor
C2+
4
2
-
Positive lead of C2 capacitor
C2-
5
3
-
Negative lead of C2 capacitor
V-
6
4
O
Negative charge pump output for storage capacitor only
DOUT2
7
5
O
RS232 line data output (to remote RS232 system)
RIN2
8
6
I
RS232 line data input (from remote RS232 system)
ROUT2
9
7
O
Logic data output (to UART)
DIN2
10
8
I
Logic data input (from UART)
DIN1
11
9
I
Logic data input (from UART)
ROUT1
12
10
O
Logic data output (to UART)
RIN1
13
11
I
RS232 line data input (from remote RS232 system)
DOUT1
14
12
O
RS232 line data output (to remote RS232 system)
GRD
15
13
-
Ground
VCC
16
-
Supply Voltage, Connect to external 3-V to 5.5-V power
supply
-
Exposed thermal pad. Can be connected to GND or left
floating.
Thermal Pad
(1)
-
14
Thermal Pad
Signal Types: I = Input, O = Output, I/O = Input or Output.
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TRSF3232E
3
TRSF3232E
www.ti.com
SLLS825B – AUGUST 2007 – REVISED JUNE 2021
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) see note (1)
Supply voltage range(2)
VCC
range(2)
V+
Positive-output supply voltage
V–
Negative-output supply voltage range(2)
V+ – V–
Supply voltage
Input voltage range
VO
Output voltage range
TJ
Operating virtual junction temperature
Tstg
Storage temperature range
(2)
MAX
6
V
–0.3
7
V
0.3
–7
V
13
V
difference(2)
VI
(1)
MIN
–0.3
Drivers
–0.3
6
Receivers
–25
25
–13.2
13.2
–0.3
VCC + 0.3
Drivers
Receivers
–65
UNIT
V
V
150
°C
150
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages are with respect to network GND.
6.2 ESD Ratings
VALUE
V (ESD)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC
JS-0011.
UNIT
±3000
Charged-device model (CDM), per JEDEC specification JESD22-C1012
V
±1500
6.3 ESD Protection, Driver
PIN NAME
DOUT1, DOUT2
TEST CONDITIONS
Human-body model (HBM)
±15
IEC 61000-4-2 Air-Gap Discharge(1)
±15
Discharge(1)
±8
IEC 61000-4-2 Contact
(1)
TYP
UNIT
kV
For RGT, D and PW packages only: A minimum of 1-µF capacitor is needed between VCC and GND to meet the specified IEC ESD
level .
6.4 ESD Protection, Receiver
PIN NAME
TEST CONDITIONS
HBM
RIN1, RIN2
4
UNIT
±15
IEC 61000-4-2 Air-Gap Discharge (1)
IEC 61000-4-2 Contact Discharge
(1)
TYP
(1)
±15
kV
±8
For RGT, D and PW packages only:A minimum of 1-µF capacitor is needed between VCC and GND to meet the specified IEC ESD
level.
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TRSF3232E
TRSF3232E
www.ti.com
SLLS825B – AUGUST 2007 – REVISED JUNE 2021
6.5 Recommended Operating Conditions
See note (1)
VCC = 3.3 V
Supply voltage
VCC = 5 V
VCC = 3.3 V
VIH
Driver high-level input voltage
VIL
Driver low-level input voltage
DIN
Driver input voltage
DIN
VI
TA
(1)
DIN
NOM
MAX
3
3.3
3.6
4.5
5
5.5
2
VCC = 5 V
0.8
TRSF3232EI
TRSF3232EC
UNIT
V
V
2.4
Receiver input voltage
Operating free-air temperature
MIN
0
5.5
–25
25
–40
85
0
70
V
V
°C
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V (see Figure 9-1 ).
6.6 Thermal Information
TRSF3232E
THERMAL METRIC(1)
PW (TSSOP)
16 Pins
D (SOIC)
DB
(SSOP)
RGT (VQFN)
UNIT
16 Pins
16 Pins
85.9
57
46
48.8
°C/W
39.0
43.1
33.5
36.2
55.8
°C/W
Junction-to-board thermal
resistance
54.4
44.5
37.1
43.8
23.2
°C/W
ψ JT
Junction-to-top
characterization parameter
3.3
10.1
7.5
4.2
1.7
°C/W
ψ JB
Junction-to-board
characterization parameter
53.8
44.1
37.1
42.9
23.2
°C/W
R θJC(bot)
Junction-to-case (bottom)
thermal resistance
N/A
N/A
N/A
N/A
9.0
°C/W
R θJA
Junction-to-ambient thermal
resistance
108.2
R θJC(top)
Junction-to-case (bottom)
thermal resistance
R θJB
(1)
16 Pins
DW (SOIC)
16 Pins
For more information about traditional and new thermal metrics, see the Semiconductor and IC package thermal metrics application
report.
6.7 Electrical Characteristics
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
TEST CONDITIONS(1)
PARAMETER
ICC
(1)
(2)
Supply current
No load,
VCC = 3.3 V or 5 V
MIN
TYP(2)
MAX
0.3
1
UNIT
mA
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V (see Figure 9-1).
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TRSF3232E
5
TRSF3232E
www.ti.com
SLLS825B – AUGUST 2007 – REVISED JUNE 2021
6.8 Electrical Characteristics, Driver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
TEST CONDITIONS(1)
PARAMETER
MIN
TYP(2)
MAX
UNIT
VOH
High-level output voltage
DOUT at RL = 3 kΩ to GND,
DIN = GND
5
5.5
V
VOL
Low-level output voltage
DOUT at RL = 3 kΩ to GND,
DIN = VCC
–5
–5.4
V
IIH
High-level input current
VI = VCC
±0.01
±1
μA
IIL
Low-level input current
VI at GND
±0.01
±1
μA
VCC = 3.6 V, VO = 0 V
IOS
(3)
ro
(1)
(2)
(3)
Short-circuit output current
Output resistance
±35
±60
RGT package only
±35
±60
VCC = 5.5 V, VO = 0 V
D, DB, DW, PW
packages
±35
±90
VCC, V+, and V– = 0 V,
VO = ±2 V
300
10M
mA
Ω
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V (see Figure 9-1).
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Short-circuit durations should be controlled to prevent exceeding the device absolute power dissipation ratings, and not more than one
output should be shorted at a time.
6.9 Electrical Characteristics, Receiver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
TEST CONDITIONS(1)
PARAMETER
TYP(2)
VCC –
0.6
VCC –
0.1
MAX
VOH
High-level output voltage
IOH = –1 mA
VOL
Low-level output voltage
IOL = 1.6 mA
VIT+
Positive-going input threshold
voltage
VCC = 3.3 V
1.5
2.4
VCC = 5 V
1.8
2.4
VIT–
Negative-going input threshold
voltage
VCC = 3.3 V
0.6
1.2
VCC = 5 V
0.8
1.5
Vhys
Input hysteresis (VIT+ – VIT–)
ri
Input resistance
(1)
(2)
6
MIN
V
0.4
3
5
V
V
V
0.3
VI = ±3 V to ±25 V
UNIT
V
7
kΩ
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V (see Figure 9-1).
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TRSF3232E
TRSF3232E
www.ti.com
SLLS825B – AUGUST 2007 – REVISED JUNE 2021
6.10 Switching Characteristics, Driver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
TEST CONDITIONS(1)
Maximum data rate
(see Figure 7-1 )
tsk(p)
Pulse
SR(tr)
(1)
(2)
(3)
skew(3)
Slew rate,
transition region
(see Figure 7-1)
RL = 3 kΩ,
One DOUT switching
MIN
CL = 250 pF,VCC = 3 V to
4.5 V
1000
CL = 1000 pF,VCC = 3.5 V
to 5.5 V
1000
TYP(2)
MAX
UNIT
kbit/s
CL = 1000 pF, RL = 3 kΩ,
RGT package only
Vcc= 5 V (see Figure 7-2)
70
CL = 150 pF to 2500 pF,
RL = 3 kΩ to 7 kΩ (see
Figure 7-2)
300
ns
D, DB, DW, PW packages
RL = 3 kΩ to 7 kΩ, CL = 150 pF to 1000 pF, VCC = 3.3
V
14
150
V/μs
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V (see Figure 9-1).
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Pulse skew is defined as |tPLH – tPHL| of each channel of the same device.
6.11 Switching Characteristics, Reveiver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
TEST CONDITIONS(1)
tPLH
Propagation delay time, low- to
high-level output
CL = 150 pF
tPHL
Propagation delay time, high- to
low-level output
CL = 150 pF
tsk(p)
Pulse skew(3)
(1)
(2)
(3)
MIN
TYP(2) MAX
RGT package
85
D, DB, DW, PW packages
300
RGT package
110
D, DB, DW, PW packages
300
RGT package
25
D, DB, DW, PW packages
300
UNIT
ns
ns
ns
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V (see Figure 9-1).
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Pulse skew is defined as |tPLH – tPHL| of each channel of the same device.
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TRSF3232E
7
TRSF3232E
www.ti.com
SLLS825B – AUGUST 2007 – REVISED JUNE 2021
6.12 Typical Characteristics
120
50
Cload=150pF
Cload=250pF
Cload=1000pF
110
45
40
90
RX Pulse Skew (ns)
Driver Pulse Skew (ns)
100
80
70
60
50
40
30
35
30
25
20
15
10
20
10
5
0
0
3
3.25
3.5
3.75
4
4.25 4.5
Vcc (V)
4.75
5
5.25
5.5
3
D003
D002
Corr
D003_SLLS825.grf
Figure 6-1. Driver pulse skew at TA = 25 °C (RGT package)
3.25
3.5
3.75
4
4.25 4.5
VCC (V)
4.75
5
5.25
5.5
D004
D004_SLLS825.grf
Figure 6-2. Receiver path skew at TA = 25 °C (tpHL-tpLH) (RGT
package)
117.5
-45 qC
25 qC
85 qC
115
Receiver Path tpHL (ns)
112.5
110
107.5
105
102.5
100
97.5
95
92.5
90
3
3.25
3.5
3.75
4
4.25 4.5
Vcc (V)
4.75
5
5.25
5.5
D005
D005_SLLS825.grf
Figure 6-3. Receiver path high-to-low propogation delay,
CL = 150 pF (RGT package)
8
Figure 6-4. Receiver path low-to-high propagation delay,
CL = 150 pF (RGT package)
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TRSF3232E
TRSF3232E
www.ti.com
SLLS825B – AUGUST 2007 – REVISED JUNE 2021
7 Parameter Measurement Information
3V
Input
Generator
(see Note B)
1.5 V
RS-232
Output
50 W
RL
1.5 V
0V
t THL
CL
(see Note A)
Output
t TLH
3V
3V
−3 V
−3 V
TEST CIRCUIT
SR(tr)
t
THL
6V
or t
VOH
VOL
VOLTAGE WAVEFORMS
TLH
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 W, 50% duty cycle, tr < 10 ns, tf < 10 ns.
Figure 7-1. Driver Slew Rate
3V
Generator
(see Note B)
RS-232
Output
50 W
RL
Input
1.5 V
1.5 V
0V
CL
(see Note A)
t PHL
t PLH
VOH
50%
50%
Output
VOL
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 W, 50% duty cycle, t r < 10 ns, tf < 10 ns.
Figure 7-2. Driver Pulse Skew
3V
Input
Generator
(see Note B)
1.5 V
1.5 V
−3 V
Output
50 W
t PHL
CL
(see Note A)
t PLH
VOH
Output
50%
50%
VOL
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: Z O = 50 W, 50% duty cycle, tr < 10 ns, t f < 10 ns.
Figure 7-3. Receiver Propagation Delay Times
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TRSF3232E
9
TRSF3232E
www.ti.com
SLLS825B – AUGUST 2007 – REVISED JUNE 2021
8 Detailed Description
8.1 Overview
The TRSF3232E device consists of two line drivers, two line receivers, and a dual charge-pump circuit with ±15kV IEC ESD protection between serial-port connection terminals and GND. The device meets the requirements
of TIA/EIA-232-F and provides the electrical interface between an asynchronous communication controller and
the serial-port connector. The charge pump and four small external capacitors allow operation from one 3-V to
5.5-V supply. The device operates at data signaling rates up to 1 Mbps and a maximum of 150-V/μs driver output
slew rate. Outputs are protected against shorts to ground.
8.2 Functional Block Diagram
11
14
DIN1
DIN1
10
7
DIN2
DIN2
12
13
RIN1
ROUT1
5k
9
8
RIN2
ROUT2
5k
8.3 Feature Description
8.3.1 Power
The power block increases, inverts, and regulates voltage at V+ and V– pins using a charge pump that requires
four external capacitors.
8.3.2 RS232 Driver
Two drivers interface the standard logic level to RS232 levels. Both DIN inputs must be valid high or low.
8.3.3 RS232 Receiver
Two receivers interface RS232 levels to standard logic levels. An open input results in a high output on ROUT.
Each RIN input includes an internal standard RS232 load.
10
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TRSF3232E
TRSF3232E
www.ti.com
SLLS825B – AUGUST 2007 – REVISED JUNE 2021
8.4 Device Functional Modes
Table 8-1. Each Driver
(1)
INPUT DIN(1)
OUTPUT DOUT
L
H
H
L
H = high level, L = low level
Table 8-2. Each Receiver
(1)
INPUT RIN(1)
OUTPUT ROUT
L
H
H
L
Open
H
H = high level, L = low level,
Open = input disconnected or connected driver off
8.4.1 VCC Powered by 3 V to 5.5 V
The device is in normal operation.
8.4.2 VCC Unpowered, VCC = 0 V
When the TRSF3232E device is unpowered, it can be safely connected to an active remote RS232 device.
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TRSF3232E
11
TRSF3232E
www.ti.com
SLLS825B – AUGUST 2007 – REVISED JUNE 2021
9 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
9.1 Application Information
The TRSF3232E device is designed to convert single-ended signals into RS232-compatible signals, and viceversa. This device can be used in any application where an RS232 line driver or receiver is required.
ROUT and DIN connect to UART or general-purpose logic lines. RIN and DOUT lines connect to a RS232
connector or cable.
9.2 Typical Application
1
VCC
C1+
16
+ CBYPASS = 0.1 mF
−
+
C1
−
2
+
V+
GND
15
C3
−
14
3
DOUT1
C1−
13
4
RIN1
C2+
+
C2
5 kW
−
5 C2−
12
6
−
C4
V−
ROUT1
11
DIN1
+
DOUT2
RIN2
7
10
8
9
DIN2
ROUT2
5 kW
A.
C3 can be connected to VCC or GND.
Figure 9-1. Typical Operating Circuit and Capacitor Values
Table 9-1. VCC vs Capacitor Values
12
VCC
C1
C2, C3, C4
3.3 V ± 0.3 V
0.1 µF
0.1 µF
5 V ± 0.5 V
0.047 µF
0.33 µF
3 V to 5.5 V
0.1 µF
0.47 µF
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TRSF3232E
TRSF3232E
www.ti.com
SLLS825B – AUGUST 2007 – REVISED JUNE 2021
9.2.1 Design Requirements
•
•
Recommended VCC is 3.3 V or 5 V
– 3 V to 5.5 V is also possible
Maximum recommended bit rate is 250 kbites
Table 9-2. VCC versus Capacitor Values
VCC
C1
C2, C3, C4
3.3 V ± 0.3 V
0.1 µF
0.1 µF
5 V ± 0.5 V
0.047 µF
0.33 µF
3 V to 5.5 V
0.1 µF
0.47 µF
9.2.2 Detailed Design Procedure
All DIN inputs must be connected to valid low or high logic levels. Select capacitor values based on VCC level
for best performance.
9.2.3 Application Performance Plots
VCC must be between 3 V and 5.5 V. Charge pump capacitors must be chosen using Table 3
Figure 9-2. 1 Mbps timing waveform from driver input to receiver output loopback. DOUT to RIN trace is
in purple, DIN trace is in yellow and ROUT trace is in pink
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TRSF3232E
13
TRSF3232E
www.ti.com
SLLS825B – AUGUST 2007 – REVISED JUNE 2021
10 Power Supply Recommendations
The supply voltage, VCC, should be between 3 V and 5.5 V. Select the charge-pump capacitors using Table 3.
11 Layout
11.1 Layout Guidelines
Keep the external capacitor traces short, specifically on the C1 and C2 nodes that have the fastest rise and fall
times.
11.2 Layout Example
Ground
C3
C1
1 C1+
VCC 16
2 V+
GND 15
3 C1–
DOUT1 14
4 C2+
RIN1 13
5 C2–
ROUT1 12
VCC
0.1µF
Ground
C2
Ground
6 V–
DIN1 11
7 DOUT2
DIN2 10
C4
8 RIN2
ROUT2 9
Figure 11-1. Layout Diagram
14
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TRSF3232E
TRSF3232E
www.ti.com
SLLS825B – AUGUST 2007 – REVISED JUNE 2021
12 Device and Documentation Support
TI offers an extensive line of development tools. Tools and software to evaluate the performance of the device,
generate code, and develop solutions are listed below.
12.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
12.2 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
12.3 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
12.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
12.5 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TRSF3232E
15
PACKAGE OPTION ADDENDUM
www.ti.com
14-Oct-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
TRSF3232ECDB
ACTIVE
SSOP
DB
16
80
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
RT32EC
Samples
TRSF3232ECDBR
ACTIVE
SSOP
DB
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
RT32EC
Samples
TRSF3232ECDR
ACTIVE
SOIC
D
16
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
TRSF3232EC
Samples
TRSF3232ECDWR
ACTIVE
SOIC
DW
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
TRSF3232EC
Samples
TRSF3232ECPWR
ACTIVE
TSSOP
PW
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
RT32EC
Samples
TRSF3232EIDBR
ACTIVE
SSOP
DB
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
RT32EI
Samples
TRSF3232EIDR
ACTIVE
SOIC
D
16
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
TRSF3232EI
Samples
TRSF3232EIDW
ACTIVE
SOIC
DW
16
40
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
TRSF3232EI
Samples
TRSF3232EIDWR
ACTIVE
SOIC
DW
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
TRSF3232EI
Samples
TRSF3232EIPWR
ACTIVE
TSSOP
PW
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
RT32EI
Samples
TRSF3232EIRGTR
ACTIVE
VQFN
RGT
16
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
F3232
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
工商网监
湘ICP备2023018690号
