UC2909MDWREP

UC2909-EP www.ti.com SLUSA72 – JULY 2010 SWITCHMODE LEAD-ACID BATTERY CHARGER Check for Samples: UC2909-EP FEATURES 1 • • • • • • Accurate and Efficient Control of Battery Charging Average Current Mode Control from Trickle to Overcharge Resistor Programmable Charge Currents Thermistor Interface Tracks Battery Requirements Over Temperature Output Status Bits Report on Four Internal Charge States Undervoltage Lockout Monitors VCC and VREF SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS • • • • • • • • (1) Controlled Baseline One Assembly/Test Site One Fabrication Site Available in Military (–55°C/125°C) Temperature Range (1) Extended Product Life Cycle Extended Product-Change Notification Product Traceability Not to Exceed 185.35-KHz Oscillation Frequency at 125°C Additional temperature ranges available - contact factory DESCRIPTION The UC2909 controls lead acid battery charging with a highly efficient average current mode control loop. This chip combines charge state logic with average current PWM control circuitry. Charge state logic commands current or voltage control depending on the charge state. The chip includes undervoltage lockout circuitry to insure sufficient supply voltage is present before output switching starts. Additional circuit blocks include a differential current sense amplifier, a 1.5% voltage reference, a –3.9-mV/°C thermistor linearization circuit, voltage and current error amplifiers, a PWM oscillator, a PWM comparator, a PWM latch, charge state decode bits, and a 100-mA open collector output driver. FUNCTION BLOCK DIAGRAM 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2010, Texas Instruments Incorporated UC2909-EP SLUSA72 – JULY 2010 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION (1) (1) (2) TA PACKAGE (2) ORDERABLE PART NUMBER TOP-SIDE MARKING -55°C to 125°C DW UC2909MDWREP UC2909EP For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI Web site at www.ti.com. Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. ABSOLUTE MAXIMUM RATINGS (1) (2) over operating free-air temperature range unless otherwise noted UNITS VCC Supply voltage OUT, STAT0, STAT1 Output current sink CS+, CSRemaining pin voltages 40 V 0.1 A –0.4 to VCC (3) V –0.3 to 9 V Tstg Storage temperature -55 to 150 °C TJ Junction temperature range -55 to 150 °C 300 °C Lead temperature (soldering, 10 seconds) (1) (2) (3) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to the network ground terminal unless otherwise noted. All currents are positive into, negative out of the specified terminal. Consult Packaging Section of Databook for thermal limitations and considerations of packages. Voltages more negative than -0.4 V can be tolerated if current is limited to 50 mA. DW PACKAGE (TOP VIEW) 2 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): UC2909-EP UC2909-EP www.ti.com SLUSA72 – JULY 2010 ELECTRICAL CHARACTERISTICS TA = –55°C to 125°C; CT = 430 pF, RSET = 11.5 KΩ, R10 = 10 KΩ, RTHM = 10 KΩ, VCC = 15 V, Output no load, RSTAT0 = RSTAT1 = 10 KΩ, CHGENB = OVCTAP = VLOGIC, TA = TJ (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX CS- = 0 V, CS+ = -50 mV; CS+ = –200 mV 4.8 5 5.7 CS+ = 0 V, CS- = 50 mV; CS- = 250 mV 4.8 5 5.1 UNIT CURRENT SENSE AMPLIFIER (CSA) (VID = CS+ - CS-) DC gain VOFFSET Offset voltage (VCSO - VCAO) CMRR V/V CS+ = CS- = 2.3 V, CAO = CA- 45 VCM = -0.2 V to VCC - 2, 8.8 V < VCC < 14 V 50 VCM = -0.2 V to VCC, 14 V < VCC < 35 V 50 VOL VID = -550 mV, -0.2 V < VCM < VCC - 2, IO = 500 µA VOH VID = 700 mV, -0.2 V < VCM < VCC - 2, IO = -250 µA Output source current VID = 700 mV, CSO = 4 V Output sink current VID = -55 0mV, CSO = 1 V 3dB bandwidth (1) VID = 90 mV, VCM = 0 V mV dB 0.3 0.6 V 5.2 5.7 6.2 V -1 -0.5 mA 3 4.5 mA 200 KHz CURRENT ERROR AMPLIFIER (CEA) IB 8.8 V < VCC < 35 V, VCHGENB = VLOGIC VIO (2) 8.8 V < VCC < 35 V, CAO = CA- AVO 1 V < VAO < 4 V GBW TJ = 25°C, f = 100 KHz VOL IO = 250 µA VOH IO = –5 mA Output source current CAO = 4 V Output sink current CAO = 1 V ICA-, ITRCK_CONTRO VCHGENB = GND 0.1 0.8 µA 10 mV 60 90 dB 1 1.5 MHz 0.4 4.5 0.6 V -12 mA 5 -25 V 2 3 mA 8.5 10 11.5 µA 1 µA L VOLTAGE AMPLIFIER (CEA) IB Total bias current; regulating level 0.1 VIO (2) 8.8 V < VCC < 35 V, VCM = 2.3 V, VAO = VA- 1.2 AVO 1 V < CAO < 4 V GBW TJ = 25°C, f = 100 KHz VOL IO = 500 µA VOH (1) (2) IO = -500 µA mV 60 90 dB 0.25 0.5 MHz 0.4 0.6 5.25 V 4.75 5 Output source current CAO = 4 V -2 -1 mA Output sink current CAO = 1 V 2 2.5 mA VAO leakage: high impedance state VCHGENB = GND, STAT0 = 0 and STAT1 = 0, VAO = 2.3 V -1 1 V µA Not tested in production. VIO is measured prior to packaging with internal probe pad. Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): UC2909-EP 3 UC2909-EP SLUSA72 – JULY 2010 www.ti.com ELECTRICAL CHARACTERISTICS (continued) TA = –55°C to 125°C; CT = 430 pF, RSET = 11.5 KΩ, R10 = 10 KΩ, RTHM = 10 KΩ, VCC = 15 V, Output no load, RSTAT0 = RSTAT1 = 10 KΩ, CHGENB = OVCTAP = VLOGIC, TA = TJ (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT PULSE WIDTH MODULATOR Maximum duty cycle CAO = 0.6 V 90 95 100 % Modulator gain CAO = 2.5 V, 3.2 V 63 71 80 %/V OSC peak 3 V OSC valley 1 V OSCILLATOR Frequency 8.8 V < VCC < 35 V 151.65 168.50 185.35 KHz 2.250 2.300 2.350 V 3 10 THERMISTOR DERIVED (VID = VRTHM - VR10) Initial accuracy, VAO (RTHM = 10 KΩ) VID = 0 V, R10 = RTHM = 10 KΩ (3) Line regulation VCC = 8.8 V to 35 V VAO RTHM = 138 KΩ, R10 = 10 KΩ 2.435 2.495 2.545 RTHM = 33.63 KΩ, R10 = 10 KΩ 2.340 2.398 2.446 RTHM = 1.014 KΩ, R10 = 10 KΩ 2.015 2.066 2.107 1.01 mV V CHARGE ENABLE COMPARATOR (CEC) Threshold voltage As a function of VA- 0.99 1 Input bias current CHGENB = 2.3 V -0.5 -0.1 STAT0 = 0, STAT1 = 0, Function of VREF 0.944 0.95 0.955 STAT0 = 1, STAT1 = 0, Function of VREF 0.895 0.9 0.905 1.01 V/V µA VOLTAGE SENSE COMPARATOR (VSC) Threshold voltage V/V OVER CHARGE TAPER CURRENT COMPARATOR (OCTIC) Threshold voltage Function of 2.3 V REF, CA- = CAO 0.99 1 Input bias current OVCTAP = 2.3 V -0.5 -0.1 4.875 5 5.125 V/V µA LOGIC 5 V (VLOGIC) VLOGIC VCC = 15 V V Line regulation 8.8 V < VCC < 35 V 3 15 mV Load regulation 0 A < IO < 10 mA 3 15 mV 4.3 4.85 50 80 Reference comparator turn-on threshold Short circuit current VREF = 0 V 30 V mA OUTPUT STAGE ISINK continuous 50 IPEAK 100 VOL IO = 50 mA Leakage current (3) 4 mA VOUT = 35 V 1 mA 1.4 V 25 µA Thermistor initial accuracy is measured and trimmed with respect to VAO; VAO = VA-. Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): UC2909-EP UC2909-EP www.ti.com SLUSA72 – JULY 2010 ELECTRICAL CHARACTERISTICS (continued) TA = –55°C to 125°C; CT = 430 pF, RSET = 11.5 KΩ, R10 = 10 KΩ, RTHM = 10 KΩ, VCC = 15 V, Output no load, RSTAT0 = RSTAT1 = 10 KΩ, CHGENB = OVCTAP = VLOGIC, TA = TJ (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT STAT0 AND STAT1 OPEN COLLECTOR OUTPUTS Maximum sink current VOUT = 8.8 V Saturation voltage IOUT = 5 mA Leakage current VOUT = 35 V 5 10 0.1 mA 0.45 V 25 µA STATLV OPEN COLLECTOR OUTPUTS Maximum sink current VOUT = 5 V Saturation voltage IOUT = 2 mA 2 Leakage current VOUT = 5 V 5 0.1 mA 0.45 V 3 µA UVLO Turn-on Threshold 6.8 7.8 8.8 V Hysteresis 100 300 500 mV 19 mA ICC ICC (run) See Figure 1 13 ICC (off) VCC = 6.5 V 2 -40 -20 0 20 40 80 mA 100 Figure 1. ICC vs Temperature Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): UC2909-EP 5 UC2909-EP SLUSA72 – JULY 2010 www.ti.com 1000.0 Wirebond Voiding Fail Mode Estimated Life (Years) 100.0 Electromigration Fail Mode 10.0 1.0 0.1 80 90 100 110 120 130 140 150 160 170 180 Continuous TJ (°C) Notes: 1. See datasheet for absolute maximum and minimum recommended operating conditions. 2. Silicon operating life design goal is 10 years at 105°C junction temperature (does not include package interconnect life). 3. Enhanced plastic product disclaimer applies. Figure 2. UC2909-EP Operating Life Derating Chart 6 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): UC2909-EP UC2909-EP www.ti.com SLUSA72 – JULY 2010 DEVICE INFORMATION TERMINAL FUNCTIONS TERMINAL NAME DESCRIPTION NO. CA- 13 The inverting input to the current error amplifier. CAO 14 The output of the current error amplifier which is internally clamped to approximately 4 V. It is internally connected to the inverting input of the PWM comparator. CS-, CS+ 17, 16 The inverting and non-inverting inputs to the current sense amplifier. This amplifier has a fixed gain of five and a common-mode voltage range of from –250 mV to VCC. CSO 15 The output of the current sense amplifier which is internally clamped to approximately 5.7 V. CHGENB 10 The input to a comparator that detects when battery voltage is low and places the charger in a trickle charge state. The charge enable comparator makes the output of the voltage error amplifier a high impedance while forcing a fixed 10 mA into CA- to set the trickle charge current. GND 3 The reference point for the internal reference, all thresholds, and the return for the remainder of the device. The output sink transistor is wired directly to this pin. OVCTAP 9 The overcharge current taper pin detects when the output current has tapered to the float threshold in the overcharge state. The oscillator ramp pin which has a capacitor (CT) to ground. The ramp oscillates between approximately 1 V to 3 V and the frequency is approximated by: OSC 19 1 frequency = ¾ 1.2 · CT · RSET (1) OUT 5 The output of the PWM driver which consists of an open collector output transistor with 100-mA sink capability. R10 20 Input used to establish a differential voltage corresponding to the temperature of the thermistor. Connect a 10-KΩ resistor to ground from this point. A resistor to ground programs the oscillator charge current and the trickle control current for the oscillator ramp. The oscillator charge current is approximately: RSET 18 1.75 ¾ RSET (2) The trickle control current (ITRCK_CONTROL) is approximately: 0.115 ¾ RSET (3) RTHM 1 A 10-KΩ thermistor is connected to ground and is thermally connected to the battery. The resistance will vary exponentially over temperature and its change is used to vary the internal 2.3-V reference by -3.9 mV/°C. The recommended thermistor for this function is part number L1005-5744-103-D1, Keystone Carbon Company, St. Marys, PA. STAT0 7 This open collector pin is the first decode bit used to decode the charge states. STAT1 6 This open collector pin is the second decode bit used to decode the charge states. STATLV 8 This bit is high when the charger is in the float state. VA- 12 The inverting input to the voltage error amplifier. VAO 11 The output of the voltage error amplifier. The upper output clamp voltage of this amplifier is 5 V. VCC 4 The input voltage to the chip. The chip is operational between 7.5 V and 40 V and should be bypassed with a 1-µF capacitor. A typical ICC vs. temperature is shown in Figure 1. VLOGIC 2 The precision reference voltage. It should be bypassed with a 0.1-µF capacitor. Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): UC2909-EP 7 UC2909-EP SLUSA72 – JULY 2010 www.ti.com CHARGE STATE DECODE CHART STAT0 and STAT1 are open collector outputs. The output is approximately 0.2 V for a logic 0. 8 STAT1 STAT0 Trickle charge 0 0 Bulk charge 0 1 Over charge 1 0 Float charge 1 1 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): UC2909-EP UC2909-EP www.ti.com SLUSA72 – JULY 2010 APPLICATION INFORMATION A block diagram of the UC2909 is shown on the first page, while a typical application circuit is shown in Figure 3. The circuit in Figure 3 requires a DC input voltage between 12 V and 40 V. The UC2909 uses a voltage control loop with average current limiting to precisely control the charge rate of a lead-acid battery. The small increase in complexity of average current limiting is offset by the relative simplicity of the control loop design. Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): UC2909-EP 9 UC2909-EP www.ti.com 430 SLUSA72 – JULY 2010 Figure 3. Typical Application Circuit 10 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): UC2909-EP UC2909-EP www.ti.com SLUSA72 – JULY 2010 Control Loop Current Sense Amplifier This amplifier measures the voltage across the sense resistor RS with a fixed gain of five and an offset voltage of 2.3 V. This voltage is proportional to the battery current. The most positive voltage end of RS is connected to CSensuring the correct polarity going into the PWM comparator. CSO = 2.3 V when there is zero battery current. RS is chosen by dividing 350 mV by the maximum allowable load current. A smaller value for RS can be chosen to reduce power dissipation. Maximum charge current, Ibulk, is set by knowing the maximum voltage error amplifier output, VOH = 5 V, the maximum allowable drop across RS, and setting the resistors RG1 and RG2 such that: 5 · VRS 5 · VRS 5 · VRS RG1 ¾ ¾ ¾ = RG2 = VLOGIC - CA- = 5¾ V - 2.3 V 2.7 V = 1.852 · IBULK · RS (4) The maximum allowable drop across RS is specified to limit the maximum swing at CSO to approximately 2 V to keep the CSO amplifier output from saturating. No charge/load current: VCSO = 2.3 V Max charge/load current: Vmax(CSO) = 2.3 V - 2 V = 0.3 V Voltage Error Amplifier The voltage error amplifier (VEA) senses the battery voltage and compares it to the 2.3-V - 3.9-mV/°C thermistor generated reference. Its output becomes the current command signal and is summed with the current sense amplifier output. A 5-V voltage error amplifier upper clamp limits maximum load current. During the trickle charge state, the voltage amplifier output is opened (high impedance output) by the charge enable comparator. A trickle bias current is summed into the CA- input which sets the maximum trickle charge current. The VEA, VOH = 5 V clamp saturates the voltage loop and consequently limits the charge current as stated in Equation 4. During the trickle bias state the maximum allowable charge current (ITC) is similarly determined: ITRCK_CONTROL · RG1 ITC = ¾ RS · 5 (5) ITRCK_CONTROL is the fixed control current into CA-. ITRCK_CONTROL is 10 µA when RSET = 11.5 KΩ. See RSET pin description for equation. Current Error Amplifier The current error amplifier (CA) compares the output of the current sense amplifier to the output of the voltage error amplifier. The output of the CA forces a PWM duty cycle which results in the correct average battery current. With integral compensation, the CA will have a very high DC current gain, resulting in effectively no average DC current error. For stability purposes, the high frequency gain of the CA must be designed such that the magnitude of the down slope of the CA output signal is less than or equal to the magnitude of the up slope of the PWM ramp. Charge Algorithm Trickle Charge State STAT0 = STAT1 = STATLV = logic 0 = When CHGNB is less than VREF (2.3 V - 3.9 mV/°C), STATLV is forced low. This decreases the sense voltage divider ratio, forcing the battery to overcharge (VOC). = (RS1 + RS2 + RS3 RS4) VOC = (VREF) · ¾ (RS3 RS4) (6) Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): UC2909-EP 11 UC2909-EP SLUSA72 – JULY 2010 www.ti.com During the trickle charge state, the output of the voltage error amplifier is high impedance. The trickle control current is directed into the CA- pin setting the maximum trickle charge current. The trickle charge current is defined in Equation 5. Bulk Charge State STAT1 = STATLV = logic 0, STAT0 = logic 1 (RS1 + RS2 + RS3 RS4) ¾ (RS2 + RS3 RS4) = VT = (VREF) · = As the battery charges, the UC2909 will transition from trickle to bulk charge when CHGENB becomes greater than 2.3 V. The transition equation is: (7) STATLV is still driven low. During the bulk charge state, the voltage error amplifier is now operational and is commanding maximum charge current (IBULK) set by Equation 4. The voltage loop attempts to force the battery to VOC. Overcharge State STAT0 = STATLV = logic 0, STAT1 = logic 1 The battery voltage surpasses 95% of VOC indicating the UC2909 is in its overcharge state. During the overcharge charge state, the voltage loop becomes stable and the charge current begins to taper off. As the charge current tapers off, the voltage at CSO increases toward its null point of 2.3 V. The center connection of the two resistors between CSO and VLOGIC sets the overcurrent taper threshold (OVCTAP). Knowing the desired overcharge terminate current (IOCT), the resistors ROVC1 and ROVC2 can be calculated by choosing a value of ROVC2 and using the following equation: ROVC1 = (1.8518) · IOCT · RS · ROVC2 (8) Float State STAT0 = STAT1 = STATLV = logic 1 The battery charge current tapers below its OVCTAP threshold, and forces STATLV high increasing the voltage sense divider ratio. The voltage loop now forces the battery charger to regulate at its float state voltage (VF). VF = (VREF) · (RS1 + RS2 + RS3) ¾ RS3 (9) If the load drains the battery to less than 90% of VF, the charger goes back to the bulk charge state, STATE 1. Off Line Applications For off line charge applications, either Figure 4 or Figure 5 can be used as a baseline. Figure 4 has the advantage of high frequency operation resulting in a small isolation transformer. Figure 5 is a simpler design, but at the expense of larger magnetics. 12 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): UC2909-EP UC2909-EP www.ti.com SLUSA72 – JULY 2010 UC2909 Figure 4. Off Line Charger With Primary Side PWM Figure 5. Isolated Off Line Charger Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): UC2909-EP 13 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) UC2909MDWREP ACTIVE SOIC DW 20 2000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -55 to 125 UC2909EP V62/10616-01XE ACTIVE SOIC DW 20 2000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -55 to 125 UC2909EP (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of