UC2909
UC3909
Switchmode Lead-Acid Battery Charger
FEATURES
DESCRIPTION
• Accurate and Efficient Control of
Battery Charging
The UC3909 family of Switchmode Lead-Acid Battery Chargers accurately
controls lead acid battery charging with a highly efficient average current
mode control loop. This chip combines charge state logic with average current PWM control circuitry. Charge state logic commands current or voltage
control depending on the charge state. The chip includes undervoltage
lockout circuitry to insure sufficient supply voltage is present before output
switching starts. Additional circuit blocks include a differential current sense
amplifier, a 1.5% voltage reference, a –3.9mV/°C thermistor linearization
circuit, voltage and current error amplifiers, a PWM oscillator, a PWM comparator, a PWM latch, charge state decode bits, and a 100mA open collector output driver.
• Average Current Mode Control from
Trickle to Overcharge
• Resistor Programmable Charge
Currents
• Thermistor Interface Tracks Battery
Requirements Over Temperature
• Output Status Bits Report on Four
Internal Charge States
• Undervoltage Lockout Monitors VCC
and VREF
BLOCK DIAGRAM
Pin numbers refer to J, N, DW packages.
1/99
UDG-95007-1
UC2909
UC3909
ABSOLUTE MAXIMUM RATINGS
Supply Voltage (VCC), OUT, STAT0, STAT1 . . . . . . . . . . . 40V
Output Current Sink . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.1A
CS+, CS- . . . . . . . . . . . . . . . . . . . . . . . . . . -0.4 to VCC (Note 1)
Remaining Pin Voltages. . . . . . . . . . . . . . . . . . . . . . -0.3V to 9V
Storage Temperature . . . . . . . . . . . . . . . . . . . -65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . -55°C to +150°C
Lead Temperature (Soldering, 10 sec.) . . . . . . . . . . . . . +300°C
All currents are positive into, negative out of the specified terminal. Consult Packaging Section of Databook for thermal limitations and considerations of packages.
Note 1: Voltages more negative than -0.4V can be tolerated if
current is limited to 50mA.
CONNECTION DIAGRAMS
DIL-20, (Top View)
J or N, DW Packages
LCC-28, PLCC-28 (Top View)
L, Q Packages
ELECTRICAL CHARACTERISTICS: Unless otherwise stated these specifications apply for TA = –40°C to +85°C for
UC2909; °0C to +70°C for UC3909; CT = 330pF, RSET = 11.5k, R10 = 10k, RTHM = 10k, VCC = 15V, Output no load, RSTAT0 =
RSTAT1 = 10k, CHGENB = OVCTAP = VLOGIC, TA = TJ.
PARAMETER
Current Sense AMP (CSA) Section
DC Gain
TEST CONDITIONS
MIN
TYP
MAX UNITS
CS– = 0, CS+ = -50mV; CS+ = –250mV
4.90
5
5.10
V/V
CS+ = 0, CS– = 50mV; CS–- = 250mV
4.90
5
5.10
V/V
15
mV
VID = CS+ – CS–
VOFFSET (VCSO – VCAO)
CS+ = CS– = 2.3V, CAO = CA–
CMRR
VCM = –0.25 to VCC – 2, 8.8 < VCC < 14
50
VCM = –0.25 to VCC, 14 < VCC < 35
50
VOL
VID = –550mV, –0.25V < VCM < VCC–2,
IO = 500µA
VOH
VID = +700mV, –0.25V < VCM < VCC–2,
IO = –250µA
Output Source Current
VID = +700mV, CSO = 4V
Output Sink Current
VID = –550mV, CSO = 1V
3dB Bandwidth
VID = 90mV, VCM = 0V
2
dB
dB
0.3
0.6
V
5.2
5.7
6.2
V
–1
–0.5
mA
3
4.5
200
mA
kHz
UC2909
UC3909
ELECTRICAL CHARACTERISTICS: Unless otherwise stated these specifications apply for TA = –40°C to +85°C for
UC2909; °0C to +70°C for UC3909; CT = 330pF, RSET = 11.5k, R10 = 10k, RTHM = 10k, VCC = 15V, Output no load, RSTAT0 =
RSTAT1 = 10k, CHGENB = OVCTAP = VLOGIC, TA = TJ.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNITS
Current Error Amplifier (CEA) Section
IB
8.8V < VCC < 35V, VCHGENB = VLOGIC
VIO (Note 2)
8.8V < VCC < 35V, CAO = CA–
0.1
0.8
µA
10
mV
AVO
1V < VAO < 4V
60
90
dB
GBW
TJ = 25°C, F = 100kHz
1
1.5
MHz
VOL
IO = 250µA
VOH
IO = –5mA
Output Source Current
CAO = 4V
Output Sink Current
CAO = 1V
ICA–, ITRCK_CONTROL
VCHGENB = GND
0.4
4.5
0.6
5
–25
V
V
–12
2
3
8.5
10
11.5
1
mA
mA
µA
Voltage Amplifier (CEA) Section
IB
Total Bias Current; Regulating Level
0.1
VIO (Note 2)
8.8V < VCC < 35V, VCM = 2.3V, VAO = VA–
1.2
µA
mV
AVO
1V < CAO < 4V
GBW
TJ = 25°C, F = 100kHz
60
90
dB
0.25
0.5
MHz
VOL
IO = 500µA
VOH
IO = –500µA
Output Source Current
CAO = 4V
–2
–1
mA
Output Sink Current
CAO = 1V
2
2.5
mA
VAO Leakage: High Impedance State
VCHGENB = GND, STAT0 = 0 & STAT1 = 0,
VAO = 2.3V
–1
Maximum Duty Cycle
CAO = 0.6V
90
95
100
%
Modulator Gain
CAO = 2.5V, 3.2V
63
71
80
%/V
4.75
0.4
0.6
V
5
5.25
V
1
µA
Pulse Width Modulator Section
OSC Peak
3
V
OSC Valley
1
V
Oscillator Section
Frequency
Thermistor Derived Reference Section
Initial Accuracy, VAO (RTHM = 10k)
8.8V < VCC < 35V
198
220
242
kHz
VID = 0, R10 = RTHM =10k (Note 3)
2.2655
2.3
2.3345
V
VID = 0, R10 = RTHM =10k, –40°C ≤TA < 0°C
(Note 3)
2.254
2.3
2.346
V
3
10
mV
2.458
2.495
2.532
V
VID = VRTHM – VR10
Line Regulation
VCC = 8.8V to 35V
VAO
RTHM = 138k, R10 = 10k
RTHM = 138k, R10 = 10k, -40°C ≤ TA < 0°C
2.445
2.495
2.545
V
RTHM = 33.63k, R10 = 10k
2.362
2.398
2.434
V
RTHM = 33.63k, R10 = 10k, -40°C ≤ TA < 0°C
2.350
2.398
2.446
V
RTHM = 1.014k, R10 = 10k
2.035
2.066
2.097
V
RTHM = 1.014k, R10 = 10k, -40°C ≤ TA < 0°C
2.025
2.066
2.107
V
1.01
V/V
Charge Enable Comparator Section (CEC)
Threshold Voltage
As a function of VA–
0.99
1
Input Bias Current
CHGENB = 2.3V
–0.5
–0.1
3
µA
UC2909
UC3909
ELECTRICAL CHARACTERISTICS: Unless otherwise stated these specifications apply for TA = –40°C to +85°C for
UC2909; °0C to +70°C for UC3909; CT = 330pF, RSET = 11.5k, R10 = 10k, RTHM = 10k, VCC = 15V, Output no load, RSTAT0 =
RSTAT1 = 10k, CHGENB = OVCTAP = VLOGIC, TA = TJ.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNITS
STAT0 = 0, STAT1 = 0, Function of VREF
0.945
0.95
0.955
V/V
STAT0 = 1, STAT1 = 0, Function of VREF
0.895
0.9
0.905
V/V
1.01
V/V
Voltage Sense Comparator Section (VSC)
Threshold Voltage
Over Charge Taper Current Comparator Section (OCTIC)
Threshold Voltage
Function of 2.3V REF, CA- = CAO
0.99
1
Input Bias Current
OVCTAP = 2.3V
–0.5
–0.1
VLOGIC
VCC = 15V
4.875
5.0
5.125
V
Line Regulation
8.8V < VCC < 35V
3
15
mV
Load Regulation
0 < IO < 10mA
µA
Logic 5V Reference Section (VLOGIC)
Reference Comparator Turn-on Threshold
Short Circuit Current
VREF = 0V
30
3
15
mV
4.3
4.8
V
50
80
mA
Output Stage Section
ISINK Continuous
50
mA
IPEAK
100
mA
VOL
IO=50mA
Leakage Current
VOUT=35V
1
1.3
V
25
µA
STAT0 & STAT1 Open Collector Outputs Section
Maximum Sink Current
VOUT = 8.8V
Saturation Voltage
IOUT = 5mA
Leakage Current
VOUT = 35V
6
10
0.1
mA
0.45
V
25
µA
STATLV Open Collector Outputs Section
Maximum Sink Current
VOUT = 5V
Saturation Voltage
IOUT = 2mA
Leakage current
VOUT = 5V
2.5
5
0.1
mA
0.45
V
3
µA
UVLO Section
Turn-on Threshold
6.8
7.8
8.8
V
Hysteresis
100
300
500
mV
19
mA
ICC Section
ICC (run)
(See Fig. 1)
13
ICC (off)
VCC = 6.5V
2
mA
Note 2: VIO is measured prior to packaging with internal probe pad.
Note 3: Thermistor initial accuracy is measured and trimmed with respect to VAO; VAO = VA–.
PIN DESCRIPTIONS
CA–: The inverting input to the current error amplifier.
CSO: The output of the current sense amplifier which is
internally clamped to approximately 5.7V.
CAO: The output of the current error amplifier which is
internally clamped to approximately 4V. It is internally
connected to the inverting input of the PWM comparator.
CHGENB: The input to a comparator that detects when
battery voltage is low and places the charger in a trickle
charge state. The charge enable comparator makes the
output of the voltage error amplifier a high impedance
while forcing a fixed 10µA into CA– to set the trickle
charge current.
CS–, CS+: The inverting and non-inverting inputs to the
current sense amplifier. This amplifier has a fixed gain of
five and a common-mode voltage range of from –250mV
to +VCC.
4
UC2909
UC3909
PIN DESCRIPTIONS (cont.)
GND: The reference point for the internal reference, all
thresholds, and the return for the remainder of the device. The output sink transistor is wired directly to this
pin.
OVCTAP: The overcharge current taper pin detects
when the output current has tapered to the float threshold in the overcharge state.
OSC: The oscillator ramp pin which has a capacitor (CT)
to ground. The ramp oscillates between approximately
1.0V to 3.0V and the frequency is approximated by:
frequency =
1
1. 2 • CT • R SET
Figure 1. ICC vs. temperature.
OUT: The output of the PWM driver which consists of an
open collector output transistor with 100mA sink capability.
STAT1: This open collector pin is the second decode bit
used to decode the charge states.
R10: Input used to establish a differential voltage corresponding to the temperature of the thermistor. Connect
a 10k resistor to ground from this point.
STATLV: This bit is high when the charger is in the float
state.
RSET: A resistor to ground programs the oscillator
charge current and the trickle control current for the oscillator ramp.
The oscillator charge current is approximately
VA–: The inverting input to the voltage error amplifier.
VAO: The output of the voltage error amplifier. The upper output clamp voltage of this amplifier is 5V.
1.75
.
R SET
VCC: The input voltage to the chip. The chip is operational between 7.5V and 40V and should be bypassed
with a 1µF capacitor. A typical ICC vs. temperature is
shown in Figure 1.
The trickle control current (ITRCK_CONTROL) is approxi0115
.
mately
.
R SET
VLOGIC: The precision reference voltage. It should be
bypassed with a 0.1µF capacitor.
RTHM: A 10k thermistor is connected to ground and is
thermally connected to the battery. The resistance will
vary exponentially over temperature and its change is
used to vary the internal 2.3V reference by –3.9mV/°C.
The recommended thermistor for this function is part
number L1005-5744-103-D1, Keystone Carbon Company, St. Marys, PA.
Charge State Decode Chart
STAT0 and STAT1 are open collector outputs. The output is approximately 0.2V for a logic 0.
Trickle Charge
Bulk Charge
Over Charge
Float Charge
STAT0: This open collector pin is the first decode bit
used to decode the charge states.
5
STAT1
0
0
1
1
STAT0
0
1
0
1
UC2909
UC3909
APPLICATION INFORMATION
A Block Diagram of the UC3909 is shown on the first
page, while a Typical Application Circuit is shown in Figure 2. The circuit in Figure 2 requires a DC input voltage
between 12V and 40V.
The VEA, VOH = 5V clamp saturates the voltage loop
and consequently limits the charge current as stated in
Equation 1.
During the trickle bias state the maximum allowable
charge current (ITC) is similarly determined:
The UC3909 uses a voltage control loop with average
current limiting to precisely control the charge rate of a
lead-acid battery. The small increase in complexity of
average current limiting is offset by the relative simplicity
of the control loop design.
ITC =
(2)
RS • 5
ITRCK_CONTROL is the fixed control current into CA–.
ITRCK_CONTROL is 10µA when RSET = 11.5k. See RSET
pin description for equation.
CONTROL LOOP
Current Sense Amplifier
Current Error Amplifier
This amplifier measures the voltage across the sense resistor RS with a fixed gain of five and an offset voltage of
2.3V. This voltage is proportional to the battery current.
The most positive voltage end of RS is connected to CSensuring the correct polarity going into the PWM comparator.
The current error amplifier (CA) compares the output of
the current sense amplifier to the output of the voltage
error amplifier. The output of the CA forces a PWM duty
cycle which results in the correct average battery current.
With integral compensation, the CA will have a very high
DC current gain, resulting in effectively no average DC
current error. For stability purposes, the high frequency
gain of the CA must be designed such that the magnitude of the down slope of the CA output signal is less
than or equal to the magnitude of the up slope of the
PWM ramp.
CSO = 2.3V when there is zero battery current.
RS is chosen by dividing 350mV by the maximum allowable load current. A smaller value for RS can be chosen
to reduce power dissipation.
Maximum Charge Current, Ibulk, is set by knowing the
maximum voltage error amplifier output, VOH = 5V, the
maximum allowable drop across RS, and setting the resistors RG1 and RG2 such that;
5 • VRS
5 • VRS
RG1
=
=
=
RG 2 VLOGIC – CA – 5V – 2 .3V
5 • VRS
= 1.852 • IBULK • RS
2 .7V
ITRICK _ CONTROL • RG1
CHARGE ALGORITHM
Refer to Figure 3 in UC3906 Data Sheet in the data
book.
(1)
A) Trickle Charge State
STAT0 = STAT1 = STATLV = logic 0
When CHGNB is less than VREF (2.3V – 3.9mV/°C),
STATLV is forced low. This decreases the sense voltage
divider ratio, forcing the battery to overcharge (VOC).
The maximum allowable drop across RS is specified to
limit the maximum swing at CSO to approximately 2.0V
to keep the CSO amplifier output from saturating.
VOC = (VREF ) •
No charge/load current: VCSO = 2.3V,
(RS1 + RS 2 + RS 3 | | RS 4)
(RS 3 || RS 4)
(3)
During the trickle charge state, the output of the voltage
error amplifier is high impedance. The trickle control current is directed into the CA– pin setting the maximum
trickle charge current. The trickle charge current is defined in Equation 2.
Max charge/load current: Vmax(CSO) = 2.3V–2.0V = 0.3V
Voltage Error Amplifier:
The voltage error amplifier (VEA) senses the battery
voltage and compares it to the 2.3V – 3.9mV/°C thermistor generated reference. Its output becomes the current
command signal and is summed with the current sense
amplifier output. A 5.0V voltage error amplifier upper
clamp limits maximum load current. During the trickle
charge state, the voltage amplifier output is opened (high
impedance output) by the charge enable comparator. A
trickle bias current is summed into the CA– input which
sets the maximum trickle charge current.
B) Bulk Charge State
STAT1 = STATLV = logic 0, STAT0 = logic 1
As the battery charges, the UC3909 will transition from
trickle to bulk charge when CHGENB becomes greater
than 2.3V. The transition equation is
VT = VREF •
(RS1 + RS 2 + RS 3 || RS 4)
(RS 2 + RS 3 || RS 4)
STATLV is still driven low.
6
(4)
UC2909
UC3909
Pin numbers refer to J, N, DW packages.
APPLICATION INFORMATION (cont.)
UDG-95008-1
Figure 2. Typical application circuit
7
UC2909
UC3909
APPLICATION INFORMATION (cont.)
D) Float State
STAT0 = STAT1 = STATLV = logic 1
During the bulk charge state, the voltage error amplifier
is now operational and is commanding maximum charge
current (IBULK) set by Equation 1. The voltage loop attempts to force the battery to VOC.
The battery charge current tapers below its OVCTAP
threshold, and forces STATLV high increasing the voltage sense divider ratio. The voltage loop now forces the
battery charger to regulate at its float state voltage (VF).
C) Overcharge State
STAT0 = STATLV = logic 0, STAT1 = logic 1
VF = (VREF )
The battery voltage surpasses 95% of VOC indicating
the UC3909 is in its overcharge state.
(6)
RS 3
If the load drains the battery to less than 90% of VF, the
charger goes back to the bulk charge state, STATE 1.
During the overcharge charge state, the voltage loop becomes stable and the charge current begins to taper off.
As the charge current tapers off, the voltage at CSO increases toward its null point of 2.3V. The center connection of the two resistors between CSO and VLOGIC sets
the overcurrent taper threshold (OVCTAP). Knowing the
desired overcharge terminate current (IOCT), the resistors
ROVC1 and ROVC2 can be calculated by choosing a value
of ROVC2 and using the following equation:
) • IOCT • RS • ROVC 2
ROVC1 = (18518
.
(RS1 + RS 2 + RS 3 )
OFF LINE APPLICATIONS
For off line charge applications, either Figure 3 or Figure
4 can be used as a baseline. Figure 3 has the advantage of high frequency operation resulting in a small isolation transformer. Figure 4 is a simpler design, but at
the expense of larger magnetics.
(5)
UDG-95009
Figure 3. Off line charger with primary side PWM
8
UC2909
UC3909
APPLICATION INFORMATION (cont.)
UDG-95010
Figure 4. Isolated off line charger
UNITRODE CORPORATION
7 CONTINENTAL BLVD. • MERRIMACK, NH 03054
TEL. (603) 424-2410 • FAX (603) 424-3460
9
PACKAGE OPTION ADDENDUM
www.ti.com
24-Dec-2014
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
UC2909DW
LIFEBUY
SOIC
DW
20
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
UC2909DW
UC2909DWG4
LIFEBUY
SOIC
DW
20
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
UC2909DW
UC2909DW
UC2909DWTR
OBSOLETE
SOIC
DW
20
TBD
Call TI
Call TI
-40 to 85
UC2909DWTRG4
OBSOLETE
SOIC
DW
20
TBD
Call TI
Call TI
-40 to 85
UC2909N
NRND
PDIP
N
20
20
Green (RoHS
& no Sb/Br)
SN
N / A for Pkg Type
-40 to 85
UC2909N
UC3909DW
LIFEBUY
SOIC
DW
20
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-20 to 70
UC3909DW
UC3909DWG4
LIFEBUY
SOIC
DW
20
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-20 to 70
UC3909DW
UC3909DWTR
LIFEBUY
SOIC
DW
20
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-20 to 70
UC3909DW
UC3909N
LIFEBUY
PDIP
N
20
20
Green (RoHS
& no Sb/Br)
SN
N / A for Pkg Type
-20 to 70
UC3909N
UC3909NG4
LIFEBUY
PDIP
N
20
20
Green (RoHS
& no Sb/Br)
SN
N / A for Pkg Type
-20 to 70
UC3909N
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
24-Dec-2014
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF UC2909 :
• Enhanced Product: UC2909-EP
NOTE: Qualified Version Definitions:
• Enhanced Product - Supports Defense, Aerospace and Medical Applications
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Aug-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
UC3909DWTR
Package Package Pins
Type Drawing
SOIC
DW
20
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
2000
330.0
24.4
Pack Materials-Page 1
10.8
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
13.0
2.7
12.0
24.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Aug-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
UC3909DWTR
SOIC
DW
20
2000
367.0
367.0
45.0
Pack Materials-Page 2
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