VSP1221
www.ti.com
SLES012A – SEPTEMBER 2001 – REVISED JULY 2004
12-BIT, 21-MSPS, ULTRALOW-POWER
CCD SIGNAL PROCESSOR
FEATURES
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APPLICATIONS
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Digital Still Camera
Digital Video Camera
DESCRIPTION
The VSP1221 is a highly-integrated mixed-signal IC
used for signal conditioning and analog-to-digital
conversion at the output of a CCD array. The IC has
a correlated double sampler (CDS) and an analog
programmable-gain amplifier (PGA) stage followed by
an analog-to-digital converter (ADC) and a digital
PGA stage. The CDS is used to sample the CCD
signal and is followed by the analog PGA stage. The
ADC is a12-bit, 21-MSPS pipelined ADC. The digital
PGA provides further amplification.
PACKAGE
(TOP VIEW)
OE
AVSS
AVDD
REFM
REFP
ISET
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PIN ASSIGNMENTS
SCLK
SDIN
SLOAD
SCKP
STBY
RESET
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12-Bit, 21-MSPS, Analog-to-Digital
Converter
Low Power: 70 mW Minimum
Power-Down Mode: 4 mW
Low Input-Referred Noise: 75-dB
SNR Typical at 0-dB Gain
Novel Optical-Black (OB) Calibration
Low-Aperture Delay
Single 3-V Supply Operation
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