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CY62137CVSL-70BAI

CY62137CVSL-70BAI

  • 厂商:

    CYPRESS(赛普拉斯)

  • 封装:

    TFBGA48

  • 描述:

    STANDARD SRAM, 128KX16

  • 数据手册
  • 价格&库存
CY62137CVSL-70BAI 数据手册
CY62137CV25/30/33 MoBL® CY62137CV MoBL® 2M (128K x 16) Static RAM Features • Very high speed: 55 ns and 70 ns • Voltage range: — CY62137CV25: 2.2V–2.7V — CY62137CV30: 2.7V–3.3V — CY62137CV33: 3.0V–3.6V — CY62137CV: 2.7V–3.6V • Pin-compatible with the CY62137V • Ultra-low active power — Typical active current: 1.5 mA @ f = 1 MHz — Typical active current: 5.5 mA @ f = fmax (70-ns speed) Low and ultra-low standby power Easy memory expansion with CE and OE features Automatic power-down when deselected CMOS for optimum speed/power Packages offered in a 48-ball FBGA Life™ (MoBL®) in portable applications such as cellular telephones. The devices also has an automatic power-down feature that significantly reduces power consumption by 80% when addresses are not toggling. The device can also be put into standby mode reducing power consumption by more than 99% when deselected (CE HIGH or both BLE and BHE are HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH), outputs are disabled (OE HIGH), both Byte High Enable and Byte Low Enable are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW). Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A0 through A16). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A16). Reading from the device is accomplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins will appear on I/O0 to I/O7. If Byte High Enable (BHE) is LOW, then data from memory will appear on I/O8 to I/O15. See the truth table at the back of this data sheet for a complete description of read and write modes. • • • • • Functional Description[1] The CY62137CV25/30/33 and CY62137CV are high-performance CMOS static RAMs organized as 128K words by 16 bits. These devices feature advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Logic Block Diagram DATA IN DRIVERS A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 10 ROW DECODER 128K x 16 RAM Array 2048 x 1024 SENSE AMPS I/O0 – I/O7 I/O8 – I/O15 COLUMN DECODER BHE WE CE OE BLE CE BHE BLE A11 Pow -down er Circuit Note: 1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com. Cypress Semiconductor Corporation Document #: 38-05201 Rev. *D • 3901 North First Street A12 A13 A14 A15 A16 • San Jose • CA 95134 • 408-943-2600 Revised September 20, 2002 CY62137CV25/30/33 MoBL® CY62137CV MoBL® Pin Configuration[2, 3] 1 BLE I/O8 I/O9 VSS VCC I/O14 I/O15 NC 2 OE BHE I/O10 I/O11 FBGA (Top View) 4 5 3 A0 A3 A5 NC A1 A4 A6 A7 A16 A15 A13 A10 A2 CE I/O1 I/O3 I/O4 I/O5 WE A11 6 NC I/O0 I/O2 VCC VSS I/O6 I/O7 NC A B C D E F G H I/O12 DNU I/O13 NC A8 A14 A12 A9 Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ................................. –65°C to +150°C Ambient Temperature with Power Applied............................................. –55°C to +125°C Supply Voltage to Ground Potential –0.5V to VCCMAX + 0.5V DC Voltage Applied to Outputs in High-Z State[4] .................................... –0.5V to VCC + 0.3V DC Input Voltage[4] .................................... −0.5V to VCC + 0.3V Output Current into Outputs (LOW) .............................20 mA Static Discharge Voltage.......................................... > 2001V (per MIL-STD-883, Method 3015) Latch-up Current ................................................... > 200 mA Operating Range Device CY62137CV25 CY62137CV30 CY62137CV33 CY62137CV Range Ambient Temperature TA VCC 2.2V to 2.7V 2.7V to 3.3V 3.0V to 3.6V 2.7V to 3.6V Industrial –40°C to +85°C Product Portfolio Power Dissipation Operating, ICC (mA) VCC Range (V) Product CY62137CV25LL CY62137CV30LL CY62137CV33LL CY62137CVLL CY62137CVSL VCC(min.) VCC(typ.) 2.2 2.7 3.0 2.7V 2.7V 2.5 3.0 3.3 3.3 3.3 [5] VCC(max.) 2.7 3.3 3.6 3.6 3.6 Speed (ns) 55 70 55 70 55 70 70 70 f = 1 MHz Typ.[5] 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 Max. 3 3 3 3 3 3 3 3 f = fmax Typ.[5] 7 5.5 7 5.5 7 5.5 5.5 5.5 Max. 15 12 15 12 15 12 12 12 Standby, ISB2 (µA) Typ.[5] 2 2 5 5 1 Max. 10 10 15 15 5 Notes: 2. NC pins are not connected to the die. 3. E3 (DNU) can be left as NC or VSS to ensure proper application. 4. VIL(min.) = –2.0V for pulse durations less than 20 ns. 5. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ.), TA = 25°C. Document #: 38-05201 Rev. *D Page 2 of 13 CY62137CV25/30/33 MoBL® CY62137CV MoBL® Electrical Characteristics Over the Operating Range CY62137CV25-55 Parameter VOH VOL VIH VIL IIX IOZ ICC Description Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input Leakage Current GND < VI < VCC Output Leakage Current GND < VO < VCC, Output Disabled VCC = 2.7V IOUT = 0 mA CMOS Levels Test Conditions IOH = –0.1 mA IOL = 0.1 mA VCC = 2.2V VCC = 2.2V 1.8 –0.3 –1 –1 7 1.5 2 Min. 2.0 0.4 VCC + 0.3V 0.6 +1 +1 15 3 10 1.8 –0.3 –1 –1 5.5 1.5 2 Typ.[5] Max. CY62137CV25-70 Min. 2.0 0.4 VCC + 0.3V 0.6 +1 +1 12 3 10 µA Typ.[5] Max. Unit V V V V µA µA mA VCC Operating Supply f = fMAX = 1/tRC Current f = 1 MHz ISB1 Automatic CE CE > VCC – 0.2V Power-down Current— VIN > VCC – 0.2V or VIN < 0.2V, CMOS Inputs f = fmax (Address and Data Only), f=0 (OE, WE, BHE, and BLE) Automatic CE CE > VCC – 0.2V Power-down Current— VIN > VCC – 0.2V or VIN < 0.2V, f = 0, VCC = 2.7V CMOS Inputs ISB2 CY62137CV30-55 Parameter VOH VOL VIH VIL IIX IOZ ICC Description Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input Leakage Current GND < VI < VCC Output Leakage Current GND < VO < VCC, Output Disabled VCC = 3.3V IOUT = 0 mA CMOS Levels Test Conditions IOH = –1.0 mA IOL = 2.1 mA VCC = 2.7V VCC = 2.7V 2.2 –0.3 –1 –1 7 1.5 2 Min. 2.4 0.4 VCC + 0.3V 0.8 +1 +1 15 3 10 Typ.[5] Max. CY62137CV30-70 Min. 2.4 0.4 2.2 –0.3 –1 –1 5.5 1.5 2 VCC + 0.3V 0.8 +1 +1 12 3 10 µA Typ.[5] Max. Unit V V V V µA µA mA VCC Operating Supply f = fMAX = 1/tRC Current f = 1 MHz ISB1 Automatic CE CE > VCC – 0.2V Power-down Current— VIN > VCC – 0.2V or VIN < 0.2V, CMOS Inputs f = fmax (Address and Data Only), f=0 (OE, WE, BHE, and BLE) Automatic CE CE > VCC – 0.2V Power-down Current— VIN > VCC – 0.2V or VIN < 0.2V, CMOS Inputs f = 0, VCC = 3.3V ISB2 Electrical Characteristics Over the Operating Range CY62137CV33-55 Parameter VOH VOL Description Output HIGH Voltage Output LOW Voltage Test Conditions IOH = –1.0 mA IOL = 2.1 mA VCC = 3.0V VCC = 2.7V VCC = 3.0V VCC = 2.7V 0.4 Min. Typ.[5] Max. 2.4 CY62137CV33-70 CY62137CV-70 Min. Typ.[5] Max. Unit 2.4 2.4 0.4 0.4 V V V V Document #: 38-05201 Rev. *D Page 3 of 13 CY62137CV25/30/33 MoBL® CY62137CV MoBL® Electrical Characteristics Over the Operating Range (continued) CY62137CV33-55 Parameter VIH VIL IIX IOZ ICC Description Input HIGH Voltage Input LOW Voltage Input Leakage Current Output Leakage Current GND < VI < VCC GND < VO < VCC, Output Disabled f = 1 MHz ISB1 VCC = 3.6V IOUT = 0 mA CMOS Levels Test Conditions Min. Typ.[5] Max. 2.2 –0.3 –1 –1 7 1.5 5 VCC + 0.3V 0.8 +1 +1 15 3 15 CY62137CV33-70 CY62137CV-70 Min. Typ.[5] Max. Unit 2.2 –0.3 –1 –1 5.5 1.5 5 VCC + 0.3V 0.8 +1 +1 12 3 15 µA V V µA µA mA VCC Operating Supply Current f = fMAX = 1/tRC Automatic CE CE > VCC – 0.2V Power-down Current —CMOS VIN > VCC – 0.2V or VIN < 0.2V, Inputs f = fmax (Address and Data Only), f=0 (OE, WE, BHE, and BLE) Automatic CE CE > VCC – 0.2V LL Power-down Current —CMOS VIN > VCC – 0.2V or VIN < SL Inputs 0.2V, f = 0, VCC = 3.6V ISB2 5 15 5 1 15 5 Capacitance[6] Parameter CIN COUT Description Input Capacitance Output Capacitance Test Conditions TA = 25°C, f = 1 MHz, VCC = VCC(typ.) Max. 6 8 Unit pF pF Thermal Resistance Parameter ΘJA ΘJC Description Thermal Resistance (Junction to Ambient)[6] Thermal Resistance (Junction to Case)[6] Test Conditions Still Air, soldered on a 3 x 4.5 inch, two-layer printed circuit board BGA 55 16 Unit °C/W °C/W AC Test Loads and Waveforms R1 VCC OUTPUT 30 pF INCLUDING JIG AND SCOPE R2 VCC Typ 10% GND Rise TIme: 1 V/ns ALL INPUT PULSES 90% 90% 10% Fall Time: 1 V/ns Equivalent to: THÉVENIN EQUIVALENT RTH VTH OUTPUT Parameters R1 R2 RTH VTH 2.5V 16600 15400 8000 1.20 3.0V 1105 1550 645 1.75 3.3V 1216 1374 645 1.75 Unit Ω Ω Ω V Note: 6. Tested initially and after any design or process changes that may affect these parameters. Document #: 38-05201 Rev. *D Page 4 of 13 CY62137CV25/30/33 MoBL® CY62137CV MoBL® Data Retention Characteristics (Over the Operating Range) Parameter VDR ICCDR Description VCC for Data Retention Data Retention Current VCC= 1.5V LL CE > VCC – 0.2V, VIN > VCC – 0.2V or VIN < 0.2V SL 0 tRC Conditions Min. 1.5 1 Typ.[5] Max. Vccmax 6 4 µA ns ns Unit V tCDR[6] tR[7] Chip Deselect to Data Retention Time Operation Recovery Time Data Retention Waveform[8] DATA RETENTION MODE VCC CE or VCC(min.) tCDR VDR > 1.5 V VCC(min.) tR BHE.BLE Switching Characteristics Over the Operating Range[9] 55 ns Parameter Read Cycle tRC tAA tOHA tACE tDOE tLZOE tHZOE tLZCE tHZCE tPU tPD tDBE tLZBE[11] tHZBE Write tWC tSCE Cycle[13] Write Cycle Time CE LOW to Write End 55 45 70 60 ns ns Read Cycle Time Address to Data Valid Data Hold from Address Change CE LOW to Data Valid OE LOW to Data Valid OE LOW to Low-Z[10] [10, 12] [10] 70 ns Max Min 70 55 70 10 55 25 70 35 5 20 25 10 20 25 0 55 55 70 70 5 20 25 Max Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns Description Min 55 10 5 10 0 OE HIGH to High-Z CE LOW to Low-Z CE HIGH to High-Z[10, 12] CE LOW to Power-up CE HIGH to Power-down BHE/BLE LOW to Data Valid BHE/BLE LOW to Low-Z[10] BHE/BLE HIGH to High-Z[10, 12] 5 Notes: 7. Full-device AC operation requires linear VCC ramp from VDR to VCC(min.) > 100 µs or stable at VCC(min.) > 100 µs. 8. BHE.BLE is the AND of both BHE and BLE. Chip can be deselected by either disabling the chip enable signals or by disabling both BHE and BLE. 9. Test conditions assume signal transition time of 5 ns or less, timing reference levels of VCC(typ.)/2, input pulse levels of 0 to VCC(typ.), and output loading of the specified IOL/IOH and 30-pF load capacitance. 10. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZBE is less than tLZBE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device. 11. If both byte enables are toggled together this value is 10 ns. 12. tHZOE, tHZCE, tHZBE, and tHZWE transitions are measured when the outputs enter a high impedance state. 13. The internal write time of the memory is defined by the overlap of WE, CE = VIL, BHE and/or BLE = VIL. All signals must be ACTIVE to initiate a write and any of these signals can terminate a write by going INACTIVE. The data input set-up and hold timing should be referenced to the edge of the signal that terminates the write. Document #: 38-05201 Rev. *D Page 5 of 13 CY62137CV25/30/33 MoBL® CY62137CV MoBL® Switching Characteristics Over the Operating Range[9] (continued) 55 ns Parameter tAW tHA tSA tPWE tBW tSD tHD tHZWE tLZWE Description Address Set-up to Write End Address Hold from Write End Address Set-up to Write Start WE Pulse Width BHE/BLE Pulse Width Data Set-up to Write End Data Hold from Write End WE LOW to High-Z [10, 12] [10] 70 ns Max Min 60 0 0 45 60 30 0 20 25 10 Max Unit ns ns ns ns ns ns ns ns ns Min 45 0 0 40 50 25 0 10 WE HIGH to Low-Z Switching Waveforms Read Cycle No. 1 (Address Transition Controlled) [14, 15] tRC ADDRESS tOHA DATA OUT PREVIOUS DATA VALID tAA DATA VALID Read Cycle No. 2 (OE Controlled) [15, 16] ADDRESS CE tACE OE tRC tPD tHZCE BHE/BLE ttLZOE LZOE tDOE tHZOE tHZBE tLZBE DATA OUT tDBE HIGH IMPEDANCE DATA VALID HIGH IMPEDANCE tLZCE VCC SUPPLY CURRENT tPU 50% 50% ICC ISB Notes: 14. Device is continuously selected. OE, CE = VIL, BHE, BLE = VIL. 15. WE is HIGH for read cycle. 16. Address valid prior to or coincident with CE, BHE, BLE transition LOW. Document #: 38-05201 Rev. *D Page 6 of 13 CY62137CV25/30/33 MoBL® CY62137CV MoBL® Switching Waveforms (continued) Write Cycle No. 1 (WE Controlled) [13, 17, 18] tWC ADDRESS tSCE CE tAW tSA WE tPWE tHA BHE/BLE tBW OE tSD DATA I/O NOTE 19 tHZOE [13, 17, 18] tHD DATAIN VALID Write Cycle No. 2 (CE Controlled) tWC ADDRESS tSCE CE tSA tAW tPWE tHA WE BHE/BLE tBW OE tSD DATA I/O NOTE 19 tHZOE DATAIN VALID tHD Notes: 17. Data I/O is high-impedance if OE = VIH. 18. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state. 19. During this period, the I/Os are in output state and input signals should not be applied. Document #: 38-05201 Rev. *D Page 7 of 13 CY62137CV25/30/33 MoBL® CY62137CV MoBL® Switching Waveforms (continued) Write Cycle No. 3 (WE Controlled, OE LOW) [18] tWC ADDRESS tSCE CE BHE/BLE tAW tSA WE tBW tHA tPWE tSD DATA I/O NOTE 19 tHZWE DATAIN VALID tHD tLZWE Write Cycle No. 4 (BHE/BLE Controlled, OE LOW) [18] tWC ADDRESS CE tSCE tAW BHE/BLE tSA WE tPWE tSD DATA I/O NOTE 19 DATAIN VALID tHD tBW tHA Document #: 38-05201 Rev. *D Page 8 of 13 CY62137CV25/30/33 MoBL® CY62137CV MoBL® Typical DC and AC Parameters (Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ.), TA = 25°C) . Operating Current vs. Supply Voltage 14.0 12.0 ICC (mA) ICC (mA) 10.0 MoBL 8.0 6.0 4.0 2.0 (f = 1 MHz) (f = fmax, 55 ns) (f = fmax, 70 ns) 14.0 12.0 ICC (mA) 10.0 MoBL 8.0 6.0 4.0 2.0 (f = 1 MHz) 0.0 3.0 2.7 3.3 SUPPLY VOLTAGE (V) (f = fmax, 55 ns) (f = fmax, 70 ns) 14.0 12.0 (f = fmax, 55 ns) (f = fmax, 70 ns) ICC (mA) 10.0 8.0 6.0 4.0 2.0 MoBL 14.0 12.0 10.0 8.0 6.0 4.0 (f = 1 MHz 0.0 3.6 3.3 2.7 SUPPLY VOLTAGE (V) 2.0 MoBL (f = fmax, 70 ns) (f = 1 MHz) 0.0 2.2 2.5 2.7 SUPPLY VOLTAGE (V) 0.0 3.6 3.3 3.0 SUPPLY VOLTAGE (V) Standby Current vs. Supply Voltage 12.0 ISB (µA) ISB (µA) 10.0 8.0 6.0 4.0 2.0 0 2.2 2.5 2.7 SUPPLY VOLTAGE (V) MoBL 12.0 10.0 8.0 6.0 4.0 2.0 0 2.7 3.0 3.3 SUPPLY VOLTAGE (V) ISB (µA) MoBL 12.0 MoBL 8.0 6.0 4.0 2.0 0 3.0 3.3 3.6 SUPPLY VOLTAGE (V) ISB (µA) 10.0 12.0 MoBL 10.0 8.0 6.0 4.0 2.0 0 2.7 3.3 3.6 SUPPLY VOLTAGE (V) LL SL Access Time vs. Supply Voltage 60 50 40 TAA (ns) TAA (ns) 30 20 10 0 2.2 2.5 2.7 SUPPLY VOLTAGE (V) 60 MoBL 50 40 TAA (ns) 30 20 10 0 2.7 3.0 3.3 60 50 40 TAA (ns) 30 20 10 0 3.0 3.3 3.6 60 50 40 30 20 10 0 2.7 3.3 3.6 MoBL MoBL MoBL SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) Document #: 38-05201 Rev. *D Page 9 of 13 CY62137CV25/30/33 MoBL® CY62137CV MoBL® Truth Table CE H X L L L L L L L L L WE X X H H H H H H L L L OE X X L L L H H H X X X BHE X H L H L L H L L H L BLE X H L L H L L H L L H Inputs/Outputs High-Z High-Z Data Out (I/OO–I/O15) Data Out (I/OO–I/O7); I/O8–I/O15 in High-Z Data Out (I/O8–I/O15); I/O0–I/O7 in High-Z High-Z High-Z High-Z Data In (I/OO–I/O15) Data In (I/OO–I/O7); I/O8–I/O15 in High-Z Data In (I/O8–I/O15); I/O0–I/O7 in High-Z Mode Deselect/Power-down Deselect/Power-down Read Read Read Output Disabled Output Disabled Output Disabled Write Write Write Power Standby (ISB) Standby (ISB) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Active (ICC) Ordering Information Speed (ns) 70 Ordering Code CY62137CV25LL-70BAI CY62137CV25LL-70BVI CY62137CV30LL-70BAI CY62137CV30LL-70BVI CY62137CV33LL-70BAI CY62137CV33LL-70BVI CY62137CVLL-70BAI CY62137CVLL-70BVI CY62137CVSL-70BAI CY62137CVSL-70BVI 55 CY62137CV25LL-55BAI CY62137CV25LL-55BVI CY62137CV30LL-55BAI CY62137CV30LL-55BVI CY62137CV33LL-55BAI CY62137CV33LL-55BVI Voltage Range (V) 2.2–2.7 2.2–2.7 2.7–3.3 2.7–3.3 3.0–3.6 3.0–3.6 2.7–3.6 2.7–3.6 2.7–3.6 2.7–3.6 2.2–2.7 2.2–2.7 2.7–3.3 2.7–3.3 3.0–3.6 3.0–3.6 Package Name BA48A BV48A BA48A BV48A BA48A BV48A BA48A BV48A BA48A BV48A BA48A BV48A BA48A BV48A BA48A BV48A Package Type 48-ball Fine Pitch BGA (7 mm x 7 mm x 1.2 mm) 48-ball Fine Pitch BGA (6 mm x 8 mm x 1 mm) 48-ball Fine Pitch BGA (7 mm x 7 mm x 1.2 mm) 48-ball Fine Pitch BGA (6 mm x 8 mm x 1 mm) 48-ball Fine Pitch BGA (7 mm x 7 mm x 1.2 mm) 48-ball Fine Pitch BGA (6 mm x 8 mm x 1 mm) 48-ball Fine Pitch BGA (7 mm x 7 mm x 1.2 mm) 48-ball Fine Pitch BGA (6 mm x 8 mm x 1 mm) 48-ball Fine Pitch BGA (7 mm x 7 mm x 1.2 mm) 48-ball Fine Pitch BGA (6 mm x 8 mm x 1 mm) 48-ball Fine Pitch BGA (7 mm x 7 mm x 1.2 mm) 48-ball Fine Pitch BGA (6 mm x 8 mm x 1 mm) 48-ball Fine Pitch BGA (7 mm x 7 mm x 1.2 mm) 48-ball Fine Pitch BGA (6 mm x 8 mm x 1 mm) 48-ball Fine Pitch BGA (7 mm x 7 mm x 1.2 mm) 48-ball Fine Pitch BGA (6 mm x 8 mm x 1 mm) Operating Range Industrial Document #: 38-05201 Rev. *D Page 10 of 13 CY62137CV25/30/33 MoBL® CY62137CV MoBL® Package Diagrams 48-ball (7.00 mm x 7.00 mm x 1.2 mm) FBGA BA48A 51-85096-*E Document #: 38-05201 Rev. *D Page 11 of 13 CY62137CV25/30/33 MoBL® CY62137CV MoBL® Package Diagrams (continued) 48-ball VFBGA (6 x 8 x 1 mm) BV48A 51-85150-*A MoBL is a registered trademark and More Battery Life is a trademark of Cypress Semiconductor Corporation. All product and company names mentioned in this document may be the trademarks of their respective holders. Document #: 38-05201 Rev. *D Page 12 of 13 © Cypress Semiconductor Corporation, 2002. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. CY62137CV25/30/33 MoBL® CY62137CV MoBL® Document History Page Document Title: CY62137CV25/30/33 MoBL® and CY62137CV MoBL® 2M (128K x 16) Static RAM Document Number: 38-05201 REV. ** *A *B *C ECN NO. 112393 114015 117064 118122 Issue Date 02/19/02 04/25/02 07/12/02 09/10/02 Orig. of Change GAV JUI MGN MGN Description of Change New Data Sheet (advance information) Added BV package diagram Changed from Advance Information to Preliminary Changed from Preliminary to Final Added new part number: CY62137CV with wider voltage (2.7V – 3.6V). Added new SL power bin for new part number. For TAA = 55 ns, improved tPWE min. from 45 ns to 40 ns. For TAA = 70 ns, improved tPWE min. from 50 ns to 45 ns. For TAA = 70 ns, improved tLZWE min. from 5 ns to 10 ns. Improved Typ. ICC spec to 7 mA (for 55 ns) and 5.5 mA (for 70 ns). Improved Max ICC spec to 15 mA (for 55 ns) and 12 mA (for 70 ns). For TAA = 55 ns, improved tLZWE min. from 5 ns to 10 ns. Changed upper spec. for Supply Voltage to Ground Potential to VCCMAX + 0.5V. Changed upper spec. for DC Voltage Applied to Outputs in High-Z State and DC Input Voltage to VCC + 0.3V. *D 118761 09/23/02 MGN Document #: 38-05201 Rev. *D Page 13 of 13
CY62137CVSL-70BAI 价格&库存

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