CY62137CV30/33 MoBL®
CY62137CV MoBL®
2-Mbit (128K x 16) Static RAM
Features
• Very high speed
— 55 ns
• Temperature Ranges
— Industrial: - 40°C to + 85°C
— Automotive: - 40°C to + 125°C
• Pin-compatible with the CY62137V
• Ultra-low active power
— Typical active current: 1.5 mA @ f = 1 MHz
— Typical active current: 7 mA @ f = fMax (55 ns speed)
• Low and ultra-low standby power
• Easy memory expansion with CE and OE features
• Automatic power-down when deselected
• CMOS for optimum speed/power
• Available in Pb-free and non Pb-free 48-ball FBGA
package
Functional Description[1]
The CY62137CV30/33 and CY62137CV are high-performance CMOS static RAMs organized as 128K words by 16
bits. These devices feature advanced circuit design to provide
ultra-low active current. This is ideal for providing More Battery
Life™ (MoBL®) in portable applications such as cellular
telephones. The devices also has an automatic power-down
feature that significantly reduces power consumption by 80%
when addresses are not toggling. The device can also be put
into standby mode reducing power consumption by more than
99% when deselected (CE HIGH or both BLE and BHE are
HIGH). The input/output pins (I/O0 through I/O15) are placed
in a high-impedance state when: deselected (CE HIGH),
outputs are disabled (OE HIGH), both Byte High Enable and
Byte Low Enable are disabled (BHE, BLE HIGH), or during a
write operation (CE LOW, and WE LOW).
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is
written into the location specified on the address pins (A0
through A16). If Byte High Enable (BHE) is LOW, then data
from I/O pins (I/O8 through I/O15) is written into the location
specified on the address pins (A0 through A16).
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing the
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,
then data from the memory location specified by the address
pins will appear on I/O0 to I/O7. If Byte High Enable (BHE) is
LOW, then data from memory will appear on I/O8 to I/O15. See
the truth table at the back of this data sheet for a complete
description of read and write modes.
Logic Block Diagram
128K x 16
RAM Array
SENSE AMPS
ROW DECODER
DATA IN DRIVERS
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
I/O0–I/O7
I/O8–I/O15
BHE
WE
CE
OE
BLE
A12
A13
A14
A15
A16
A11
COLUMN DECODER
CE
Power -Down
Circuit
BHE
BLE
Note:
1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.
Cypress Semiconductor Corporation
Document #: 38-05201 Rev. *G
•
198 Champion Court
•
San Jose, CA 95134-1709
•
408-943-2600
Revised July 21, 2006
[+] Feedback
CY62137CV30/33 MoBL®
CY62137CV MoBL®
Product Portfolio
Power Dissipation
Operating, ICC (mA)
VCC Range (V)
Product
CY62137CV30LL
Range
Industrial
f = 1 MHz
Standby, ISB2
(µA)
f = fMax
Min.
Typ.[2]
Max.
Speed
(ns)
Typ.[2]
Max.
Typ.[2]
Max.
Typ.[2]
Max.
2.7
3.0
3.3
55
1.5
3
7
15
2
10
70
1.5
3
5.5
12
CY62137CV30LL
Automotive
2.7
3.0
3.3
70
1.5
3
5.5
15
2
15
CY62137CV33LL
Industrial
3.0
3.3
3.6
55
1.5
3
7
15
5
15
CY62137CVSL
Industrial
2.7
3.3
3.6
70
1.5
3
5.5
12
1
5
Pin Configuration[3, 4]
48-ball VFBGA
Top View
1
2
3
4
5
6
BLE
OE
A0
A1
A2
NC
A
I/O8
BHE
A3
A4
CE
I/O0
B
I/O9
I/O10
A5
A6
I/O1
I/O2
C
VSS
I/O11
NC
A7
I/O3
VCC
D
VCC
I/O12 DNU
A16
I/O4
VSS
E
I/O14 I/O13
A14
A15
I/O5
I/O6
F
I/O15
NC
A12
A13
WE
I/O7
G
NC
A8
A9
A10
A11
NC
H
Notes:
2. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ.), TA = 25°C.
3. NC pins are not connected to the die.
4. E3 (DNU) pin have to be left floating or tied to VSS to ensure proper operation.
Document #: 38-05201 Rev. *G
Page 2 of 13
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CY62137CV30/33 MoBL®
CY62137CV MoBL®
Maximum Ratings
Static Discharge Voltage.......................................... > 2001V
(per MIL-STD-883, Method 3015)
(Above which the useful life may be impaired. For user guidelines, not tested.)
Latch-up Current.................................................... > 200 mA
Storage Temperature ..................................-65°C to +150°C
Operating Range
Ambient
Temperature TA
Ambient Temperature with
Power Applied..............................................-55°C to +125°C
Device
Range
Supply Voltage to Ground Potential -0.5V to VCC(max) + 0.5V
CY62137CV30
Industrial
DC Voltage Applied to Outputs
in High-Z State[5] .................................... -0.5V to VCC + 0.3V
CY62137CV33
3.0V to 3.6V
CY62137CV
2.7V to 3.6V
DC Input Voltage[5] ................................. -0.5V to VCC + 0.3V
Output Current into Outputs (LOW) .............................20 mA
VCC
-40°C to +85°C 2.7V to 3.3V
CY62137CV30 Automotive -40°C to +125°C 2.7V to 3.3V
Electrical Characteristics Over the Operating Range
CY62137CV30-55
Parameter
Description
Min. Typ.[2] Max. Min. Typ.[2] Max. Unit
Test Conditions
VOH
Output HIGH Voltage
IOH = -1.0 mA
VCC = 2.7V
VOL
Output LOW Voltage
IOL = 2.1 mA
VCC = 2.7V
VIH
Input HIGH Voltage
2.2
VCC
+0.3
VIL
Input LOW Voltage
-0.3
IIX
Input Leakage
Current
GND < VI < VCC
-1
Output Leakage
Current
GND < VO < VCC,
Output Disabled
VCC Operating
Supply Current
f = fMax = 1/tRC
IOZ
ICC
2.4
2.4
0.4
V
2.2
VCC
+0.3
V
0.8
-0.3
0.8
V
+1
-1
+1
µA
-2
+2
-1
+1
-2
+2
Auto
Ind’l
-1
+1
Auto
VCC = 3.3V
Ind’l
IOUT = 0mA
CMOS Levels Auto
Ind’l
7
1.5
15
3
Auto
ISB1
ISB2
V
0.4
Ind’l
f = 1 MHz
CY62137CV30-70
Automatic CE
Ind’l
CE > VCC – 0.2V
Power-down
V > VCC – 0.2V or VIN < 0.2V,
Current — CMOS Inputs IN
f = fMax (Address and Data only),
f=0 (OE, WE, BHE and BLE)
Auto
2
Automatic CE
CE > VCC – 0.2V
Power-down
VIN > VCC – 0.2V or VIN < 0.2V
Current — CMOS Inputs f = 0, VCC = 3.3V
2
Ind’l
Auto
10
10
5.5
12
5.5
15
1.5
3
1.5
3
2
10
2
15
2
10
2
15
µA
mA
µA
µA
Note:
5. VIL(min.) = –2.0V for pulse durations less than 20 ns.
Document #: 38-05201 Rev. *G
Page 3 of 13
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CY62137CV30/33 MoBL®
CY62137CV MoBL®
Electrical Characteristics Over the Operating Range (continued)
CY62137CV33-55
Parameter
VOH
Description
Output HIGH Voltage
Test Conditions
IOH = -1.0 mA
VCC = 3.0V
Min.
Typ.[2]
CY62137CV-70
Min. Typ.[2]
Max.
2.4
VCC = 2.7V
VOL
Output LOW Voltage
IOL = 2.1 mA
VCC = 3.0V
Max.
Unit
2.4
V
2.4
V
0.4
VCC = 2.7V
0.4
V
0.4
V
VIH
Input HIGH Voltage
2.2
VCC + 0.3
2.2
VCC + 0.3
V
VIL
Input LOW Voltage
-0.3
0.8
-0.3
0.8
V
IIX
Input Leakage Current
-1
+1
-1
+1
µA
IOZ
Output Leakage Current GND < VO < VCC, Output
Disabled
-1
+1
-1
+1
µA
ICC
VCC Operating
Supply Current
mA
GND < VI < VCC
f = fMax = 1/tRC
f = 1 MHz
VCC = 3.6V
IOUT = 0 mA
CMOS Levels
7
15
5.5
12
1.5
3
1.5
3
ISB1
Automatic CE
CE > VCC – 0.2V
Power-down
V > VCC – 0.2V or VIN < 0.2V,
Current —CMOS Inputs IN
f = fMax (Address and Data Only),
f=0 (OE, WE, BHE, and BLE)
5
15
5
15
µA
ISB2
Automatic CE
LL
CE > VCC – 0.2V
Power-down
VIN > VCC – 0.2V or
Current —CMOS Inputs VIN < 0.2V, f = 0, VCC = 3.6V SL
5
15
5
15
µA
5
15
1
5
Capacitance[6]
Parameter
Description
CIN
Input Capacitance
COUT
Output Capacitance
Test Conditions
TA = 25°C, f = 1 MHz, VCC = VCC(typ.)
Max.
Unit
6
pF
8
pF
FBGA
Unit
55
°C/W
16
°C/W
Thermal Resistance[6]
Parameter
Description
ΘJA
Thermal Resistance
(Junction to Ambient)
ΘJC
Thermal Resistance
(Junction to Case)
Test Conditions
Still Air, soldered on a 3 x 4.5 inch,
2-layer printed circuit board
Note:
6. Tested initially and after any design or process changes that may affect these parameters.
Document #: 38-05201 Rev. *G
Page 4 of 13
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CY62137CV30/33 MoBL®
CY62137CV MoBL®
AC Test Loads and Waveforms
R1
VCC
ALL INPUT PULSES
VCC
OUTPUT
GND
Rise TIme: 1 V/ns
R2
30 pF
INCLUDING
JIG AND
SCOPE
90%
10%
90%
10%
Fall Time: 1 V/ns
Equivalent to: THEVENIN EQUIVALENT
RTH
OUTPUT
VTH
Parameters
3.0V
3.3V
Unit
R1
1105
1216
Ω
R2
1550
1374
Ω
RTH
645
645
Ω
VTH
1.75
1.75
V
Data Retention Characteristics (Over the Operating Range)
Parameter
Description
VDR
VCC for Data Retention
ICCDR
Data Retention Current
Conditions
Min.
Typ.[4]
1.5
VCC= 1.5V
LL
CE > VCC – 0.2V,
VIN > VCC – 0.2V or VIN < 0.2V
SL
tCDR[6]
Chip Deselect to Data Retention Time
tR[7]
Operation Recovery Time
Ind’l
1
Max.
Unit
Vcc(max)
V
6
Auto
8
Ind’l
4
µA
0
ns
tRC
ns
Data Retention Waveform[8]
DATA RETENTION MODE
VCC
CE or
VCC(min.)
tCDR
VDR > 1.5 V
VCC(min.)
tR
BHE.BLE
Notes:
7. Full-device AC operation requires linear VCC ramp from VDR to VCC(min.) > 100 µs or stable at VCC(min.) > 100 µs.
8. BHE.BLE is the AND of both BHE and BLE. Chip can be deselected by either disabling the chip enable signals or by disabling both BHE and BLE.
Document #: 38-05201 Rev. *G
Page 5 of 13
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CY62137CV30/33 MoBL®
CY62137CV MoBL®
Switching Characteristics Over the Operating Range[9]
55 ns
Parameter
Description
Min.
70 ns
Max.
Min.
Max.
Unit
Read Cycle
tRC
Read Cycle Time
55
tAA
Address to Data Valid
tOHA
Data Hold from Address Change
tACE
CE LOW to Data Valid
55
70
ns
tDOE
OE LOW to Data Valid
25
35
ns
tLZOE
OE LOW to Low-Z[10]
55
10
OE HIGH to
tLZCE
CE LOW to Low-Z[10]
70
10
ns
25
10
ns
ns
tHZCE
CE HIGH to
tPU
CE LOW to Power-up
tPD
CE HIGH to Power-down
55
70
ns
tDBE
BHE/BLE LOW to Data Valid
55
70
ns
tLZBE[11]
BHE/BLE LOW to
tHZBE
BHE/BLE HIGH to High-Z[10, 12]
Write
Low-Z[10]
20
ns
ns
5
20
High-Z[10, 12]
ns
10
5
High-Z[10, 12]
tHZOE
70
0
25
0
5
ns
5
20
ns
ns
25
ns
Cycle[13]
tWC
Write Cycle Time
55
70
ns
tSCE
CE LOW to Write End
45
60
ns
tAW
Address Set-up to Write End
45
60
ns
tHA
Address Hold from Write End
0
0
ns
tSA
Address Set-up to Write Start
0
0
ns
tPWE
WE Pulse Width
40
45
ns
tBW
BHE/BLE Pulse Width
50
60
ns
tSD
Data Set-up to Write End
25
30
ns
tHD
Data Hold from Write End
0
0
ns
High-Z[10, 12]
tHZWE
WE LOW to
tLZWE
WE HIGH to Low-Z[10]
20
10
25
10
ns
ns
Notes:
9. Test conditions assume signal transition time of 5 ns or less, timing reference levels of VCC(typ.)/2, input pulse levels of 0 to VCC(typ.), and output loading of the
specified IOL/IOH and 30 pF load capacitance.
10. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZBE is less than tLZBE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any
given device.
11. If both byte enables are toggled together this value is 10 ns.
12. tHZOE, tHZCE, tHZBE, and tHZWE transitions are measured when the outputs enter a high impedance state.
13. The internal write time of the memory is defined by the overlap of WE, CE = VIL, BHE and/or BLE = VIL. All signals must be ACTIVE to initiate a write and any
of these signals can terminate a write by going INACTIVE. The data input set-up and hold timing should be referenced to the edge of the signal that terminates
the write.
Document #: 38-05201 Rev. *G
Page 6 of 13
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CY62137CV30/33 MoBL®
CY62137CV MoBL®
Switching Waveforms
Read Cycle No. 1 (Address Transition Controlled)[14, 15]
tRC
ADDRESS
tOHA
DATA OUT
tAA
PREVIOUS DATA VALID
DATA VALID
Read Cycle No. 2 (OE Controlled)[15, 16]
ADDRESS
tRC
CE
tPD
tHZCE
tACE
OE
ttLZOE
LZOE
BHE/BLE
tHZOE
tDOE
tHZBE
tDBE
tLZBE
HIGH IMPEDANCE
DATA OUT
HIGH
IMPEDANCE
DATA VALID
tLZCE
tPU
VCC
SUPPLY
CURRENT
ICC
50%
50%
ISB
Notes:
14. Device is continuously selected. OE, CE = VIL, BHE, BLE = VIL.
15. WE is HIGH for read cycle.
16. Address valid prior to or coincident with CE, BHE, BLE transition LOW.
Document #: 38-05201 Rev. *G
Page 7 of 13
[+] Feedback
CY62137CV30/33 MoBL®
CY62137CV MoBL®
Switching Waveforms (continued)
Write Cycle No. 1 (WE Controlled)[13, 17, 18]
tWC
ADDRESS
CE
tAW
tHA
tSA
WE
tPWE
tBW
BHE/BLE
OE
tSD
DATA I/O
NOTE 19
tHD
DATAIN VALID
tHZOE
Write Cycle No. 2 (CE Controlled)[13, 17, 18]
tWC
ADDRESS
tSCE
CE
tSA
tAW
tHA
tPWE
WE
tBW
BHE/BLE
OE
tSD
DATA I/O
tHD
DATAIN VALID
NOTE 19
tHZOE
Notes:
17. Data I/O is high-impedance if OE = VIH.
18. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
19. During this period, the I/Os are in output state and input signals should not be applied.
Document #: 38-05201 Rev. *G
Page 8 of 13
[+] Feedback
CY62137CV30/33 MoBL®
CY62137CV MoBL®
Switching Waveforms (continued)
Write Cycle No. 3 (WE Controlled, OE LOW)[18]
.
tWC
ADDRESS
CE
tAW
tHA
tBW
BHE/BLE
tSA
tPWE
WE
tSD
DATA I/O
NOTE 19
tHD
DATAIN VALID
tLZWE
tHZWE
Write Cycle No. 4 (BHE/BLE Controlled, OE LOW)[18]
tWC
ADDRESS
CE
tAW
tHA
tBW
BHE/BLE
tSA
tPWE
WE
tSD
DATA I/O
NOTE 19
DATAIN VALID
tHZWE
Document #: 38-05201 Rev. *G
tHD
tLZWE
Page 9 of 13
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CY62137CV30/33 MoBL®
CY62137CV MoBL®
Truth Table
CE
WE
OE
BHE
BLE
Inputs/Outputs
Mode
Power
H
X
X
X
X
High-Z
Deselect/Power-down
Standby (ISB)
X
X
X
H
H
High-Z
Deselect/Power-down
Standby (ISB)
L
H
L
L
L
Data Out (I/O0–I/O15)
Read
Active (ICC)
L
H
L
H
L
High Z (I/O8–I/O15);
Data Out (I/O0–I/O7)
Read
Active (ICC)
L
H
L
L
H
Data Out (I/O8–I/O15);
High Z (I/O0–I/O7)
Read
Active (ICC)
L
L
X
L
L
Data In (I/O0–I/O15)
Write
Active (ICC)
L
L
X
H
L
High Z (I/O8–I/O15);
Data In (I/O0–I/O7)
Write
Active (ICC)
L
L
X
L
H
Data in (I/O8–I/O15);
High Z (I/O0–I/O7)
Write
Active (ICC)
L
H
H
L
L
High-Z
Output Disabled
Active (ICC)
L
H
H
H
L
High-Z
Output Disabled
Active (ICC)
L
H
H
L
H
High-Z
Output Disabled
Active (ICC)
Ordering Information
Speed
(ns)
55
70
Ordering Code
CY62137CV30LL-55BVI
Package
Diagram
51-85150
Package Type
48-ball FBGA (6 x 8 x 1 mm)
CY62137CV30LL-55BVXI
48-ball FBGA (6 x 8 x 1 mm) (Pb-free)
CY62137CV33LL-55BVI
48-ball FBGA (6 x 8 x 1 mm)
CY62137CV30LL-70BAI
51-85096
48-ball FBGA (7 x 7 x 1.2 mm)
CY62137CV30LL-70BVI
51-85150
48-ball FBGA (6 x 8 x 1 mm)
CY62137CVSL-70BAI
51-85096
48-ball FBGA (7 x 7 x 1.2 mm)
CY62137CVSL-70BAXI
Industrial
Industrial
48-ball FBGA (7 x 7 x 1.2 mm) (Pb-free)
CY62137CV30LL-70BAE
51-85096
48-ball FBGA (7 x 7 x 1.2 mm)
CY62137CV30LL-70BVE
51-85150
48-ball FBGA (6 x 8 x 1 mm)
CY62137CV30LL-70BVXE
Operating
Range
Automotive
48-ball FBGA (6 x 8 x 1 mm) (Pb-free)
Please contact your local Cypress sales representative for availability of these parts
Document #: 38-05201 Rev. *G
Page 10 of 13
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CY62137CV30/33 MoBL®
CY62137CV MoBL®
Package Diagrams
48-ball FBGA (7 x 7 x 1.2 mm) (51-85096)
BOTTOM VIEW
TOP VIEW
PIN 1 CORNER
Ø0.05 M C
PIN 1 CORNER
(LASER MARK)
Ø0.25 M C A B
Ø0.30±0.05(48X)
1 2
3
4
5
6
6
4
3
2
1
C
F
G
D
E
F
2.625
E
0.75
C
5.25
B
7.00±0.10
A
B
D
7.00±0.10
5
A
G
H
H
A
A
1.875
0.75
B
7.00±0.10
3.75
7.00±0.10
0.10 C
0.21±0.05
0.53±0.05
0.25 C
B
0.15(4X)
51-85096-*F
0.36
SEATING PLANE
C
Document #: 38-05201 Rev. *G
1.20 MAX.
Page 11 of 13
[+] Feedback
CY62137CV30/33 MoBL®
CY62137CV MoBL®
Package Diagrams (continued)
48-ball VFBGA (6 x 8 x 1 mm) (51-85150)
BOTTOM VIEW
TOP VIEW
A1 CORNER
Ø0.05 M C
Ø0.25 M C A B
A1 CORNER
Ø0.30±0.05(48X)
2
3
4
5
6
6
4
5
3
2
1
C
C
E
F
G
D
E
2.625
D
0.75
A
B
5.25
A
B
8.00±0.10
8.00±0.10
1
F
G
H
H
A
1.875
A
B
0.75
6.00±0.10
3.75
6.00±0.10
0.15(4X)
0.10 C
0.21±0.05
0.25 C
0.55 MAX.
B
51-85150-*D
C
1.00 MAX
0.26 MAX.
SEATING PLANE
MoBL is a registered trademark and More Battery Life is a trademark of Cypress Semiconductor Corporation. All product and
company names mentioned in this document may be the trademarks of their respective holders.
Document #: 38-05201 Rev. *G
Page 12 of 13
© Cypress Semiconductor Corporation, 2006. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be
used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its
products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
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CY62137CV30/33 MoBL®
CY62137CV MoBL®
Document History Page
Document Title: CY62137CV30/33 MoBL® and CY62137CV MoBL® 2-Mbit (128K x 16) Static RAM
Document Number: 38-05201
REV.
ECN NO.
Issue Date
Orig. of
Change
Description of Change
**
112393
02/19/02
GAV
New Data Sheet (advance information)
*A
114015
04/25/02
JUI
Added BV package diagram
Changed from Advance Information to Preliminary
*B
117064
07/12/02
MGN
Changed from Preliminary to Final
*C
118122
09/10/02
MGN
Added new part number: CY62137CV with wider voltage (2.7V – 3.6V)
Added new SL power bin for new part number
For TAA = 55 ns, improved tPWE min. from 45 ns to 40 ns
For TAA = 70 ns, improved tPWE min. from 50 ns to 45 ns
For TAA = 70 ns, improved tLZWE min. from 5 ns to 10 ns
*D
118761
09/23/02
MGN
Improved Typ. ICC spec to 7 mA (for 55 ns) and 5.5 mA (for 70 ns)
Improved Max ICC spec to 15 mA (for 55 ns) and 12 mA (for 70 ns)
For TAA = 55 ns, improved tLZWE min. from 5 ns to 10 ns
Changed upper spec. for Supply Voltage to Ground Potential to VCC(max) + 0.5V
Changed upper spec. for DC Voltage Applied to Outputs in High-Z State and DC
Input Voltage to VCC + 0.3V
*E
343877
See ECN
PCI
Added Automotive Information in Operating Range, DC and Ordering Information
Table
*F
419237
See ECN
ZSD
Changed the address of Cypress Semiconductor Corporation on Page #1 from
“3901 North First Street” to “198 Champion Court”
Updated the ordering information table and replaced the Package name column
with Package diagram
*G
486789
See ECN
VKN
Removed part number CY62137CV25 from the product offering
Updated the ordering information table
Document #: 38-05201 Rev. *G
Page 13 of 13
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