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MB3793-45PNF-G-JN-ER-6E1

MB3793-45PNF-G-JN-ER-6E1

  • 厂商:

    CYPRESS(赛普拉斯)

  • 封装:

    SOICN-8_4.9X3.9MM

  • 描述:

    IC SUPERVISOR 1 CHANNEL 8SOP

  • 数据手册
  • 价格&库存
MB3793-45PNF-G-JN-ER-6E1 数据手册
Please note that Cypress is an Infineon Technologies Company. The document following this cover page is marked as “Cypress” document as this is the company that originally developed the product. Please note that Infineon will continue to offer the product to new and existing customers as part of the Infineon product portfolio. Continuity of document content The fact that Infineon offers the following product as part of the Infineon product portfolio does not lead to any changes to this document. Future revisions will occur when appropriate, and any changes will be set out on the document history page. Continuity of ordering part numbers Infineon continues to support existing part numbers. Please continue to use the ordering part numbers listed in the datasheet for ordering. www.infineon.com THIS SPEC IS OBSOLETE Spec No: 002-08522 Spec Title: MB3793-45 POWER-VOLTAGE MONITORING IC WITH WATCHDOG TIMER DATASHEET Replaced by: None MB3793-45 Power-Voltage Monitoring IC with Watchdog Timer Datasheet Description The MB3793 is an integrated circuit to monitor power voltage; it incorporates a watchdog timer. A reset signal is output when the power is cut or falls abruptly. When the power recovers normally after resetting, a power-on reset signal is output to microprocessor units (MPUs). An internal watchdog timer with two inputs for system operation diagnosis can provide a fail-safe function for various application systems. Model No. Marking Code Detection Voltage MB3793-45 3793-7 4.5 V Features • • • • • • Precise detection of power voltage fall: ±2.5% Detection voltage with hysteresis Low power dispersion: ICC = 31 μA (reference) Internal dual-input watchdog timer Watchdog timer halt function (by inhibition pin) Independently-set watchdog and reset times Application • Arcade Amusement etc. Cypress Semiconductor Corporation Document Number: 002-08552 Rev. *D • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600 Revised December 10, 2018 MB3793-45 Contents 8.5 Clock Pulse Input Supplementation (Positive Clock Pulse) .......................................................... 12 Description ................................................................... 1 Features ....................................................................... 1 Application ................................................................... 1 9. Operation Sequence ............................................ 13 1. Pin Assignment ...................................................... 3 10. Typical Characteristics ...................................... 15 2. Pin Description ....................................................... 3 11. Application Example .......................................... 18 11.1 Supply Voltage Monitor and Watchdog Timer18 11.2 Supply Voltage Monitor and Watchdog Timer Stop ...................................................................... 19 11.3 Setting of Compulsory Reset ....................... 19 3. Block Diagram ........................................................ 4 4. Block Functions ..................................................... 5 5. Absolute Maximum Ratings .................................. 6 6. Recommended Operating Conditions .................. 6 7. Electrical Characteristics ...................................... 7 7.1 DC Characteristics ........................................... 7 7.2 AC Characteristics ........................................... 7 8. Timing Diagram ...................................................... 8 8.1 Basic Operation (Positive Clock Pulse) ........... 8 8.2 Basic Operation (Negative Clock Pulse) .......... 9 8.3 Single-Clock Input Monitoring (Positive Clock Pulse) .................................................................... 10 8.4 Inhibition Operation (Positive Clock Pulse)..... 11 Document Number: 002-08552 Rev. *D 12. Usage Precaution ............................................... 20 13. Ordering Information ......................................... 20 14. RoHS Compliance Information ......................... 20 15. Package Dimensions ......................................... 21 16. Major Changes ................................................... 23 Sales, Solutions, and Legal Information ................. 24 Page 2 of 24 MB3793-45 1. Pin Assignment (TOP VIEW) RESET 1 8 CK1 CTW 2 7 CK2 CTP 3 6 INH GND 4 5 VCC (SOE008) (SOB008) 2. Pin Description Pin No. Symbol 1 RESET 2 CTW Sets monitoring time 3 CTP Sets power-on reset hold time 4 GND Ground 5 VCC Power supply 6 INH Inhibits watchdog timer function 7 CK2 Inputs clock 2 8 CK1 Inputs clock 1 Document Number: 002-08552 Rev. *D Description Outputs reset Page 3 of 24 MB3793-45 3. Block Diagram To VCC of all blocks . 3 μA I1 = . 5 VCC I2 .=. 30 μA CTP 3 . R1 = . 650 kΩ Logic circuit RESET 1 Output circuit INH 6 Comp.S CTW 2 Watchdog timer − Reference voltage generator VS + Pulse generator 1 . 1.24 V VREF = . CK1 8 R2 .=. 240 kΩ Pulse generator 2 CK2 7 Document Number: 002-08552 Rev. *D To GND of all blocks 4 GND Page 4 of 24 MB3793-45 4. Block Functions 1. Comp. S Comp. S is a comparator with hysteresis to compare the reference voltage with a voltage (VS) that is the result of dividing the power voltage (VCC) by resistors R1 and R2. When VS falls below 1.24 V, a reset signal is output. This function enables the MB3793 to detect an abnormality within 1 μs when the power is cut or falls abruptly. 2. Output Circuit The output circuit has a comparator to control the reset signal (RESET) output. When the voltage at the CTP pin for setting the power-on reset hold time exceeds the threshold voltage, resetting is canceled. Since the reset (RESET) output buffer has the CMOS organization, no pull-up resistor is needed. 3. Pulse Generator The pulse generator generates pulses when the voltage at the CK1 and CK2 input clock pins changes to High from Low level (positive-edge trigger) and exceeds the threshold voltage; it sends the clock signal to the watchdog timer. 4. Watchdog Timer The watchdog timer can monitor two clock pulses. Short-circuit the CK1 and CK2 clock pins to monitor a single clock pulse. 5. Inhibition Pin The inhibition (INH) pin forces the watchdog timer on/off. When this pin is High level, the watchdog timer is stopped. 6. Logic Circuit Logic circuit controls charging and discharging of the power-on reset hold time setting capacity (CTP) on a signal of Comp.S and Watchdog timer. Document Number: 002-08552 Rev. *D Page 5 of 24 MB3793-45 5. Absolute Maximum Ratings Parameter Symbol Conditions VCC — CK1 VCK1 — CK2 VCK2 — INH IINH — RESET VOL VOH Reset output current IOL IOH Power dissipation PD Storage temperature Tstg Power supply voltage* Input voltage* Reset output voltage* Ta Rating Unit Min Max −0.3 −0.3 +7 VCC + 0.3 ( ≤ +7) V — −0.3 VCC + 0.3 ( ≤ +7) V — −10 +10 mA — 200 mW −55 +125 0C ≤ +850C — V * : The voltage is based on the ground voltage (0 V). WARNING: 1.Semiconductor devices may be permanently damaged by application of stress (including, without limitation, voltage, current or temperature) in excess of absolute maximum ratings.Do not exceed any of these ratings. 6. Recommended Operating Conditions Parameter Symbol Conditions Power supply voltage VCC Reset (RESET) output current Value Unit Min Typ Max — 1.2 5.0 6.0 V IOL — 0 — +5 mA IOH — −5 — 0 Power-on reset hold time setting capacity CTP — 0.001 0.1 10 μF Watchdog-timer monitoring time setting capacity* CTW — 0.001 0.01 1 μF Operating ambient temperature Ta — −40 +25 +85 0 C * : The watchdog timer monitor time range depends on the rating of the setting capacitor. WARNING: 1.The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated under these conditions. 2.Any use of semiconductor devices will be under their recommended operating condition. 3.Operation under any conditions other than these conditions may adversely affect reliability of device and could result in device failure. 4.No warranty is made with respect to any use, operating conditions or combinations not represented on this data sheet. If you are considering application under any conditions other than listed herein, please contact sales representatives beforehand. Document Number: 002-08552 Rev. *D Page 6 of 24 MB3793-45 7. Electrical Characteristics 7.1 DC Characteristics (VCC = +5 V, Ta = +25°C) Parameter Symbol Typ Max — 31 45 μA Ta = +25°C 4.40 4.50 4.60 V Ta = −40 to +85°C 4.35* 4.50 4.65* Ta = +25°C 4.50 4.60 4.70 Ta = −40 to +85°C 4.45* 4.60 4.75* 50 100 150 mV ICC1 After exit from reset Detection voltage VSL VCC falling VCC rising Unit Min Power current VSH Value Conditions V Detection voltage hysteresis difference VSHYS CK input threshold voltage VCIH — 1.4* 1.9 2.5 V VCIL — 0.8 1.3 1.8* V CK input hysteresis VCHYS — 0.4* 0.6 0.8* V INH input voltage VIIH — 3.5 — VCC V VIIL — 0 — 0.8 V Input current (CK1,CK2,INH) Reset output voltage Reset-output minimum power voltage VSH - VSL IIH VCK = VCC — 0 1.0 μA IIL VCK = 0 V −1.0 0 — μA VOH IRESET = −5 mA 4.5 4.75 — V VOL IRESET = +5 mA — 0.12 0.4 V VCCL IRESET = +50 μA — 0.8 1.2 V * : This parameter is guaranteed by design, which is not supported by a final test. 7.2 AC Characteristics (VCC = +5 V, Ta = +25°C) Parameter Symbol Conditions Value Min Typ Max Unit Power-on reset hold time tPR CTP = 0.1 μF 80 130 180 ms Watchdog timer monitoring time tWD CTW = 0.01 μF CTP = 0.1 μF 7.5 15 22.5 ms Watchdog timer reset time tWR CTP = 0.1 μF 5 10 15 ms CK input pulse duration tCKW — 500 — — ns CK input pulse cycle tCKT — 20 — — μs Reset (RESET) output transition time Rising tr* CL = 50 pF — — 500 ns Falling tf* CL = 50 pF — — 500 ns *: The voltage range is 10% to 90% at testing the reset output transition time. Document Number: 002-08552 Rev. *D Page 7 of 24 MB3793-45 8. Timing Diagram 8.1 Basic Operation (Positive Clock Pulse) VSH VSL VCC tCKW CK1 tCKT CK2 INH Vth CTP VH CTW VL RESET tWD tPR (1) (2) Document Number: 002-08552 Rev. *D (3) (4)(5) (5) tPR tWR (6) (7) (8) (9) (10) (11) (12) (13) Page 8 of 24 MB3793-45 8.2 Basic Operation (Negative Clock Pulse) VSH VSL VCC tCKW CK1 tCKT CK2 INH Vth CTP VH CTW VL RESET tPR (1) (2) Document Number: 002-08552 Rev. *D tWD (3) (4)(5) (5) tPR tWR (6) (7) (8) (9) (10) (11) (12) (13) Page 9 of 24 MB3793-45 8.3 Single-Clock Input Monitoring (Positive Clock Pulse) tCKW CK1 CK2 tCKT Vth CTP VH CTW VL RESET tWD tWR Note : The MB3793 can monitor only one clock. The MB3793 checks the clock signal at every other input pulse. Therefore, set watchdog timer monitor time tWD to the time that allows the MB3793 to monitor the period twice as long as the input clock pulse. Document Number: 002-08552 Rev. *D Page 10 of 24 MB3793-45 8.4 Inhibition Operation (Positive Clock Pulse) VSH VSL VCC tCKW CK1 tCKT CK2 INH Vth CTP VH CTW VL RESET tPR (1) (2) tWD (3) Document Number: 002-08552 Rev. *D (4)(5) (5) tPR tWR (6) (7) (11) (8) (9) (10) (12) (13) Page 11 of 24 MB3793-45 8.5 Clock Pulse Input Supplementation (Positive Clock Pulse) tCKT tCKW *1 CK1 *2 CK2 VH CTW VL Note : The MB3793 watchdog timer monitors Clock1 (CK1) and Clock2 (CK2) pulses alternately. When a CK2 pulse is detected after detecting a CK1 pulse, the monitoring time setting capacity (CTW) switches to charging from discharging. When two consecutive pulses occur on one side of this alternation before switching, the second pulse is ignored. In the above figure, pulse *1 and *2 are ignored. Document Number: 002-08552 Rev. *D Page 12 of 24 MB3793-45 9. Operation Sequence 1. Positive Clock Pulse Input Refer to “8.1 Basic Operation (Positive Clock Pulse)” under “8. Timing Diagram” 2. Negative Clock Pulse Input Refer to “8.2 Basic Operation (Negative Clock Pulse)” under “8. Timing Diagram” The MB3793 operates in the same way whether it inputs positive or negative pulses. 3. Clock Monitoring To use the MB3793 while monitoring only one clock, connect clock pins CK1 and CK2. Although the MB3793 operates basically in the same way as when monitoring two clocks, it monitors the clock signal at every other input pulse. Refer to “8.3 Single-Clock Input Monitoring (Positive Clock Pulse)” under “8. Timing Diagram” 4. Description of Operations The numbers given to the following items correspond to numbers (1) to (13) used in “8. Timing Diagram” (1) The MB3793 outputs a reset signal when the supply voltage (VCC) reaches about 0.8 V (VCCL) (2) If VCC reaches or exceeds the rise-time detected voltage VSH, the MB3793 starts charging the power-on reset hold time setting capacitor CTP. At this time, the output remains in a reset state. The VSH value is 4.60 V (Typ) . (3) When CTP has been charged for a certain period of time TPR (until the CTP pin voltage exceeds the threshold voltage (Vth) after the start of charging), the MB3793 cancels the reset (setting the RESET pin to “H” level from “L” level). The Vth value is about 3.6 V with VCC = 5.0 V The power-on reset hold time tPR is set with the following equation: tPR (ms) ≈ A × CTP (μF) The value of A is about 1300 with VCC = 5.0 V. The MB3793 also starts charging the watchdog timer monitor time setting capacitor (CTW). (4) When the voltage at the watchdog timer monitor time setting pin CTW reaches the “H” level threshold voltage VH, the CTW switches from the charge state to the discharge state. The value of VH is always about 1.24 V regardless of the detected voltage. (5) If the CK2 pin inputs a clock pulse (positive edge trigger) when the CTW is being discharged in the CK1-CK2 order or simultaneously, the CTW switches from the discharge state to the charge state. The MB3793 repeats operations (4) and (5) as long as the CK1/CK2 pin inputs clock pulses with the system logic circuit operating normally. (6) If no clock pulse is fed to the CK1 or CK2 pin within the watchdog timer monitor time tWD due to some problem with the system logic circuit, the CTW pin is set to the “L” level threshold voltage VL or less and the MB3793 outputs a reset signal (setting the RESET pin to “L” level from “H” level). The value of VL is always about 0.24 V regardless of the detected voltage. The watchdog timer monitor time tWD is set with the following equation: tWD (ms) ≈ B × CTW (μF) + C × CTP (μF) The value of B is hardly affected by the power supply voltage; it is about 1500 with VCC = 5.0 V. The value in C is about 3 which is tremendously smaller than the value in B. For this reason, it is possible to simplify the formula as below when CTP/CTW ≈ 10 or less. tWD (ms) ≈ B × CTW (μF) (7) When a certain period of time tWR has passed (until the CTP pin voltage reaches or exceeds Vth again after recharging the CTP), the MB3793 cancels the reset signal and starts operating the watchdog timer. The watchdog timer monitor reset time tWR is set with the following equation: tWR (ms) ≈ D x CTP (μF) The value of D is 100 with VCC = 5.0 V. The MB3793 repeats operations (4) and (5) as long as the CK1/CK2 pin inputs clock pulses. If no clock pulse is input, the MB3793 repeats operations (6) and (7). (8) If VCC is lowered to the fall-time detected voltage (VSL) or less, the CTP pin voltage decreases and the MB3793 outputs a reset signal (setting the RESET pin to “L” level from “H” level). The value of VSL is 4.50 V (Typ) . (9) When VCC reaches or exceeds VSH again, the MB3793 starts charging the CTP. (10) When the CTP pin voltage reaches or exceeds Vth, the MB3793 cancels the reset and restarts operating the watchdog timer. It repeats operations (4) and (5) as long as the CK1/CK2 pin inputs clock pulses. Document Number: 002-08552 Rev. *D Page 13 of 24 MB3793-45 (11) Making the inhibit pin active (setting the INH pin to “H” from “L”) forces the watchdog timer to stop operation. This stops only the watchdog timer, leaving the MB3793 monitoring VCC (operations (8) to (10)). The watchdog timer remains inactive unless the inhibit input is canceled. The inhibition (INH) pin must be connecting a voltage of more low impedance, to evade of the noise. (12) Canceling the inhibit input (setting the INH pin to “L” from “H”) restarts the watchdog timer. (13) The reset signal is output when the power supply is turned off to set VCC to VSL or less. 1. Equation of Time-Setting Capacitances (CTP and CTW) and Set Time tPR [ms] ≈ A × CTP [μF] tWD [ms] ≈ B × CTW [μF] + C × CTP [μF] However, when CTP/CTW ≈ 10 or less, tWD [ms] ≈ B × CTW [μF] tWR [ms] ≈ D × CTP [μF] Values of A, B, C, and D Note: A B C D Remark 1300 1500 3 100 VCC = 5.0 V The width of value of tPR, tWD and tWR becomes the same ratio as width (Min, Max) of each specification value. 2. Example (when CTP = 0.1 μF and CTW = 0.01 μF) Time (ms) Document Number: 002-08552 Rev. *D Symbol VCC = 5.0 V tPR 130 tWD 15 tWR 10 Page 14 of 24 MB3793-45 10. Typical Characteristics ICC - VCC characteristics VSH, VSL - Ta characteristics 4.8 MB3793 VCC VINH fCK= 1 kHz, Duty = 10% VL = 0 V/VH = VCC CTW = 0.01 μF, CTP = 0.1 μF Detection voltage VSH and VSL (V) Power current ICC (μA) 4.7 45 40 Watchdog timer monitoring 35 VSH 4.6 VSL 4.5 (VINH = 0 V) 30 4.4 25 20 0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 4.3 -40 8.0 -20 0 +20 +40 +60 +80 +100 +120 Operating ambient temperature Ta (°C) Power voltage VCC (V) V RESET - I RESET characteristics (N-MOS side) V RESET - I RESET characteristics (P-MOS side) 0.6 5.0 Ta = -40 °C 4.9 Ta = +25 °C 0.5 4.8 Reset output voltage V RESET (V) Reset output voltage V RESET (V) 4.7 4.6 4.5 Ta = +85 °C 4.4 4.3 0.4 Ta = +25 °C 0.3 Ta = +85 °C 0.2 4.2 0.1 Ta = -40 °C 4.1 4.0 0 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 Reset output current I RESET (mA) Document Number: 002-08552 Rev. *D 0 1 2 3 4 5 6 7 8 9 10 Reset output current I RESET(mA) Page 15 of 24 MB3793-45 tPR - Ta characteristics VRESET - VCC characteristics 260 7 Pull-up resistance: 100 kΩ 240 6 at VCC = 5.0 V 220 Power-on reset hold time tPR (ms) 200 Reset output voltage VRESET (V) 5 4 3 Ta = +85 °C 2 Ta = +25 °C 180 160 140 120 100 80 60 1 40 Ta = -40 °C 20 0 0 1 2 3 4 5 6 0 -40 7 tWR - Ta characteristics +20 +40 +60 +80 +100 +120 26 at VCC = 5.0 V 24 22 22 20 20 Watchdog timer monitoring time tWD (ms) Watchdog timer reset time tWR (ms) 0 tWD - Ta characteristics 26 24 -20 Operating ambient temperature Ta (°C) Power voltage VCC (V) 18 16 14 12 10 8 6 18 16 14 12 10 8 6 4 4 2 2 0 −40 −20 0 +20 +40 +60 +80 +100 +120 Operating ambient temperature Ta (°C) Document Number: 002-08552 Rev. *D at VCC = 5.0 V 0 −40 −20 0 +20 +40 +60 +80 +100 +120 Operating ambient temperature Ta (°C) Page 16 of 24 MB3793-45 tWR - CTP characteristics 104 103 Watchdog timer reset time tWR (ms) Power-on reset hold time tPR (ms) tPR - CTP characteristics Ta = −40 °C 102 Ta = +25 °C 101 Ta = +85 °C 1 10 −1 10−4 10−3 10−2 10−1 101 1 103 102 Ta = −40 °C 101 1 Ta = +25 °C Ta = +85 °C 10−1 10−2 10−4 102 Power-on reset time setting capacitance CTP (μF) 10−3 10−2 10−1 1 101 102 Power-on reset time setting capacitance CTP (μF) tWD - CTW characteristics tWD - CTW characteristics 103 Ta = −40 °C 102 Ta = +25 °C 101 1 Ta = +85 °C 10−1 CTP = 0.01 μF 10−5 10−4 10−3 10−2 10−1 1 101 Watchdog timer monitoring time setting capacitance CTW (μF) Document Number: 002-08552 Rev. *D Watchdog timer monitoring time tWD (ms) Watchdog timer monitoring time tWD (ms) 104 103 CTP = 1 μF 102 CTP = 0.1 μF 101 1 10−1 CTP = 0.01 μF 10−5 10−4 10−3 10−2 10−1 1 101 Watchdog timer monitoring time setting capacitance CTW (μF) Page 17 of 24 MB3793-45 11. Application Example 11.1 Supply Voltage Monitor and Watchdog Timer 11.1.1 1-Clock Monitor VCC 5 VCC 2 CTW RESET 1 MB3793 RESET CTW* 3 CTP CTP* CK1 8 VCC Microprocessor CK 6 INH GND 4 CK2 7 GND GND * : Use a capacitor with less leakage current. 11.1.2 2-Clock Monitor VCC 5 VCC 2 CTW RESET 1 RESET MB3793 CTW* CTP* 3 CTP CK1 8 GND RESET VCC Microprocessor1 Microprocessor2 CK CK GND 6 INH VCC GND CK2 7 4 GND * : Use a capacitor with less leakage current. Document Number: 002-08552 Rev. *D Page 18 of 24 MB3793-45 11.2 Supply Voltage Monitor and Watchdog Timer Stop VCC 2 CTW 5 VCC RESET 1 RESET MB3793 VCC Microprocessor1 3 CTP CK CK1 8 CTW* CTP* RESET Microprocessor2 HALT CK GND HALT GND GND 6 INH VCC CK2 7 4 GND * : Use a capacitor with less leakage current. 11.3 Setting of Compulsory Reset VCC 5 VCC 2 CTW 10 kΩ RESET 1 MB3793 RESIN RESET CTW* CTP* 3 CTP CK1 8 VCC Microprocessor CK 6 INH GND 4 CK2 7 GND GND * : Use a capacitor with less leakage current. It is possible for the RESET pin to fix to “L” if the CTP pin is short-circuited to GND. Take care not to change the value of the CTP capacity because of the influence of Tr that is used at the time. Document Number: 002-08552 Rev. *D Page 19 of 24 MB3793-45 12. Usage Precaution 1. Do Not Configure the IC over the Maximum Ratings If the lC is used over the maximum ratings, the LSl may be permanently damaged. It is preferable for the device to normally operate within the recommended usage conditions. Usage outside of these conditions can have a bad effect on the reliability of the LSI. 2. Use the Devices within Recommended Operating Conditions The recommended operating conditions are under which the LSl is guaranteed to operate. The electrical ratings are guaranteed when the device is used within the recommended operating conditions and under the conditions stated for each item. 3. Printed Circuit Board Ground Lines should be Set Up with Consideration for Common Impedance 4. • • • • 5. Take Appropriate Measures Against Static Electricity Containers for semiconductor materials should have anti-static protection or be made of conductive material. After mounting, printed circuit boards should be stored and shipped in conductive bags or containers. Work platforms, tools, and instruments should be properly grounded. Working personnel should be grounded with resistance of 250 kΩ to 1 MΩ between body and ground. Do Not Apply Negative Voltages The use of negative voltages below –0.3 V may create parasitic transistors on LSI lines, which can cause malfunctions. 13. Ordering Information Part Number Package Remarks MB3793-45PF 8-pin plastic SOP (SOE008) – MB3793-45PNF 8-pin plastic SOP (SOB008) – 14. RoHS Compliance Information The LSI products of Spansion with “E1” are compliant with RoHS Directive , and has observed the standard of lead, cadmium, mercury, Hexavalent chromium, polybrominated biphenyls (PBB) , and polybrominated diphenyl ethers (PBDE) . The product that conforms to this standard is added “E1” at the end of the part number. Document Number: 002-08552 Rev. *D Page 20 of 24 MB3793-45 15. Package Dimensions Package Code: SOE008 b 0.39 0.47 0.55 L 0.45 0.60 0.75 b A'   1 , 3  $  1 ' (( +7 7$ &  7 , 1' (1 , 6 ($ 5( 35 $ 7  2; 1( ' 6 1 ,  , 7  , (  + ) /7   1 /, $+ 17 2, ,: 7  3' 2( 7 6 $ ,  & ( 52 / 8 7( $% (7  )6 8 5 (0 ) 05 $( , +, ) &7 1 6 , ( +' 7,       2  756 21 ( 2 1' $1, 7 /$$ 35 ' , * /8 1 * ,( , 7 +) $7 1 ( 2 6*& 1 , ( +'( 78* /$ 0 &. 2;& 5($ 3 )<  ' 1 ( &2: 1%2 $' 7( 6*< , $, 7 '. 9  /&$ $$& &  3 , 1 7 ( 5+2  (77 91 1( ( 20 +7 ( 71 , & 6 $21 3$ ' +  (7 1 16( , ( ) / (:$ '20 / 6 5 ,( (   + +  $77                Page 21 of 24 Document Number: 002-08552 Rev. *D 1 2 , 6 1 (  /( 7 %0 2 , $' 2  ) :  2E (  / + /( 7 $+  7  )  1 2 ) 22  6 , 6 6 8 , 86 ' 5( $ 7& 5 2;  5( 5 ( 3 1 : , 5  2 $/ %$ /  07 ( $2 + '7 7  P 1  ( +P 2 7 '     ( 1( 2 ' 7 ( , 8% $ 7 / , & ' &/ 2 1/1/ ,$2  ( + 7 & % 26 / $ 7 11 2 2, 6 1 (,5 ( 6 28 7< '5$$ 0  70 E 5 20   158$ 23 % ,00 5 , 6 ; $ 1$$' (%0 ( 00+ ,$7 ''$7           L 2  0.13 DETAIL A SIDE VIEW  c P P       1 ( ( : 7 ( %  ' $ ( /  ( + 7  ) 2  1 2 , 7 & ( 6  7 $ / ) 3 ( , +7 7 ' $ 2 7( / <  /( 3+ 37 $ 0 1 2 25 ,) 6  1P (P 0 , '   (  +2 77       1.25 REF 0.25 BSC ' ( , ) , & ( 3 6  ( + 7  5 2 )  6 1 2 , 7 , 6 2 3  / $ 1 , 0 5 ( 7  ) 2  5 ( % 0 8 1  0 8+ 07 ,* ; 1 $( 0/  ( ( +* 7$ . 6 & ,  $  13         L 1  +  0 8 7 $ '  7 $  ' ( 1 , 0 5 ( 7 ( '  ( %  2 7  %   $  6 0 8 7 $ '    0.20 0° L2 DETAIL A  8° ș  5.30 BSC  < *' 12 ,  % ' 0  & 8, 2 77 /7  & 6 76+1 $ 226, / 3 %0$7  (5/8 ) ( *(%+  $7' 7 .8/+ &226) 0 $  2 $( / 3+) )0 7 2 ( 2 '   +7 ( 7 $7 7$9(  , 2 1' 6/% $( 5 8 +1/(' 7,&71 0;1 $ 5 , (5(3 ' (  /7 2 /
MB3793-45PNF-G-JN-ER-6E1 价格&库存

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