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MAX16831ATJ+T

MAX16831ATJ+T

  • 厂商:

    AD(亚德诺)

  • 封装:

    WFQFN32

  • 描述:

    IC LED DRIVER CTRLR DIM 32TQFN

  • 数据手册
  • 价格&库存
MAX16831ATJ+T 数据手册
EVALUATION KIT AVAILABLE MAX16831 High-Voltage, High-Power LED Driver with Analog and PWM Dimming Control General Description The MAX16831 is a current-mode, high-brightness LED (HBLED) driver designed to control two external n-channel MOSFETs for the single-string LED current regulation. The MAX16831 integrates all the building blocks necessary to implement fixed-frequency HBLED drivers with wide-range dimming control. The MAX16831 is configurable to operate as a step-down (buck), step-up (boost), or step-up/-down (buck-boost) current regulator. Current-mode control with leading-edge blanking simplifies control-loop design. Internal slope compensation stabilizes the current loop when operating at duty cycles above 50%. The MAX16831 operates over a wide input voltage range and is capable of withstanding automotive load-dump events. Multiple MAX16831s can be synchronized to each other or to an external clock. The MAX16831 includes a floating dimming driver for brightness control with an external n-channel MOSFET in series with the LED string. HBLED drivers using the MAX16831 achieve efficiencies of over 90% in automotive applications. The MAX16831 also includes a 1.4A source and 2.5A sink gate driver for driving switching MOSFETs in high-power LED driver applications, such as front light assemblies. The dimming control allows for wide PWM dimming at frequencies up to 2kHz. Higher dimming ratios of up to 1000:1 are achievable at lower dimming frequencies. The MAX16831 is available in a 32-pin thin QFN package with exposed pad and operates over the -40°C to +125°C automotive temperature range. Features o Wide Input Range: 6V to 76V With Cold-Start Operation to 5.5V o Integrated Differential LED Current-Sense Amplifier o Floating Dimming Driver Capable of Driving an n-Channel MOSFET o 5% LED Current Accuracy o 200Hz On-Board Ramp Syncs to External PWM Dimming Signal o Programmable Switching Frequency (125kHz to 600kHz) and Synchronization o Output Overvoltage Load Dump, LED Short, Overtemperature Protection o Low 107mV LED Current Sense for High Efficiency o Enable/Shutdown Input with Shutdown Current Below 45µA Ordering Information TEMP RANGE PIN-PACKAGE MAX16831ATJ+ PART -40°C to +125°C 32 TQFN-EP* MAX16831ATJ/V+ -40°C to +125°C 32 TQFN-EP* +Denotes a lead(Pb)-free/RoHS-compliant package. *EP = Exposed pad. /V denotes an automotive qualified part. Typical Operating Circuits Applications Automotive Exterior Lighting: High-Beam/Low-Beam/Signal Lights Rear Combination Lights (RCL) Daytime Running Lights (DRL) Fog Light and Adaptive Front Light Assemblies BUCK-BOOST CONFIGURATION VIN LO VCC RUV1 CS- CS+ DGT QS RD DRV LEDs SNS+ RSENSE DIM Emergency Lighting DIM SNSQGND MAX16831 REG1 Navigation and Marine Indicators CLMP UVEN CUVEN Industrial and Architectural Lighting Projectors with RGB LED Light Sources RCS CCLMP RUV2 CREG1 HI RT CF RTSYNC ROV1 OV COMP CS FB AGND SGND REG2 R1 DRI ROV2 CREG2 C2 R2 C1 Pin Configuration appears at end of data sheet. Typical Operating Circuits continued at end of data sheet. For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com. 19-0809; Rev 2; 1/13 MAX16831 High-Voltage, High-Power LED Driver with Analog and PWM Dimming Control ABSOLUTE MAXIMUM RATINGS VCC, HI, LO, CLMP to QGND .................................-0.3V to +80V CS+, CS-, DGT, UVEN to QGND............................-0.3V to +80V UVEN to QGND ..........................................-0.3V to (VCC + 0.3V) DRV to SGND .........................................................-0.3V to +18V DRI, REG2, DIM to AGND ......................................-0.3V to +18V QGND, SGND to AGND ........................................-0.3V to +0.3V SNS+ to SNS- ...........................................................-0.3V to +6V CS, FB, COMP, SNS+, SNS-, OV, REF, RTSYNC to AGND .................................................-0.3V to +6V REG1, CLKOUT to AGND ........................................-0.3V to +6V CS+ to CS- .............................................................-0.3V to +12V HI to LO ..................................................................-0.3V to +36V CS+, CS-, DGT, CLMP to LO .................................-0.3V to +12V CS+, CS-, DGT, CLMP to LO ........................-0.3V to (HI + 0.3V) HI to CLMP .............................................................-0.3V to +28V Continuous Power Dissipation* (TA = +70°C) 32-Pin TQFN (derate 34.5mW/°C above +70°C) ........2758mW Thermal Resistance* θJA .................................................................................29°C/W θJC ................................................................................1.7°C/W Operating Temperature Range .........................-40°C to +125°C Maximum Junction Temperature .....................................+150°C Storage Temperature Range .............................-60°C to +150°C Reflow Temperature.........................................................+240°C Lead Temperature (soldering, 10s) .................................+300°C *As per JEDEC 51 standard, multilayer board (PCB). Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC = VUVEN = 14V, CREG1 = 1µF, CREG2 = 1µF, CCLMP = 0.1µF, RT = 25kΩ, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical specifications are at TA = +25°C.) PARAMETER Input Voltage Range Supply Current Shutdown Current SYMBOL CONDITIONS VCC MIN TYP UNITS 76.0 V IREG2 = 0A 2.7 4.5 mA ISHDN VUVEN ≤ 0.8V 25 45 µA VCC_R VCC rising 5.5 6.0 VCC_F VCC falling 5.0 5.5 IQ 5.5 MAX UVEN VCC UVLO Threshold VCC Threshold Hysteresis UVEN Threshold UVEN Input Current VCC_HYS 0.4 V V VUVR VUVEN rising 1.100 1.244 1.360 VUVF VUVEN falling 1.000 1.145 1.260 IUVEN VUVEN = 0V and VUVEN = 76V, VCC = 77V -0.2 0 ≤ IREG1 ≤ 2mA, 7.5V ≤ VCC ≤ 76V 4.75 5.00 5.25 IREG1 = 2mA, VCC = 5.7V 4.00 4.50 5.25 0.5 1.0 V 25 Ω +0.2 V µA REGULATORS REG1 Regulator Output VREG1 REG1 Dropout Voltage IREG1 = 2mA (Note 1) REG1 Load Regulation ∆V/∆I REG2 Regulator Output VREG2 REG2 Dropout Voltage REG2 Load Regulation VCC = 7.5V, 0 ≤ IREG1 ≤ 2mA 7.5V ≤ VCC ≤ 76V, IREG2 = 1mA 6.65 7.00 VCC = 5.7V, 0 ≤ IREG2 ≤ 20mA 4.5 5.0 IREG2 = 20mA (Note 1) ∆V/∆I 7.35 0.5 VCC = 7.5V, 0 ≤ IREG2 ≤ 20mA V V V 25 Ω 3.0 V HIGH-SIDE REGULATOR (CLMP) (All Voltages Referred to LO) (Note 2) CLMP UVLO Threshold VCLMPTH CLMP UVLO Threshold Hysteresis VCLMPHYS 2 VCLMP rising 2.0 2.5 0.22 V Maxim Integrated MAX16831 High-Voltage, High-Power LED Driver with Analog and PWM Dimming Control ELECTRICAL CHARACTERISTICS (continued) (VCC = VUVEN = 14V, CREG1 = 1µF, CREG2 = 1µF, CCLMP = 0.1µF, RT = 25kΩ, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical specifications are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS 8.7V ≤ (VHI - VLO) ≤ 36V, ICLMP = 1mA CLMP Regulator Output Voltage VCLMP MIN 5.5 TYP MAX 8.0 10.0 V (VHI - VLO) - 0.7 5.0V ≤ (VHI - VLO) ≤ 8.7V, ICLMP = 250µA UNITS CURRENT-SENSE AMPLIFIER (CSA) Differential Input Voltage Range VCS+ VCS- 0 Common-Mode Range CS+ Input Bias Current ICS+ VCS+ - VCS- = 0.3V CS- Input Bias Current ICS- VCS+ - VCS- = 0.3V Unity-Gain Bandwidth 0.3 V 0 VCC V -250 +250 µA 400 µA From (CS+ - CS-) to CS 1.0 MHz REF OUTPUT BUFFER REF Output Voltage VREF -100µA ≤ IREF ≤ +100µA 2.85 3.00 VCLMP - VLO = 4V 5 20 VCLMP - VLO = 8V 30 67 VCLMP - VLO = 4V 10 22 VCLMP - VLO = 8V 40 76 DRI rising 4.0 3.15 V DIM DRIVER Source Current Sink Current mA mA GATE DRIVER DRI UVLO Threshold DRI UVLO Threshold Hysteresis Driver Output Impedance VUVLO_TH VUVLO_HYST 4.2 4.4 0.3 V V ZOUT_L VDRI = 7.0V, DRV sinking 250mA 2.8 4 ZOUT_H VDRI = 7.0V, DRV sourcing 250mA 5.0 8 Ω Peak Sink Current ISK VDRI = 7.0V 2.5 A Peak Source Current ISR VDRI = 7.0V 1.4 A VCOMP - (VSNS+ - VSNS-) 0.7 V PWM, ILIM, AND HICCUP COMPARATOR PWM Comparator Offset Voltage Peak Current-Limit Comparator Trip Threshold 160 Peak Current-Limit Comparator Propagation Delay (Excluding Blanking Time) 50mV overdrive HICCUP Comparator Trip Threshold 200 240 40 235 300 mV ns 385 mV SNS+ Input Bias Current VSNS+ = 0V, VSNS- = 0V -100 -65 µA SNS- Input Bias Current VSNS+ = 0V, VSNS- = 0V -100 -65 µA 40 ns Blanking Time Maxim Integrated tBLNK 3 MAX16831 High-Voltage, High-Power LED Driver with Analog and PWM Dimming Control ELECTRICAL CHARACTERISTICS (continued) (VCC = VUVEN = 14V, CREG1 = 1µF, CREG2 = 1µF, CCLMP = 0.1µF, RT = 25kΩ, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical specifications are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS ERROR AMPLIFIER FB Input Bias Current -100 +100 nA EAMP Output Sink Current VFB = 1.735V, VCOMP = 1V 3 7 mA EAMP Output Source Current VFB = 0.735V, VCOMP = 1V 2 7 mA EAMP Input Common-Mode Voltage 0 EAMP Output Clamp Voltage Voltage Gain Unity-Gain Bandwidth 1.1 AV GBW 3.0 1.7 2.4 V V RCOMP = 100kΩ to AGND 80 dB RCOMP = 100kΩ to AGND, CCOMP = 100pF to AGND 0.5 MHz OSCILLATOR, OSC SYNC, CLK, AND CLKOUT RTSYNC Frequency Range fSWMIN 125 fSWMAX RTSYNC Oscillator Frequency RTSYNC High-Level Voltage VSIHL RTSYNC Low-Level Voltage VSILL 500 RT = 25kΩ 475 500 525 RT = 100kΩ 106 125 143 2.8 kHz kHz V 0.4 CLKOUT High Level ISINK = 0.8mA CLKOUT Low Level ISOURCE = 1.6mA 0.4 V fSW = 500kHz 500 pF 240 Hz 2000 Hz 3.2 V 300 mV CLKOUT Maximum Load Capacitance CCLK_CAP 2.8 V V DIM SYNC, DIM RAMP, AND DIM PWM GEN Internal Ramp Frequency fRAMP 160 External Sync Frequency Range fDIM 80 External Sync Low-Level Voltage VLTH 0.4 External Sync High-Level Voltage VHTH DIM Comparator Offset VDIMOS 170 200 V 200 DIGITAL SOFT-START Soft-Start Duration tSS 4.0 ms OVERVOLTAGE COMPARATOR, LOAD OVERCURRENT COMPARATOR OVP Overvoltage Comparator Threshold VOV OVP Overvoltage Comparator Hysteresis VOV_HYST VOV rising 1.20 1.235 1.27 V 63.5 mV SLOPE COMPENSATION Slope Compensation Peak Voltage Per Cycle Clock generated by RT 120 mV Slope Compensation External clock applied to RTSYNC 15 mV/µs 4 Maxim Integrated MAX16831 High-Voltage, High-Power LED Driver with Analog and PWM Dimming Control ELECTRICAL CHARACTERISTICS (continued) (VCC = VUVEN = 14V, CREG1 = 1µF, CREG2 = 1µF, CCLMP = 0.1µF, RT = 25kΩ, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical specifications are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS THERMAL SHUTDOWN Thermal Shutdown Temperature TSHDN Temperature rising ∆TSHDN Hysteresis +165 °C 20 °C Note 1: Dropout voltage is defined as the input to output differential voltage at which the regulator output voltage drops 100mV below the nominal output voltage. Note 2: VCLMPTH determines the voltage required to operate the current-sense amplifier. The DIM driver requires 2.5V for (VCLMP - VLO) to drive the external MOSFET. VHI is typically one diode drop above VCLMP. A large capacitor connected to VCLMP slows the response of the LED current-sense circuitry, resulting in current overshoot. To ensure proper operation, connect a 0.1µF capacitor from CLMP to LO. Typical Operating Characteristics (VCC = VUVEN = 14V, CREG1 = 1µF, CREG2 = 10µF, CCLMP = 0.1µF, RT = 25kΩ, RCS = 0.1Ω, TA = +25°C, unless otherwise noted.) 25 24 23 22 21 2.9 2.8 2.7 2.6 2.5 2.4 2.3 20 2.2 19 2.1 18 DGT AND DRV NOT SWITCHING 2.0 -60 -40 -20 0 20 40 60 80 100 120 140 TEMPERATURE (°C) Maxim Integrated -60 -40 -20 0 20 40 60 80 100 120 140 TEMPERATURE (°C) 120 MAX16831 toc03 26 3.0 MAX16831 toc02 SHUTDOWN CURRENT (µA) 27 OPERATING CURRENT (mA) MAX16831 toc01 28 VOLTAGE ACROSS LED CURRENT-SENSE RESISTOR vs. SUPPLY VOLTAGE OPERATING CURRENT vs. TEMPERATURE 110 VOLTAGE ACROSS RCS (mV) SHUTDOWN CURRENT vs. TEMPERATURE 100 90 80 70 60 50 40 30 20 10 0 0 10 20 30 40 SUPPLY VOLTAGE (V) 5 MAX16831 High-Voltage, High-Power LED Driver with Analog and PWM Dimming Control Typical Operating Characteristics (continued) (VCC = VUVEN = 14V, CREG1 = 1µF, CREG2 = 10µF, CCLMP = 0.1µF, RT = 25kΩ, RCS = 0.1Ω, TA = +25°C, unless otherwise noted.) REG2 OUTPUT VOLTAGE vs. TEMPERATURE 6.95 6.90 6.85 5 4 3 2 6.80 4.94 IREG1 = 2mA 4.90 20 40 60 80 100 120 140 0 5 10 15 20 25 30 35 40 -60 -40 -20 0 20 40 60 80 100 120 140 SUPPLY VOLTAGE (V) TEMPERATURE (°C) REG1 OUTPUT VOLTAGE vs. SUPPLY VOLTAGE CLMP REGULATOR VOLTAGE vs. TEMPERATURE CLMP REGULATOR VOLTAGE vs. (VHI - VLO) CLMP VOLTAGE (V) 8.1 4 3 2 8.0 7.9 7.8 7.7 1 15 20 25 30 35 6 5 4 3 CLMP REGULATOR VOLTAGE = VCLMP - VLO 1 -60 -40 -20 0 40 7 2 7.5 0 10 8 VHI - VLO = 11V CLMP VOLTAGE = VCLMP - VLO 7.6 IREG1 = 2mA MAX16831 toc09 8.2 9 CLMP REGULATOR VOLTAGE (V) MAX16831 toc08 8.3 MAX16831 toc07 5 20 40 60 80 100 120 140 0 5 10 15 20 25 35 TEMPERATURE (°C) VHI - VLO (V) REF OUTPUT VOLTAGE vs. TEMPERATURE REF OUTPUT VOLTAGE vs. LOAD CURRENT PWM OSCILLATOR FREQUENCY vs. TEMPERATURE 3.00 2.99 2.98 3.00 2.99 2.98 520 510 500 490 480 IREF = 100µA RT = 25kΩ 2.96 2.96 -60 -40 -20 0 20 40 60 80 100 120 140 TEMPERATURE (°C) 40 MAX16831 toc12 3.01 2.97 2.97 530 PWM FREQUENCY (kHz) 3.01 3.02 MAX16831 toc11 MAX16831 toc10 3.02 6 30 SUPPLY VOLTAGE (V) REF OUTPUT VOLTAGE (V) 5 4.96 TEMPERATURE (°C) 6 0 4.98 IREG2 = 20mA 0 -60 -40 -20 0 5.00 4.92 1 IREG2 = 20mA REG1 OUTPUT VOLTAGE (V) 6 MAX16831 toc06 7 5.02 REG1 OUTPUT VOLTAGE (V) 7.00 MAX16831 toc05 7.05 8 REG2 OUTPUT VOLTAGE (V) MAX16831 toc04 REG2 OUTPUT VOLTAGE (V) 7.10 REF OUTPUT VOLTAGE (V) REG1 OUTPUT VOLTAGE vs. TEMPERATURE REG2 OUTPUT VOLTAGE vs. SUPPLY VOLTAGE 470 -225 -175 -125 -75 -25 25 75 125 175 225 LOAD CURRENT (µA) -60 -40 -20 0 20 40 60 80 100 120 140 TEMPERATURE (°C) Maxim Integrated MAX16831 High-Voltage, High-Power LED Driver with Analog and PWM Dimming Control Typical Operating Characteristics (continued) (VCC = VUVEN = 14V, CREG1 = 1µF, CREG2 = 10µF, CCLMP = 0.1µF, RT = 25kΩ, RCS = 0.1Ω, TA = +25°C, unless otherwise noted.) PWM OSCILLATOR FREQUENCY vs. 1/RT CONDUCTANCE MAX16831 toc14 450 10% DIMMING 1A/div 0A 400 50% DIMMING 1A/div 0A 350 300 90% DIMMING 1A/div 0A 250 200 90 150 100 0.005 MAX16831 toc15 500 100 LED CURRENT DUTY CYCLE (%) MAX16831 toc13 550 PWM FREQUENCY (kHz) LED CURRENT DUTY CYCLE vs. DIM VOLTAGE 200Hz DIMMING OPERATION 80 70 60 50 40 30 20 10 0 0.015 0.025 0.035 0.045 0 2ms/div 1 DRIVER (DRV) RISE TIME 3 DRIVER (DRV) FALL TIME MAX16831 toc16 MAX16831 toc17 DRV OUTPUT RISING 2V/div DRV OUTPUT FALLING 2V/div 0V 0V 5nF CAPACITOR CONNECTED FROM DRV TO AGND 5nF CAPACITOR CONNECTED FROM DRV TO AGND 40ns/div 40ns/div DGT RISE TIME DGT FALL TIME MAX16831 toc18 MAX16831 toc19 DGT OUTPUT RISING 14V OFFSET 2V/div DGT OUTPUT FALLING 14V OFFSET 2V/div 14V VHI - VLO = 11V 1nF CAPACITOR CONNECTED FROM DGT TO AGND 40ns/div Maxim Integrated 2 DIM VOLTAGE (V) 1/RT (kΩ-1) 14V VHI - VLO = 11V 1nF CAPACITOR CONNECTED FROM DGT TO AGND 40ns/div 7 MAX16831 High-Voltage, High-Power LED Driver with Analog and PWM Dimming Control Pin Description 8 PIN NAME 1, 24 N.C. FUNCTION No Connection. Not internally connected. 2 UVEN Undervoltage Lockout (UVLO) Threshold/Enable Input. UVEN is a dual-function adjustable UVLO threshold input with an enable feature. Connect UVEN to VCC through a resistive voltage-divider to program the UVLO threshold. Connect UVEN directly to VCC to use the 6.0V (max) default UVLO threshold. Apply a voltage greater than 1.244V to UVEN to enable the device. 3 REG1 5V Regulator Output. REG1 is an internal low-dropout voltage regulator that generates a 5V (VCC > 6V) output voltage and supplies power to internal circuitry. Bypass REG1 to AGND through a 1µF ceramic capacitor. 4 AGND Analog Ground 5 REF Accurate 3V Buffered Reference Output. Connect REF to DIM through a resistive voltage-divider to apply a DC voltage for analog-controlled dimming functionality. Leave REF unconnected if unused. 6 DIM Dimming Control Input. Connect DIM to an external PWM signal for PWM dimming. For analogcontrolled dimming, connect DIM to REF through a resistive voltage-divider. The dimming frequency is 200Hz under these conditions. Connect DIM to AGND to turn off the LEDs. 7 RTSYNC SYNC Input/Output. The PWM clock is generated by the RTSYNC oscillator. Connect an external resistor to RTSYNC to select a clock switching frequency from 125kHz to 600kHz or connect RTSYNC to an external clock to synchronize the MAX16831 with a master clock signal. 8 CLKOUT Clock Output. CLKOUT buffers the oscillator/clock. Connect CLKOUT to the SYNC input of another device to operate the MAX16831 in a multichannel configuration. CLKOUT is a logic output. 9, 10, 11 I.C. 12 COMP 13 CS Current-Sense Amplifier Output. The current-sense amplifier (CSA) senses the differential voltage across the load sense resistor, RCS, and generates a voltage, VCS, at CS proportional to the LED current. Connect the proper compensation resistor from CS to FB. 14 FB Error-Amplifier Inverting Input 15 OV Overvoltage Protection Input. Connect OV to HI through a resistive voltage-divider to set the overvoltage limit for the load. When the voltage at OV exceeds the 1.235V (typ) threshold, an overvoltage fault is generated and the switching MOSFET turns off. The MOSFET is turned on again when the voltage at OV drops below 1.17V (typ). 16, 17 SGND 18 DRV Gate Driver Output. Connect DRV to the gate of an external n-channel MOSFET for switching. 19 DRI Gate Driver Supply Input. Connect DRI to REG2 to power the primary switching MOSFET driver. Bypass DRI to AGND through a 10µF ceramic capacitor. 20 SNS+ Positive Peak Current-Sense Input. Connect SNS+ to the positive side of the switch current-sense resistor, RSENSE. 21 SNS- Negative Peak Current-Sense Input. Connect SNS- to the negative side of the switch current-sense resistor, RSENSE. 22 QGND 23 DGT Internally Connected. Must be connected to AGND. Error-Amplifier Output. Connect the compensation network from COMP to FB for stable closed-loop control. Use low-leakage ceramic capacitors in the feedback network. Switching Ground. SGND is the ground for non-analog and high-current gate driver circuitry. Analog Ground. Ensure a low-impedance connection between QGND and AGND. Dimming Gate Driver Output. Connect DGT to the gate of an external n-channel MOSFET for dimming. DGT is powered by the internal regulator, CLMP, and is referenced to LO. Maxim Integrated MAX16831 High-Voltage, High-Power LED Driver with Analog and PWM Dimming Control Pin Description (continued) PIN NAME FUNCTION 25 LO Low-Voltage Input. LO is the return point for the LED current. When using the MAX16831 in a buckboost configuration, connect LO to VCC. When using the device in a boost configuration only, connect LO to SGND. Connect LO to the junction of the inductor and LED current-sense resistor, RCS, when using a buck configuration. 26 CS+ Noninverting Current-Sense Amplifier Input. Connect CS+ to the positive side of an external sense resistor, RCS, connected in series with the load (LEDs). 27 CS- Inverting Current-Sense Amplifier Input. Connect CS- to the negative side of an external sense resistor, RCS, connected in series with the load (LEDs). Internal CLMP Regulator Output. CLMP supplies an 8V (typ) output when VHI ≥ 9V. If VHI is lower than 9V, VCLMP is one diode drop below VHI. The CLMP regulator powers the current-sense amplifier and provides the high reference for the dimming driver. VCLMP must be at least 2.5V higher than VLO to enable the current-sense amplifier and dimming MOSFET driver. Bypass CLMP to LO with a 0.1µF ceramic capacitor. 28 CLMP 29 HI 30 REG2 31 VCC Supply Voltage Input 32 I.C. Internally Connected. This pin is internally pulled to REG1 through a 10kΩ resistor. Leave this pin unconnected or connect it to QGND using a resistor of any value. If it is directly connected to QGND, 400µA to 600µA of current will flow out of this pin from VCC. Any resistor between this pin and QGND will reduce the current accordingly. — EP Exposed Pad. Connect EP to AGND. EP also functions as a heatsink to maximize thermal dissipation. Do not use as a ground connection. High-Voltage Input. HI is referred to LO. HI supplies power to the current-sense amplifier and dimming MOSFET gate driver through the CLMP regulator. Internal Regulator Output. REG2 is an internal voltage regulator that generates a 7V output and supplies power to internal circuitry. Connect REG2 to DRI to power the switching MOSFET driver during normal operation. Bypass REG2 to AGND with a 10µF ceramic capacitor. Detailed Description The MAX16831 is a current-mode PWM LED driver used for driving HBLEDs. By using two current regulation loops, 5% output current accuracy is achieved. One current regulation loop controls the external switching MOSFET peak current through a sense resistor, RSENSE, from SNS+ to SNS-, while the other current regulation loop controls the average LED string current through the sense resistor RCS in series with the LEDs. The wide operating supply range of (6.0V/5.5V ON/OFF) up to 76V makes the MAX16831 ideal in automotive applications. The MAX16831 features a programmable undervoltage lockout (UVEN) that ensures predictable operation during brownout conditions. The input UVEN circuit monitors the supply voltage, VCC, and turns the driver off when VCC drops below the UVLO threshold. Connect UVEN to VCC to use the 5.7V (typ) default UVLO threshold. The Maxim Integrated MAX16831 includes a cycle-by-cycle current limit that turns off the gate drive to the external switching MOSFET (Q S ) during an overcurrent condition. The MAX16831 features a programmable oscillator that simplifies and optimizes the design of external magnetics. The MAX16831 includes three internal voltage regulators, REG1, REG2, and CLMP, and a 3V buffered reference output, REF. Connect REG2 to the driver supply, DRI, to power the switching MOSFET driver. The MAX16831 is capable of synchronizing with an external clock or operating in stand-alone mode. A single resistor, RT, can be used to adjust the switching frequency from 125kHz to 600kHz for stand-alone operation. To synchronize the device with an external clock, apply a clock signal directly to the RTSYNC input. A buffered clock output, CLKOUT, is available to configure the MAX16831 in multichannel applications. 9 MAX16831 High-Voltage, High-Power LED Driver with Analog and PWM Dimming Control The MAX16831 features a differential high-side level shifter to drive an external n-channel MOSFET for dimming. Wide contrast “pulsed” dimming (1000:1) is possible by applying either a low-frequency PWM input signal or a DC voltage to the dimming input (DIM). Protection features include peak current limiting, HICCUP mode current limiting, output overvoltage protection, short-circuit protection, and thermal shutdown. The HICCUP current-limit circuitry reduces the power delivered to the load during severe fault conditions. Nonlatching overvoltage protection limits the voltage on the external switching MOSFET (QS) under open-circuit conditions in the LED string. During continuous operation at high input voltages, the power dissipation of the MAX16831 could exceed the maximum rating and an internal thermal shutdown circuitry safely turns off the MAX16831 when the device junction temperature exceeds +165°C. When the junction temperature drops below the hysteresis temperature, the MAX16831 automatically re-initiates startup. Undervoltage Lockout/Enable The MAX16831 features a dual-purpose adjustable UVLO input and enable function. Connect UVEN to VCC through a resistive voltage-divider to set the undervoltage lockout (UVLO) threshold. The MAX16831 is enabled when the UVEN exceeds the 1.244V (typ) threshold. Drive UVEN to ground to disable the output. Setting the UVLO Threshold The MAX16831 features a programmable UVLO threshold. Connect UVEN directly to VCC to select the default 6.0V (max) UVLO threshold. Connect UVEN to V CC through a resistive voltage-divider to select a UVLO threshold (Figure 1). Calculate resistor values as follows: ⎛ ⎞ VUVEN R UV1 = R UV 2 × ⎜ ⎟ V V ⎝ UVLO UVEN ⎠ where RUV1 + RUV2 ≤ 270kΩ, VUVEN is the 1.244V (typ) threshold voltage, and V UVLO is the desired UVLO threshold in volts at VCC (Figure 1). The capacitor, CUVEN, is required to prevent chattering at the UVLO threshold due to line impedance drops during power-up and dimming. If the undervoltage setting is very close to the required minimum operating voltage, then there can be jumps in the voltage at VCC during dimming, which may cause the MAX16831 to turn on and off when the dimming signal transitions from low to high. The capacitor, C UVEN , should be 10 VIN RUV2 VCC UVEN MAX16831 CUVEN RUV1 QGND Figure 1. Setting the UVLO Threshold large enough to limit the ripple on UVEN to less than the 100mV (min) UVEN hysteresis so that the device does not turn off under these circumstances. Soft-Start The MAX16831 includes a factory-set 4ms (typ) softstart delay that allows the load current to ramp up in a controlled manner, minimizing output overshoot. Softstart begins once the device is enabled and V CC exceeds the UVLO threshold. Soft-start circuitry slowly increases the internal soft-start voltage, VSS, resulting in a controlled rise of the load current. Signals applied to DIM are ignored until the soft-start duration is complete and a successive delay of 200µs has elapsed. Internal Regulators The MAX16831 includes a fixed 5V voltage regulator REG1, a 7V voltage regulator REG2, and an internal 8V regulator CLMP. REG1 and REG2 power up when VCC exceeds the UVLO threshold. REG1 supplies power to internal circuitry and remains on during PWM dimming. It is capable of driving external loads up to 2mA. REG2 is capable of delivering up to 20mA of current. Connect REG2 to DRI to generate the supply voltage for the primary switching MOSFET driver, DRV. CLMP is powered by HI and supplies power to the current-sense amplifier (CSA). CSA is enabled when V CLMP goes 2.5V above V LO and is disabled when (VCLMP - VLO) falls below 2.28V. The CLMP regulator also provides power to the dimming MOSFET control circuitry. CLMP is the output of the CLMP regulator. Do not use CLMP to power external circuitry. Bypass CLMP to LO with a 0.1µF ceramic capacitor. A larger capacitor will result in overshoots of the load current. Maxim Integrated MAX16831 High-Voltage, High-Power LED Driver with Analog and PWM Dimming Control Reference Voltage Output The MAX16831 includes a 5% accurate 3V (typ) buffered reference output, REF. REF is a push-pull output capable of sourcing/sinking 100µA of current and can drive a maximum load capacitance of 100pF. Connect REF to DIM through a resistive voltage-divider to supply an analog signal for dimming. See the Dimming Input (DIM) section. REF R3 MAX16831 DIM AGND R4 Dimming MOSFET Driver (DDR) The MAX16831 requires an external n-channel MOSFET for PWM dimming. Connect the MOSFET to the output of the DDR dimming driver, DGT, for normal operation. VDGT swings between VLO and VCLMP. The DDR dimming driver is capable of sinking or sourcing up to 20mA of current. The average current required to drive the dimming MOSFET (IDRIVE_DIM) depends on the MOSFET’s total gate charge (QG_DIM) and the dimming frequency of the converter, fDIM. Use the following equation to calculate the average gate drive current for the n-channel dimming FET. IDRIVE_DIM = QG_DIM x fDIM n-Channel MOSFET Switch Driver (DRV) The MAX16831 drives an external n-channel MOSFET. Use an external supply or connect REG2 to DRI to power the MOSFET driver. The driver output, VDRV, swings between ground and VDRI. Ensure that VDRI remains below the absolute maximum VGS rating of the external MOSFET. DRV is capable of sinking 2.5A or sourcing 1.4A of peak current, allowing the MAX16831 to switch MOSFETs in high-power applications. The average current sourced to drive the external MOSFET depends on the total gate charge (QG) and operating frequency of the converter, fSW. The power dissipation in the MAX16831 is a function of the average output drive current (IDRIVE). Use the following equations to calculate the power dissipation in the gate driver section of the MAX16831 due to IDRIVE: IDRIVE = QG x fSW PD = (IDRIVE + ICC) x VDRI where VDRI is the supply voltage to the gate driver and ICC is the operating supply current. IDRIVE should not exceed 20mA. Dimming Input (DIM) The dimming input, DIM, functions with either analog or PWM control signals. Once the internal pulse detector detects three successive edges of a PWM signal with a frequency between 80Hz and 2kHz, the MAX16831 synchronizes to the external signal and pulse-width-modulates the LED current at the external DIM input frequency with the same duty cycle as the DIM input. If an analog Maxim Integrated Figure 2. Creating a DIM Input Signal from REF control signal is applied to DIM, the MAX16831 compares the DC input to an internally generated 200Hz ramp to pulse-width-modulate the LED current (fDIM = 200Hz). The output current duty cycle is linearly adjustable from 0 to 100% (0.2V < VDIM < 2.8V). Use the following formula to calculate the voltage, VDIM, necessary for a given output-current duty cycle, D: VDIM = (D x 2.6) + 0.2V where VDIM is the voltage applied to DIM in volts. Connect DIM to REF through a resistive voltage-divider to apply a DC DIM control signal (Figure 2). Use the required dimming input voltage, V DIM , calculated above and select appropriate resistor values using the following equation: R4 = R3 x VDIM / (VREF - VDIM) where V REF is the 3V reference output voltage and 30kΩ ≤ R3 + R4 ≤ 150kΩ. For proper operation at startup or after toggling ENABLE, the controller needs three clock edges or an analog voltage greater than 0.3V on the DIM input. Oscillator, Clock, and Synchronization The MAX16831 is capable of stand-alone operation or synchronizing to an external clock, and driving external devices in SYNC mode. For stand-alone operation, program the switching frequency by connecting a single external resistor, RT, between RTSYNC and ground. Select the switching frequency, fSW, from 125kHz to 600kHz and calculate RT using the following formula: RT = 500kHz × 25k Ω fSW where the switching frequency is in kHz and RT is in kΩ. The MAX16831 is also capable of synchronizing to an external clock signal ranging from 125kHz to 600kHz. 11 MAX16831 High-Voltage, High-Power LED Driver with Analog and PWM Dimming Control Connect the clock signal to the RTSYNC input. The MAX16831 synchronizes to the external clock signal after the detection of five successive clock edges at RTSYNC. A buffered clock output, CLKOUT, is capable of driving the RTSYNC input of an external PWM controller for multichannel applications. CLKOUT is capable of driving capacitive loads up to 500pF. MASTER/PEER SLAVE/PEER MAX16831 MAX16831 RTSYNC CLKOUT RTSYNC CLKOUT RT Multichannel Configuration The MAX16831 is capable of multichannel operation. Connect CLKOUT to the SYNC input of an external device to use the MAX16831 as a master clock signal. Connect an external clock signal to RTSYNC to configure the MAX16831 as a slave. To setup two or more MAX16831 devices in a daisy-chain/peer-to-peer configuration, drive the RTSYNC input of one MAX16831 with the CLKOUT buffer of another (Figure 3). ILIM and HICCUP Comparator RSENSE sets the peak current through the inductor for switching. The differential voltage across RSENSE is compared to the 200mV voltage trip limit of the currentlimit comparator, ILIM. Set the current limit 20% higher than the peak switch current at the rated output power and minimum voltage. Use the following equation to calculate RSENSE: RSENSE = VSENSE / (1.2 x IPEAK) where V SENSE is the 200mV differential voltage between SNS+ and SNS- and IPEAK is the peak inductor current at full load and minimum input voltage. When the voltage drop across RSENSE exceeds the ILIM threshold, the MOSFET driver (DRV) terminates the on-cycle and turns the switch off, reducing the current through the inductor. The FET is turned back on at the beginning of the next switching cycle. When the voltage across RSENSE exceeds the 300mV (typ) HICCUP threshold, the HIC comparator terminates the on-cycle of the device, turning the switching MOSFET off. Following a startup delay of 4ms (typ), the MAX16831 re-initiates soft-start. The device will continue to operate in HICCUP mode until the overcurrent condition is removed. A built-in 40ns leading-edge blanking circuit of the current-sense signal prevents these comparators from prematurely terminating the on-cycle of the external switching MOSFET (QS). In some cases, this blanking time may not be adequate and an additional RC filter may be required to prevent spurious turn-off. 12 Figure 3. Master-Slave/Peer-Peer Clock Configuration Load Current Sense The load-sense resistor, R CS , monitors the current through the LEDs. The internal floating current-sense amplifier, CSA, measures the differential voltage across RCS, and generates a voltage proportional to the LED current through R CS at CS. This voltage on CS is referred to AGND. The closed loop regulates the LED current to a value, ILED, given by the following equation: ILED = 0.107V / RCS Slope Compensation The MAX16831 uses an internal ramp generator for slope compensation. The internal ramp signal is reset to zero at the beginning of each cycle and has a peakto-peak voltage of 120mV per switching cycle. Use an external resistor, RT, to set the switching frequency, fSW, and calculate the slope of the compensating ramp, mSLOPE, using the following equation: mSLOPE = 120 x fSW [mV/s] where fSW is the switching frequency in Hz. When the MAX16831 is synchronized to an external clock, the slope compensation ramp has a slope of 15mV/µs. Internal Voltage-Error Amplifier (EAMP) The MAX16831 includes a built-in voltage amplifier, with tri-state output, which can be used to close the feedback loop. The buffered output current-sense signal appears at CS, which is connected to the inverting input, FB, of the error amplifier through resistor R1. The noninverting input is connected to an internally trimmed current reference. The output of the error amplifier is controlled by the signal applied to DIM. When DIM is high, the output of the amplifier is connected to COMP. The amplifier output is open when DIM is low. This enables the integrating Maxim Integrated MAX16831 High-Voltage, High-Power LED Driver with Analog and PWM Dimming Control capacitor to hold the charge when the DIM signal has turned off the gate drive. When DIM is high again, the voltage on the compensation capacitors, C1 and C2, will force the converter into steady-state instantaneously. VLED+ MAX16831 ROV1 PWM Dimming PWM dimming is achieved by driving DIM with either a PWM signal or a DC signal. The PWM signal is internally connected to the error amplifier, the dimming MOSFET gate driver, and the switching MOSFET gate driver. When the DIM signal is high, the dimming MOSFET and the switching MOSFET drivers are enabled and the output of the voltage-error amplifier is connected to the external compensation network. Also, the buffered current-sense signal is connected to CS. Preventing discharge of the compensation capacitor when the DIM signal is low will allow the control loop to return the LED current to its original value almost instantaneously. When the DIM signal goes low, the output of the error amplifier is disconnected from the compensation network and the voltage of compensation capacitors, C1 and C2 is preserved. Choose low-leakage capacitors for C1 and C2. The drivers for the external dimming and switching MOSFETs are disabled, and the converter stops switching. The inductor energy is now transferred to the output capacitors. When the DIM signal goes high and the gate drivers are enabled, the additional voltage on the output capacitor may cause a current spike on the LED string. A larger output capacitor will result in a smaller current spike. The MAX16831 thus achieves fast PWM dimming response. Fault Protection The MAX16831 features built-in overvoltage protection, overcurrent protection, HICCUP mode current-limit protection, and thermal shutdown. Overvoltage protection is achieved by connecting OV to HI through a resistive voltage-divider. HICCUP mode limits the power dissipation in the external MOSFETs during severe fault conditions. Internal thermal shutdown protection safely turns off the converter when the junction temperature exceeds +165°C. Overvoltage Protection The overvoltage protection (OVP) comparator compares the voltage at OV with a 1.235V (typ) internal reference. When the voltage at OV exceeds the internal reference, the OVP comparator terminates PWM switching and no further energy is transferred to the Maxim Integrated OV AGND ROV2 Figure 4. Setting the Overvoltage Threshold load. The MAX16831 re-initiates soft-start once the overvoltage condition is removed. Connect OV to HI through a resistive voltage-divider to set the overvoltage threshold at the output. Setting the Overvoltage Threshold Connect OV to HI or to the high-side of the LEDs through a resistive voltage-divider to set the overvoltage threshold at the output (Figure 4). The overvoltage protection (OVP) comparator compares the voltage at OV with a 1.235V (typ) internal reference. Use the following equation to calculate resistor values: ⎛ VOV _ LIM - VOV ⎞ R OV1 = R OV 2 × ⎜ ⎟ VOV ⎝ ⎠ where VOV is the 1.235V OV threshold. Choose ROV1 and ROV2 to be reasonably high-value resistors to prevent discharge of filter capacitors. This will prevent unnecessary undervoltage and overvoltage conditions during dimming. Load-Dump Protection The MAX16831 features load-dump protection up to 80V. LED drivers using the MAX16831 can sustain single fault load dump events. Repeated load dump events within very short time intervals can cause damage to the dimming MOSFET due to excess power dissipation. Thermal Shutdown The MAX16831 contains an internal temperature sensor that turns off all outputs when the die temperature exceeds +165°C. Outputs are enabled again when the die temperature drops below +145°C. 13 MAX16831 High-Voltage, High-Power LED Driver with Analog and PWM Dimming Control Applications Information Inductor Selection The minimum required inductance is a function of operating frequency, input-to-output voltage differential, and the peak-to-peak inductor current (∆I L ). Higher ∆I L allows for a lower inductor value while a lower ∆I L requires a higher inductor value. A lower inductor value minimizes size and cost, improves large-signal transient response but reduces efficiency due to higher peak currents and higher peak-to-peak output ripple voltage for the same output capacitance. On the other hand, higher inductance increases efficiency by reducing the ripple current, ∆IL. However, resistive losses due to extra turns can exceed the benefit gained from lower ripple current levels, especially when the inductance is increased without also allowing for larger inductor dimensions. A good compromise is to choose ∆IL equal to 30% of the full load current. The inductor saturating current is also important to avoid runaway current during the output overload and continuous short circuit. Select the ISAT to be higher than the maximum peak current limit. Buck configuration: In a buck configuration, the average inductor current does not vary with the input. The worst-case peak current occurs at a high input voltage. In this case, the inductance L for continuous conduction mode is given by: L= VOUT × (VINMAX - VOUT ) VINMAX × fSW × ∆ IL where VINMAX is the maximum input voltage, fSW is the switching frequency, and VOUT is the output voltage. Boost configuration: In the boost converter, the average inductor current varies with line and the maximum average current occurs at low line. For the boost converter, the average inductor current is equal to the input current. In this case, the inductance L is calculated as: L= VINMIN × (VOUT - VINMIN ) VOUT × fSW × ∆ IL where VINMIN is the minimum input voltage, VOUT is the output voltage, and fSW is the switching frequency. Buck-boost configuration: In a buck-boost converter, the average inductor current is equal to the sum of the input current and the load current. In this case, the inductance L is: VOUT × VINMIN L= (VOUT + VINMIN ) × fSW × ∆ IL 14 where VINMIN is the minimum input voltage, VOUT is the output voltage, and fSW is the switching frequency. Output Capacitor The function of the output capacitor is to reduce the output ripple to acceptable levels. The ESR, ESL, and the bulk capacitance of the output capacitor contribute to the output ripple. In most of the applications, the output ESR and ESL effects can be dramatically reduced by using low-ESR ceramic capacitors. To reduce the ESL effects, connect multiple ceramic capacitors in parallel to achieve the required bulk capacitance. In a buck configuration, the output capacitance, CF, is calculated using the following equation: CF ≥ (VINMAX - VOUT ) × VOUT ∆ VR × 2 × L × VINMAX × fSW 2 where ∆VR is the maximum allowable output ripple. In a boost configuration, the output capacitance, CF, is calculated as: CF ≥ (VOUT - VINMIN ) × 2 × IOUT ∆ VR × VOUT × fSW where IOUT is the output current. In a buck-boost configuration, the output capacitance, CF, is calculated as: CF ≥ 2 × VOUT × IOUT ∆ VR × (VOUT + VINMIN ) × fSW where VOUT is the voltage across the load and IOUT is the output current. Connect the output capacitor(s) from the output to ground in a buck-boost configuration (not across the load as for other configurations). Input Capacitor A capacitor connected between the input line and ground must be used when configuring the MAX16831 as a buck converter. Use a low-ESR input capacitor that can handle the maximum input RMS ripple current. Calculate the maximum allowable RMS ripple using the following equation: IIN(RMS) = IOUT × VOUT × (VINMIN - VOUT ) VINMIN In most of the cases, an additional electrolytic capacitor should be added to prevent input oscillations due to line impedances. Maxim Integrated MAX16831 High-Voltage, High-Power LED Driver with Analog and PWM Dimming Control When using the MAX16831 in a boost or buck-boost configuration, the input RMS current is low and the input capacitance can be small. Operating the MAX16831 Without the Dimming Switch The MAX16831 can also be used in the absence of the dimming MOSFET. In this case, the PWM dimming performance is compromised but in applications that do not require dimming, the MAX16831 can still be used. A short circuit across the load will cause the MAX16831 to disable the gate drivers and they will remain off until the input power is recycled. Switching Power MOSFET Losses When selecting MOSFETs for switching, consider the total gate charge, power dissipation, the maximum drain-to-source voltage, and package thermal impedance. The product of the MOSFET gate charge and RDS(ON) is a figure of merit, with a lower number signifying better performance. Select MOSFETs optimized for high-frequency switching applications. MOSFET losses may be broken into three categories: conduction loss, gate drive loss, and switching loss. The following simplified power loss equation is true for all the different configurations. • Isolate the power components and high-current paths from sensitive analog circuitry. • Keep the high-current paths short, especially at the ground terminals. This practice is essential for stable, jitter-free operation. Keep switching loops short. • Connect AGND, SGND, and QGND to a ground plane. Ensure a low-impedance connection between all ground points. • Keep the power traces and load connections short. This practice is essential for high efficiency. Use thick copper PCBs (2oz vs. 1oz) to enhance full-load efficiency. • Ensure that the feedback connection to FB is short and direct. • Route high-speed switching nodes away from the sensitive analog areas. • To prevent discharge of the compensation capacitors, C1 and C2, during the off-time of the dimming cycle, ensure that the PCB area close to these components has extremely low leakage. Discharge of these capacitors due to leakage may result in degraded dimming performance. Pin Configuration PLOSS = PCONDUCTION + PGATEDRIVE + PSWITCH I.C. VCC REG2 HI CLMP CS- CS+ LO TOP VIEW 32 31 30 29 28 27 26 25 + 24 N.C. 2 23 DGT REG1 3 22 QGND AGND 4 21 SNS- REF 5 20 SNS+ DIM 6 19 DRI RTSYNC 7 18 DRV CLKOUT 8 17 SGND MAX16831 9 10 11 12 13 14 15 16 CS FB OV SGND *EP COMP UVEN I.C. 1 I.C. N.C. I.C. Layout Recommendations Typically, there are two sources of noise emission in a switching power supply: high di/dt loops and high dv/dt surfaces. For example, traces that carry the drain current often form high di/dt loops. Similarly, the heatsink of the MOSFET connected to the device drain presents a high dv/dt source; therefore, minimize the surface area of the heatsink as much as possible. Keep all PCB traces carrying switching currents as short as possible to minimize current loops. Use ground planes for best results. Careful PCB layout is critical to achieve low switching losses and clean, stable operation. Use a multilayer board whenever possible for better noise performance and power dissipation. Follow these guidelines for good PCB layout: • Use a large copper plane under the MAX16831 package. Ensure that all heat-dissipating components have adequate cooling. Connect the exposed pad of the device to the ground plane. TQFN (5mm x 5mm) *EP = EXPOSED PAD Maxim Integrated 15 MAX16831 High-Voltage, High-Power LED Driver with Analog and PWM Dimming Control Functional Diagram CLMP VCC CSA 7V REG2 5V REG1 + UVLO AND EN LO CS- CS+ HI CLMP VLO VCLMP UVEN REG2 THERMAL SHUTDOWN RLS QGND SLOPE COMP REG1 SLOPE VCLMP VCLMP UGB 10uA DDR VBUF 3.0V + REF + CMP 1.3 x V SS - DGT TRI VLO RTSYNC CS OSC OSC OC CLKOUT POR DRIVER OV OVP OV DRI CONTROL BLOCK EN VOV - + SGND + ILIM - 200mV + DIM COMP AGND DRV - 200mV + HIC - 300mV BLANKING TIME 40ns MAX16831 PWM INTERNAL TRIM - 600mV + SLOPE SS VOV SNS- + - 200Hz SNS+ X1 VSS EAMP COMP FB 16 Maxim Integrated MAX16831 High-Voltage, High-Power LED Driver with Analog and PWM Dimming Control Typical Operating Circuits (continued) BOOST CONFIGURATION VIN RCS CCLMP RUV2 CF VCC RUV1 CS+ CS- DGT LO CLMP UVEN QS RD DRV CUVEN LEDs SNS+ RSENSE REF SNS- R3 MAX16831 QGND DIM RTSYNC R4 RT ROV1 OV REG1 CREG1 COMP CS AGND FB R1 SGND HI DRI REG2 ROV2 CREG2 C2 R2 C1 Maxim Integrated 17 MAX16831 High-Voltage, High-Power LED Driver with Analog and PWM Dimming Control Typical Operating Circuits (continued) BUCK CONFIGURATION VIN CCLMP RUV2 VCC HI RUV1 LO CLMP RCS CS- CS+ DGT UVEN QS RD DRV CUVEN LEDs SNS+ RSENSE SNS- DIM DIM CF QGND MAX16831 REG1 CREG1 RT RTSYNC COMP OV CS FB AGND R1 SGND DRI REG2 CREG2 C2 R2 C1 Package Information Chip Information PROCESS: BICMOS 18 For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO. 32 TQFN-EP T3255M+4 21-0140 90-0014 Maxim Integrated MAX16831 High-Voltage, High-Power LED Driver with Analog and PWM Dimming Control Revision History REVISION NUMBER REVISION DATE 0 4/07 Initial release 1 4/09 Updated Pin Description and Input Capacitor sections. 9, 14 2 1/13 Added automotive qualified part to Ordering Information 1 DESCRIPTION PAGES CHANGED — Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000 ________________________________ 19 © 2013 Maxim Integrated Products, Inc. Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
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