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MAX17662
3.5V to 36V, 2A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
General Description
Benefits and Features
The MAX17662 is a high-efficiency, synchronous stepdown DC-DC converter with integrated MOSFETs operating over an input-voltage range of 3.5V to 36V. It can
deliver up to 2A current. Output voltage is programmable
from 0.6V up to 90% of VIN. Built-in compensation across
the output-voltage range eliminates the need for external
compensation components.
● Reduces External Components and Total Cost
• No Schottky—Synchronous Operation
• Internal Compensation Components
• All-Ceramic Capacitors, Compact Layout
● Reduces Number of DC-DC Regulators to Stock
• Wide 3.5V to 36V Input
• Adjustable Output Voltage Range from 0.6V up to
90% of VIN
• Delivers Up to 2A Over the Temperature Range
• 400kHz to 2.2MHz Adjustable Frequency
• Available in a 16-pin, 3mm x 3mm TQFN Package
The MAX17662 features a peak-current-mode control architecture. The MAX17662 can be operated in forced
pulse-width modulation (PWM), or discontinuous-conduction mode (DCM) to enable high efficiency under full-load
and light-load conditions. The MAX17662 offers a low minimum on-time that allows high switching frequencies and
a smaller solution size.
● Reduces Power Dissipation
• Peak Efficiency of 95%
• DCM Mode Enable Enhanced Light-Load Efficiency
• Wide 2.4V to 12V Bootstrap Bias Input (EXTVCC)
for Improved Efficiency
• 6.5μA Shutdown Current
The feedback-voltage regulation accuracy over -40°C to
+125°C is ±1.33%. The device is available in a 16-pin
(3mm x 3mm) TQFN package. Simulation models are
available.
● Operates Reliably in Adverse Industrial Environments
• Hiccup-Mode Overload Protection
• Adjustable and Monotonic Startup with Prebiased
Output Voltage
• Built-in Output-Voltage Monitoring with RESET
• Programmable EN/UVLO Threshold
• Overtemperature Protection
• High Industrial -40°C to +125°C Ambient Operating
Temperature Range/-40°C to +150°C Junction
Temperature Range
Applications
●
●
●
●
●
●
Industrial Control Power Supplies
General-Purpose Point-of-Load
Distributed Supply Regulation
Base Station Power Supplies
Wall Transformer Regulation
High-Voltage, Single-Board Systems
Ordering Information appears at end of data sheet.
Typical Application Circuit
VIN
6.5V TO 36V
C1
4.7µF
RT
EN/UVLO
MODE
C3
2.2µF
C2
6800pF
VCC
MAX17662
SGND
BST
SS
EXTVCC
PGND
RESET
C5
0.1µF
LX
FB
EP
19-100525; Rev 0; 7/19
VIN
L1
8.2µH
FB
R3
4.7Ω
C6
0.1µF
VOUT
C4
22µF
FB
VOUT
5V,2A
R1
232kΩ
R2
31.6kΩ
fSW : 500kHz
C1: 4.7µF/50V/X7R/1206 (GRM31CR71H475KA12)
L1: 8.2µH (XAL5050-822ME)
C4: 22µF/25V/X7R/1210 (GRM32ER71E226ME15)
MAX17662
3.5V to 36V, 2A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
Absolute Maximum Ratings
VIN to PGND........................................................... -0.3V to +40V
EN/UVLO to SGND ................................................ -0.3V to +40V
LX to PGND ................................................. -0.3V to (VIN + 0.3V)
EXTVCC to SGND.................................................. -0.3V to +14V
BST to PGND ......................................................... -0.3V to +42V
BST to LX .............................................................. -0.3V to +2.2V
BST to VCC............................................................. -0.3V to +40V
FB, SS, VCC, RT to SGND .................................... -0.3V to +2.2V
MODE, RESET to SGND ......................................... -0.3V to +6V
PGND to SGND ..................................................... -0.3V to +0.3V
LX total RMS current............................................................±3.8A
Output Short-Circuit duration ......................................Continuous
Continuous Power Dissipation (TA = +70°C)
TQFN Multilayer Board (derate 23.1mW/°C above
+70°C) ......................................................................1847.6mW
Operating Temperature Range (Note 1) .............-40°C to +125°C
Junction Temperature ....................................................... +150°C
Storage Temperature Range ..............................-65°C to +150°C
Lead Temperature (soldering, 10s)................................... +300°C
Soldering Temperature (reflow) ........................................ +260°C
Note 1: Junction temperature greater than +125°C degrades operating lifetimes.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the
device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
Package Information
TQFN
Package Code
T1633+5C
Outline Number
21-0136
Land Pattern Number
90-0032
Thermal Resistance, Four-Layer Board (Note 2)
Junction-to-Ambient (θJA)
38°C/W
Junction-to-Case Thermal Resistance (θJC)
4°C/W
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages.
Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different
suffix character, but the drawing pertains to the package regardless of RoHS status.
Note 2: Package thermal resistances were obtained using the MAX17662 Evaluation Kit with no airflow.
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Maxim Integrated | 2
MAX17662
3.5V to 36V, 2A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
Electrical Characteristics
(VIN = VEN/UVLO = 24V, RT = Unconnected (fSW = 500kHz), CVCC = 2.2uF, VMODE = VEXTVCC = VSGND = VPGND = 0, VFB = 0.64V,
LX = SS = RESET = Open, VBST to VLX = 1.8V, TA = TJ = -40°C to 125°C, unless otherwise noted. Typical values are at TA = +25°C.
All voltages are referenced to SGND, unless otherwise noted. (Note 3))
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
36
V
24
μA
INPUT SUPPLY (VIN)
Input Voltage Range
VIN
Input Shutdown Current
Input Quiescent Current
Input UVLO
3.5
IIN_SH
VEN/UVLO = 0V (Shutdown mode)
IQ_DCM
DCM mode, VLX = 0.1V
IQ_PWM
Normal Switching mode, VFB = 0.58V
VIN_UVLO_R
VIN rising
VIN_HYS
Hysteresis
6.5
2
mA
8.2
2.95
3.26
0.246
V
ENABLE/UVLO (EN/UVLO)
VENR
EN/UVLO Threshold
VEN_HYS
VEN_TRUESD
EN/UVLO Input
Leakage Current
IEN
VEN/UVLO rising
1.194
1.25
Hysteresis
0.1
VEN/UVLO falling, true shutdown
0.75
1.303
V
VEN/UVLO = 0V, TA = +25°C
-50
0
+50
3.5V < VIN < 36V, IVCC = 1mA
1.74
1.80
1.86
1mA < IVCC < 25mA
1.70
1.80
1.86
VCC_UVR
VCC rising
1.605
1.640
1.683
VCC_HYS
Hysteresis
nA
VCC (LDO)
VCC Output Voltage
Range
VCC UVLO
VCC
0.065
V
V
EXTVCC (EXT LDO)
EXTVCC Operating
Voltage Range
2.448
EXTVCC rising
EXTVCC Switchover
Threshold
2.348
Hysteresis
EXTVCC Shutdown
Current
12
2.400
2.448
0.09
VEN/UVLO = 0, EXTVCC = 12V
V
V
19
μA
POWER MOSFETS
High-Side nMOS OnResistance
RDS_ONH
ILX = 0.3A, sourcing
130
250
mΩ
Low-Side nMOS OnResistance
RDS_ONL
ILX = 0.3A, sinking
90
170
mΩ
LX Leakage Current
ILX_LKG
+2
μA
μA
VIN = 36V, TA = +25°C, VLX = (VPGND +
1)V to (VIN -1)V, VEN/UVLO = 0V
-2
VSS = 0.3V
4.7
5
5.3
VMODE = VSGND
0.592
0.600
0.608
VMODE = VCC
0.592
0.600
0.608
SOFT-START (SS)
Charging Current
ISS
FEEDBACK (FB)
FB Regulation Voltage
VFB_REG
FB Input Bias Current
IFB
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VFB = 1V, TA = +25°C
-50
+50
V
nA
Maxim Integrated | 3
MAX17662
3.5V to 36V, 2A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
Electrical Characteristics (continued)
(VIN = VEN/UVLO = 24V, RT = Unconnected (fSW = 500kHz), CVCC = 2.2uF, VMODE = VEXTVCC = VSGND = VPGND = 0, VFB = 0.64V,
LX = SS = RESET = Open, VBST to VLX = 1.8V, TA = TJ = -40°C to 125°C, unless otherwise noted. Typical values are at TA = +25°C.
All voltages are referenced to SGND, unless otherwise noted. (Note 3))
PARAMETER
SYMBOL
CONDITIONS
MIN
VM_DCM
VMODE = VCC (DCM mode)
1.22
VM_PWM
VMODE = VSGND (PWM mode)
TYP
MAX
UNITS
MODE
MODE Threshold
0.66
V
CURRENT LIMIT
Peak Current-Limit
Threshold
IPEAK_LIMIT
Valley Current-Limit
Threshold
IVALLEY_LIMIT
VMODE = VCC
2.8
3.4
4.1
-0.1
0
+0.1
VMODE = VSGND
-1.8
A
A
TIMING (RT)
Switching Frequency
VFB Undervoltage Trip
Level to Cause Hiccup
fSW
RRT = 51.1kΩ
375
400
425
RRT = 8.25kΩ
1980
2200
2420
RRT = Open
475
500
525
0.375
0.390
0.405
VFB_HICF
HICCUP Timeout
(Note 4)
Minimum On-Time
tON_MIN
Minimum Off-Time
tOFF_MIN
32768
60
126
kHz
V
Cycles
90
ns
176
ns
0.4
V
+0.1
μA
RESET
RESET Output Level
Low
RESET Output Leakage
Current
VRESETL
IRESET = 10mA
IRESETLKG
TA = TJ = +25°C
-0.1
FB Threshold for
RESET Deassertion
VFB_OKR
VFB rising
93.1
95.0
97.0
% of
VFB_REG
FB Threshold for
RESET Assertion
VFB_OKF
VFB falling
89.8
92.0
93.2
% of
VFB_REG
RESET Delay After FB
Reaches 95%
Regulation
1024
Cycles
155
°C
20
°C
THERMAL SHUTDOWN (TEMP)
Thermal-Shutdown
Threshold
Thermal-Shutdown
Hysteresis
Temperature rising
Note 3: Electrical specifications are production tested at TA = +25°C. Specifications over the entire operating temperature range are
guaranteed by design and characterization.
Note 4: See Overcurrent Protection/Hiccup Mode section for more details.
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Maxim Integrated | 4
MAX17662
3.5V to 36V, 2A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
Typical Operating Characteristics
((VEN/UVLO = VIN = 24V, VSGND = VPGND = 0V, CVCC = 2.2μF, CBST = 0.1μF, CSS = 6800pF, TA = -40°C to +125°C, unless otherwise
noted. Typical values are at TA = +25°C. All voltages are referenced to SGND, unless otherwise noted.))
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Maxim Integrated | 5
MAX17662
3.5V to 36V, 2A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
Typical Operating Characteristics (continued)
((VEN/UVLO = VIN = 24V, VSGND = VPGND = 0V, CVCC = 2.2μF, CBST = 0.1μF, CSS = 6800pF, TA = -40°C to +125°C, unless otherwise
noted. Typical values are at TA = +25°C. All voltages are referenced to SGND, unless otherwise noted.))
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Maxim Integrated | 6
MAX17662
3.5V to 36V, 2A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
Typical Operating Characteristics (continued)
((VEN/UVLO = VIN = 24V, VSGND = VPGND = 0V, CVCC = 2.2μF, CBST = 0.1μF, CSS = 6800pF, TA = -40°C to +125°C, unless otherwise
noted. Typical values are at TA = +25°C. All voltages are referenced to SGND, unless otherwise noted.))
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Maxim Integrated | 7
MAX17662
3.5V to 36V, 2A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
Typical Operating Characteristics (continued)
((VEN/UVLO = VIN = 24V, VSGND = VPGND = 0V, CVCC = 2.2μF, CBST = 0.1μF, CSS = 6800pF, TA = -40°C to +125°C, unless otherwise
noted. Typical values are at TA = +25°C. All voltages are referenced to SGND, unless otherwise noted.))
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Maxim Integrated | 8
MAX17662
3.5V to 36V, 2A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
Typical Operating Characteristics (continued)
((VEN/UVLO = VIN = 24V, VSGND = VPGND = 0V, CVCC = 2.2μF, CBST = 0.1μF, CSS = 6800pF, TA = -40°C to +125°C, unless otherwise
noted. Typical values are at TA = +25°C. All voltages are referenced to SGND, unless otherwise noted.))
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Maxim Integrated | 9
MAX17662
3.5V to 36V, 2A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
Pin Configuration
LX
LX
BST
EXTVCC
16 TQFN
12
11
10
9
TOP VIEW
PGND 13
PGND 14
8
RESET
7
RT
6
FB
5
SS
MAX
MAX17662
17662
VIN 15
VIN 16
2
3
4
SGND
MODE
EN/UVLO
1
VCC
*EP
3mm x 3mm
Pin Description
PIN
NAME
FUNCTION
Enable/Undervoltage Lockout Pin. Drive EN/UVLO high to enable the output. Connect to the
center of the resistor-divider between VIN and SGND to set the input voltage at which the part
turns on. Connect to VIN pins for always-on operation. Pull low (lower than VEN_TRUESD) for
disabling the device.
1
EN/UVLO
2
VCC
3
SGND
Signal Ground
4
MODE
The MODE pin configures the device to operate in either PWM or DCM modes of operation.
Connect MODE to SGND for constant-frequency PWM operation at all loads. Connect MODE to
VCC for DCM operation (at light loads). See the Mode Selection (MODE) section for more details.
5
SS
Soft-Start Input. Connect a capacitor from SS to SGND to set the soft-start time.
6
FB
Feedback Input. Connect FB to the center node of an external resistor-divider from the output to
SGND to set the output voltage. See the Adjusting Output Voltage section for more details.
7
RT
Programmable Switching Frequency Input. Connect a resistor from RT to SGND to set the
regulator’s switching frequency between 400kHz and 2.2MHz. Leave RT pin open for the default
500kHz frequency. See the Setting the Switching Frequency (RT) section for more details.
8
RESET
Open-Drain RESET Output. The RESET output is driven low if FB drops below VFB_OKF. RESET
goes high 1024 cycles after FB rises above VFB_OKR.
9
EXTVCC
External Power Supply Input. Applying a voltage between 2.448V and 12V at EXTVCC will bypass
the internal LDO and improve overall converter efficiency. Connect a buck regulator output to
EXTVCC through an RC filter (4.7Ω, 0.1μF) to protect the EXTVCC pin from reaching its absolute
maximum rating (-0.3V) during an output short-circuit condition. When EXTVCC is not used,
connect it to SGND.
10
BST
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1.8V LDO Output. Bypass VCC with a 2.2μF ceramic capacitance to SGND. LDO does not support
the external loading on VCC
Boost Flying Capacitor. Connect a 0.1μF ceramic capacitor between BST and LX.
Maxim Integrated | 10
MAX17662
3.5V to 36V, 2A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
Pin Description (continued)
PIN
NAME
11, 12
LX
13, 14
PGND
15, 16
VIN
Power-Supply Input Pins. 3.5V to 36V input-supply range. Decouple to PGND with a minimum
2.2µF capacitor; place the capacitor close to the VIN and PGND pins. See Input Capacitor
Selection for more details.
—
EP
Exposed Pad. Always connect EP to the SGND pin of the IC. Also, connect EP to a large plane
with several thermal vias for best thermal performance. Refer to the MAX17662 Evaluation Kit data
sheet for an example of the correct method for EP connection and thermal vias.
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FUNCTION
Switching Node Pins. Connect LX pins to the switching side of the inductor.
Power Ground Pins of the Converter. Connect externally to the power ground plane. Refer to the
MAX17662 Evaluation Kit data sheet for a layout example.
Maxim Integrated | 11
MAX17662
3.5V to 36V, 2A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
Block Diagram
MAX17662
EXTVCC
EXT LDO
INTERNAL LDO
SGND
VCC
BIAS SELECT
BST
1.8V
VCC
VIN
VIN
POK
HICCUP
VCC_UVR
VIN
EN/UVLO
VIN_UVLO_R
VCCOK
INOK
ENOK
PWM/DCM/
HICCUP
LOGIC
CHIPEN
VENR
LX
THERMAL SHUTDOWN
RT
OSCILLATOR
PGND
CURRENT- SENSE
LOGIC
FB
MODE
SELECTION
LOGIC
ERROR AMPLIFIER/
LOOP COMPENSATION
MODE
SWITCHOVER LOGIC
VCC
SS
SLOPE
COMPENSATION
RESET
5μA
HICCUP
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CHIPEN
FB
RESET
LOGIC
Maxim Integrated | 12
MAX17662
3.5V to 36V, 2A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
Detailed Description
The MAX17662 is a high-efficiency, synchronous step-down DC-DC converter with integrated MOSFETs. It can deliver
up to 2A over an input voltage range of 3.5V to 36V. Built-in compensation across the output-voltage range eliminates
the need for external compensation components. The feedback-voltage regulation accuracy over -40°C to +125°C is
±1.33%.
The device features a peak-current-mode control architecture. An internal transconductance error amplifier produces an
integrated error voltage at an internal node, which sets the duty cycle using a PWM comparator, a high-side currentsense amplifier, and a slope-compensation generator. At each rising edge of the clock, the high-side MOSFET turns
on and remains on until either the appropriate or maximum duty cycle is reached, or the peak current limit is detected.
During the high-side MOSFET’s on-time, the inductor current ramps up. During the second half of the switching cycle, the
high-side MOSFET turns off and the low-side MOSFET turns on. The inductor releases the stored energy as its current
ramps down and provides current to the output.
The device features a MODE pin that can be used to operate the device in PWM or DCM mode. The device also features
adjustable-input undervoltage lockout, adjustable soft-start, and output voltage monitoring with open-drain RESET. The
MAX17662 offers a low minimum on time that allows high switching frequencies and a smaller solution size.
Mode Selection (MODE)
The MAX17662 supports forced PWM and DCM mode of operation. The device enters the required mode of operation
based on the setting of the MODE pin as detected during power-up after VIN, VCC, and EN/UVLO voltages exceed their
respective UVLO rising thresholds (VIN_UVLO_R, VCC_UVR, VENR). If the state of the MODE pin is high (> VM_DCM),
the device operates in DCM mode at light loads. If the state of the MODE pin is low (< VM_PWM), the device operates in
constant-frequency PWM mode at all loads. See the MODE section in the Electrical Characteristics table for details.
PWM Mode Operation
In PWM mode, the inductor current is allowed to go negative. PWM operation provides constant frequency operation at
all loads and is useful in applications sensitive to switching frequency. However, the PWM mode of operation gives lower
efficiency at light loads compared to the DCM mode of operation.
DCM Mode Operation
In DCM mode of operation, the inductor current can be discontinuous at light loads. The inductor current is not allowed
to go negative. Switching pulses are skipped when the buck converter is operated close to no-load condition. DCM
operation offers better efficiency performance compared to PWM at light loads. The steady-state output voltage ripple in
DCM mode is comparable to PWM mode.
Linear Regulator (VCC and EXTVCC)
The MAX17662 has two built-in low dropout (LDO) linear regulators that power VCC. One LDO is powered from VIN
(internal LDO), while the other LDO is powered from EXTVCC (EXT LDO). The internal LDO is enabled either during
power-up or when voltage on EN/UVLO pin is recycled. Only one of the two LDOs is in operation at a time, depending on
the voltage present at EXTVCC. If EXTVCC is greater than 2.4V (typ), VCC is powered by EXT LDO. Powering VCC from
EXTVCC increases efficiency at higher input voltages. The typical VCC output voltage is 1.8V. Bypass VCC to SGND
with a 2.2μF low-ESR ceramic capacitor. VCC powers the internal blocks and the low-side MOSFET driver. VCC also
recharges the external bootstrap capacitor.
The MAX17662 employs an undervoltage-lockout circuit that forces the buck converter off when VCC falls below the
falling threshold (VCC_UVR - VCC_HYS). The buck converter can be immediately enabled again when VCC > VCC_UVR.
The 65mV (typ) UVLO hysteresis prevents chattering on power-up/power-down.
If the buck converter output is shorted to ground in applications where the converter output is connected to the EXTVCC
pin, then the transfer from EXT LDO to the internal LDO happens seamlessly, without any impact to normal functionality.
Add a local bypass capacitor of 0.1μF on the EXTVCC pin to SGND, and a 4.7Ω resistor from the buck regulator output
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Maxim Integrated | 13
MAX17662
3.5V to 36V, 2A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
node to the EXTVCC pin, to protect the EXTVCC pin from reaching its absolute maximum rating (-0.3V) during output
short-circuit conditions. Connect EXTVCC pin to SGND when not in use.
Setting the Switching Frequency (RT)
The switching frequency of the device can be programmed between 400kHz and 2.2MHz by using a resistor connected
from the RT pin to SGND. The switching frequency (fSW) is related to the resistor connected at the RT pin (RRT) by the
following equation:
20625
RRT = f
−1
SW
where, RRT is in kΩ and fSW is in kHz. Leaving the RT pin open makes the device operate at the default switching
frequency of 500kHz. See Table 1 for RT resistor values for a few common switching frequencies.
Table 1. Switching Frequency vs. RT Resistor
SWITCHING FREQUENCY (kHz)
RT RESISTOR (kΩ)
400
51.1
500
Open
500
40.2
2200
8.25
Operating Input Voltage Range
The minimum and maximum operating input voltages for a given output voltage setting should be calculated as follows:
VIN(MIN) =
(
(
VOUT + IOUT MAX × RDCR(MAX) + RDS_ONL(MAX)
(
)
(
1 − fSW MAX × tOFF_MIN MAX
(
)
(
)
)
)) + (I
OUT(MAX) × (RDS_ONH(MAX)-RDS_ONL(MAX)))
VOUT
VIN(MAX) = f
SW(MAX) × tON_MIN(MAX)
where:
VOUT = Programmed steady-state output voltage
IOUT(MAX) = Maximum load current
RDCR(MAX) = Worst-case DC resistance of the inductor
fSW(MAX) = Maximum switching frequency
tOFF_MIN(MAX) = Worst-case minimum switch off-time (176ns)
tON_MIN(MAX) = Worst-case minimum switch on-time (90ns)
RDS_ONL(MAX) and RDS_ONH(MAX) = Worst-case on-state resistances of low-side and high-side internal MOSFETs,
respectively.
The minimum input voltage (VIN_SU) for startup/restart of the buck converter should be as follows:
VIN_SU≥ VOUT_BIAS+ 1.8
where:
VOUT_BIAS = Prebias voltage on output node.
The maximum slew rate that can be applied on input voltage is 30V/µsec.
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Maxim Integrated | 14
MAX17662
3.5V to 36V, 2A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
Overcurrent Protection (OCP)/Hiccup Mode
The device is provided with a robust overcurrent-protection (OCP) scheme that protects the device under overload and
output short-circuit conditions. A cycle-by-cycle peak current limit turns off the high-side MOSFET whenever the highside switch current exceeds an internal limit of IPEAK_LIMIT (3.4A (typ)). The short-circuit protection scheme protects the
device by using an hysteretic control of the current during the soft start and by using the feedback under voltage fault in
steady state. In hysteretic control, the positive current limit is triggered when the peak value of the inductor current hits a
fixed threshold (IPEAK_LIMIT - 3.4A, typ). At this point, the high-side switch is turned off and the low-side switch is turned
on. The low-side switch is kept on until the inductor current reduces below 0.7 x IPEAK_LIMIT. If the feedback voltage
drops below VFB_HICF due to a fault condition any time after soft-start is completed, then the hiccup mode is activated.
In hiccup mode, the converter is protected by suspending switching for a hiccup timeout period of 32,768 clock cycles of
the switching frequency. Once the hiccup timeout period expires, soft-start is attempted again. Note that when soft-start
is attempted under overload condition, if feedback voltage does not exceed VFB_HICF, the device continues to switch in
hysteretic control for the duration of the programmed soft-start time and 2048 clock cycles. Hiccup mode of operation
ensures low average power dissipation under output short-circuit conditions.
RESET Output
The device includes a RESET comparator to monitor the status of the output voltage. The open-drain RESET output
requires an external pullup resistor. RESET goes high (high impedance) 1024 switching cycles after the FB voltage
increases above VFB_OKR. RESET goes low when the FB voltage drops to below VFB_OKF. RESET also goes low during
thermal shutdown or when the EN/UVLO pin goes below EN/UVLO falling threshold (VENR - VEN_HYS).
Prebiased Output
When the device starts into a prebiased output, the minimum input voltage (VIN_SU) to enable buck converter startup
should be calculated as follows:
VIN_SU≥ VOUT_BIAS+ 1.8
where:
VOUT_BIAS = Prebias voltage on output node.
In a prebiased output condition, both the high-side and the low-side switches are turned off so that the converter does not
sink current from the output. High-side and low-side switches do not start switching until the PWM comparator commands
the first PWM pulse, at which point switching commences. The output voltage is then smoothly ramped up to the target
value in alignment with the internal reference.
Thermal Shutdown Protection
Thermal shutdown protection limits junction temperature of the device. When the junction temperature of the device
exceeds +155ºC, an on-chip thermal sensor shuts down the device, allowing the device to cool. The device turns on with
soft-start after the junction temperature reduces by 20ºC. Carefully evaluate the total power dissipation (see the Power
Dissipation section) to avoid unwanted triggering of thermal shutdown during normal operation.
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Maxim Integrated | 15
MAX17662
3.5V to 36V, 2A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
Applications Information
Input Capacitor Selection
The input filter capacitor reduces peak currents drawn from the power source and reduces noise and voltage ripple on the
input caused by the circuit’s switching. The input capacitor RMS current requirement (IRMS) is defined by the following
equation:
IRMS= IOUT(MAX)×
√VOUT × (VIN − VOUT)
VIN
where, IOUT(MAX) is the maximum load current. IRMS has a maximum value when the input voltage equals twice the
output voltage (VIN ≈ 2 x VOUT), so
IRMS(MAX) =
IOUT(MAX)
2
.
Choose an input capacitor that exhibits less than +10°C temperature rise at the RMS input current for optimal longterm reliability. Use low-ESR ceramic capacitors with high-ripple-current capability at the input. X7R capacitors are
recommended in industrial applications for their temperature stability. Calculate the input capacitance using the following
equation:
CIN =
(
IOUT MAX × D × 1 − D
(
)
η × fSW × ∆VIN
)
where:
D = VOUT/VIN is the duty ratio of the converter
fSW = switching frequency
ΔVIN = allowable input-voltage ripple
η = efficiency
In applications where the source is located distant from the device input, an appropriate electrolytic capacitor should
be added in parallel to the ceramic capacitor to provide necessary damping for potential oscillations caused by the
inductance of the longer input power path and input ceramic capacitor.
Inductor Selection
Three key inductor parameters must be specified for operation with the device: inductance value (L), inductor saturation
current (ISAT) and DC resistance (RDCR). The switching frequency and output voltage determine the inductor value as
follows:
VOUT
L = 1.25 × f
SW
where VOUT and fSW are nominal values and fSW is in Hz. Select an inductor whose value is nearest to the value
calculated by the previous formula. Select a low-loss inductor closest to the calculated value with acceptable dimensions
and having the lowest possible DC resistance. The saturation current rating (ISAT) of the inductor must be high enough
to ensure that saturation can occur only above the peak current-limit value of IPEAK_LIMIT.
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Maxim Integrated | 16
MAX17662
3.5V to 36V, 2A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
Output Capacitor Selection
X7R ceramic output capacitors are preferred due to their stability over temperature in industrial applications. The output
capacitors are usually sized to support a step load of 50% of the maximum output current in the application, so outputvoltage deviation is contained to 3% of the output-voltage change. The minimum required output capacitance can be
calculated as follows:
1
COUT = 2 ×
ISTEP × tRESPONSE
∆ VOUT
0.33
tRESPONSE ≅ f
C
where:
ISTEP = Load current step
tRESPONSE = Response time of the controller
ΔVOUT = Allowable output-voltage deviation
fC = Target closed-loop crossover frequency
fSW = Switching frequency.
Select fC to be 1/9th of fSW if the switching frequency is less than or equal to 900kHz. If the switching frequency is more
than 900kHz, select fC to be 100kHz. Actual derating of ceramic capacitors with DC-bias voltage must be considered
while selecting the output capacitor. Derating curves are available from all major ceramic capacitor manufacturers.
Soft-Start Capacitor Selection
The device implements adjustable soft-start operation to reduce inrush current. A capacitor connected from the SS pin
to SGND programs the soft-start time. The selected output capacitance (CSEL) and the output voltage (VOUT) determine
the minimum required soft-start capacitor as follows:
CSS ≥ 28 × 10 − 6 × CSEL × VOUT
The soft-start time (tSS) is related to the capacitor connected at SS (CSS) by the following equation:
tSS =
CSS
8.325 × 10 − 6
For example, to program a 0.82ms soft-start time, a 6.8nF capacitor should be connected from the SS pin to SGND. Note
that, during startup, the device operates at half the programmed switching frequency until the output voltage reaches
65% of set output nominal voltage.
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Maxim Integrated | 17
MAX17662
3.5V to 36V, 2A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
Setting the Input Undervoltage-Lockout Level
The device offers an adjustable input undervoltage-lockout level. Set the voltage at which the device turns on with a
resistive voltage-divider connected from VIN to SGND (See Figure 1). Connect the center node of the divider to EN/
UVLO. Choose R1 to be 3.3MΩ and then calculate R2 as follows:
R2 =
R1 × 1.25
(
VINU − 1.25
)
where VINU is the input-voltage level at which the device is required to turn on. Ensure that VINU is higher than 0.8 x
VOUT to avoid hiccup during slow power-up (slower than soft-start)/power-down. If the EN/UVLO pin is driven from an
external signal source, a series resistance of minimum 1kΩ is recommended to be placed between the output pin of
signal source and the EN/UVLO pin, to reduce voltage ringing on the line.
VIN
R1
EN/UVLO
R2
SGND
Figure 1. Setting the Input Undervoltage Lockout
Adjusting Output Voltage
The output voltage of the buck converter can be programmed between 0.6V to 90% of VIN. However, for the output
voltage setting range between 0.6V and 1.8V, the minimum load should be 100μA for output voltage regulation.
Set the output voltage with a resistive voltage-divider connected from the output-voltage node (VOUT) to SGND (see
Figure 2). Connect the center node of the divider to the FB pin. Use the following procedure to choose the resistive
voltage-divider values:
Calculate resistor RTOP from the output to the FB pin as follows:
RTOP =
203
(
fCx COUT_SEL
)
where:
RTOP is in kΩ
fC = Crossover frequency in Hz
COUT_SEL = Actual capacitance of selected output capacitor at DC-bias voltage in F.
Calculate resistor RBOT from the FB pin to SGND as follows:
RBOT =
RTOP × 0.6
(VOUT − 0.6)
RBOT is in kΩ.
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Maxim Integrated | 18
MAX17662
3.5V to 36V, 2A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
VOUT
RTOP
FB
RBOT
SGND
Figure 2. Setting the Output Voltage
Power Dissipation
At a particular operating condition, the power losses that lead to temperature rise of the part are estimated as follows:
(
( 1 )) (
PLOSS = POUT × η − 1 − IOUT2 × RDCR
POUT = VOUT × IOUT
)
where:
POUT = Output power
η = Efficiency of the converter
RDCR = DC resistance of the inductor (see the Typical Operating Characteristics for more information on efficiency at
typical operating conditions).
For a typical multilayer board, the thermal performance metrics for the package are given below:
θJA = 38°C/W
θJC = 4°C/W
The junction temperature of the device can be estimated at any given maximum ambient temperature (TA(MAX)) from the
following equation:
TJ(MAX) = TA(MAX) + (θJA × PLOSS)
If the application has a thermal-management system that ensures that the exposed pad of the device is maintained at a
given temperature (TEP(MAX)) by using proper heat sinks, then the junction temperature of the device can be estimated
at any given maximum ambient temperature as:
TJ(MAX) = TEP(MAX) + (θJC × PLOSS)
Note: Junction temperatures greater than +125°C degrade operating lifetimes.
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Maxim Integrated | 19
MAX17662
3.5V to 36V, 2A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
PCB Layout Guidelines
All connections carrying pulsed currents must be very short and as wide as possible. The inductance of these
connections must be kept to an absolute minimum due to the high di/dt of the currents. Since inductance of a currentcarrying loop is proportional to the area enclosed by the loop, if the loop area is made very small, inductance is reduced.
Additionally, small-current loop areas reduce radiated EMI.
A ceramic input filter capacitor should be placed close to the VIN pins of the IC. This eliminates as much trace inductance
effects as possible and gives the IC a cleaner voltage supply. A bypass capacitor for the VCC pin also should be placed
close to the pin to reduce effects of trace impedance.
When routing the circuitry around the IC, the signal ground and the power ground for switching currents must be kept
separate. They should be connected together at a point where switching activity is minimum. This helps to keep the
signal ground quiet. The power ground plane should be kept continuous (unbroken) as far as possible. No trace carrying
high switching current should be placed directly over any ground plane discontinuity.
PCB layout also affects the thermal performance of the design. A number of thermal throughputs or vias that connect to
a large plane should be provided under the exposed pad of the device for efficient heat dissipation.
For a sample layout that ensures first pass success, refer to the MAX17662 evaluation kit layout available at
www.maximintegrated.com.
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Maxim Integrated | 20
MAX17662
3.5V to 36V, 2A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
Typical Application Circuits
Typical Application Circuit—5V Output with 500kHz Switching Frequency
VIN
6.5V TO 36V
C1
4.7μF
VIN
EN/UVLO
VIN
RT
BST
C5
0.1μF
MODE
LX
VCC
C3
2.2μF
L1
8.2μH
C1: 4.7μF/50V/X7R/1206 (GRM31CR71H475KA12)
L1: 8.2μH (XAL5050-822ME)
C4: 22μF/25V/X7R/1210 (GRM32ER71E226ME15)
fSW: 500kHz
PWM MODE: CONNECT MODE WITH SGND
DCM MODE: CONNECT MODE WITH VCC
VOUT
5V, 2A
M A X 17662
SGND
LX
RESET
FB
PGND
SS
PGND
C2
6800pF
EXTVCC
C4
22μF
R1
232kΩ
R2
31.6kΩ
R3
4.7Ω
VOUT
EP
C6
0.1μF
Typical Application Circuit—3.3V Output with 500kHz Switching Frequency
VIN
4.5V TO 36V
C1
4.7μF
EN/UVLO
VIN
RT
VIN
BST
C5
0.1μF
MODE
LX
VCC
C3
2.2μF
C2
6800pF
www.maximintegrated.com
VOUT
3.3V, 2A
M A X 17662
SGND
LX
RESET
FB
SS
L1
5.6μH
C1: 4.7μF/50V/X7R/1206 (GRM31CR71H475KA12)
L1: 5.6μH (XAL5050-562ME)
C4: 47μF/10V/X7R/1210 (GRM32ER71A476KE15L)
fSW: 500kHz
PWM MODE: CONNECT MODE WITH SGND
DCM MODE: CONNECT MODE WITH VCC
PGND
PGND
EXTVCC
C4
47μF
R3
4.7Ω
R1
120kΩ
R2
26.7kΩ
VOUT
EP
C6
0.1μF
Maxim Integrated | 21
MAX17662
3.5V to 36V, 2A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
Typical Application Circuits (continued)
Typical Application Circuit—5V Output with 1MHz Switching Frequency
VIN
7V TO 36V
C1
2.2μF
VIN
EN/UVLO
RT
R4
19.6kΩ
VIN
BST
C5
0.1μF
MODE
LX
VCC
C3
2.2μF
VOUT
5V, 2A
M A X 17662
SGND
LX
RESET
FB
SS
L1
4.7μH
C1: 2.2μF/50V/X7R/1206 (C3216X7R1H225K160AE)
L1: 4.7μH (XAL4030-472ME; 4.3mm x 4.3mm)
C4: 10μF/16V/X7R/1206 (C3216X7R1C106K160AC)
fSW: 1MHz
PWM MODE: CONNECT MODE WITH SGND
DCM MODE: CONNECT MODE WITH VCC
PGND
PGND
C2
6800pF
EXTVCC
C4
10μF
R3
4.7Ω
R1
232kΩ
R2
31.6kΩ
VOUT
EP
C6
0.1μF
Ordering Information
PART NUMBER
MODE OF OPERATION
PIN-PACKAGE
MAX17662BATE+
PWM, DCM
16 TQFN
+ Denotes a lead(Pb)-free/RoHS-compliant package.
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Maxim Integrated | 22
MAX17662
3.5V to 36V, 2A, High-Efficiency, Synchronous
Step-Down DC-DC Converter
Revision History
REVISION
NUMBER
REVISION
DATE
0
7/19
DESCRIPTION
Initial release
PAGES
CHANGED
—
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Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent
licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max
limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
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