19-2862; Rev 2; 3/07
KIT
ATION
EVALU
E
L
B
A
IL
AVA
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
The MAX9765/MAX9766/MAX9767 family combines
speaker, headphone, and microphone amplifiers, all in
a small thin QFN package. The MAX9765 is targeted at
stereo speaker playback applications and includes a
stereo bridge-tied load (BTL) speaker amp, stereo
headphone amp, single-ended output mic amp, input
MUX, and I 2C control. The MAX9766 is targeted at
mono speaker playback applications and includes a
mono BTL speaker amp, stereo headphone amp, differential output mic amp, input MUX, and I2C control. The
MAX9767 is targeted at applications that do not require
a headphone amp and includes a stereo BTL speaker
amp, differential output mic amp, and parallel control.
These devices operate from a single 2.7V to 5.5V supply.
A high 95dB PSRR allows these devices to operate from
noisy supplies without additional power conditioning. An
ultra-low 0.003% THD+N ensures clean, low distortion
amplification of the audio signal. Click-and-pop suppression eliminates audible transients on power and shutdown cycles.
In speaker mode, the amplifiers can deliver up to
750mW of continuous average power into a 4Ω load. In
headphone mode, the amplifier can deliver up to 65mW
of continuous average power into a 16Ω load. The gain
of the amplifiers is externally set, allowing maximum
flexibility in optimizing output levels for a given load.
The MAX9765/MAX9766 also feature a 2:1 input multiplexer, allowing multiple audio sources to be selected.
The various functions are controlled by either an I2Ccompatible (MAX9765/MAX9766) or simple parallel
control interface (MAX9767).
All devices include two low-noise microphone preamps, a differential amp for internal microphones, and
a single-ended amplifier for additional external microphones. A microphone bias output is provided, reducing external component count.
The MAX9765/MAX9766/MAX9767 are available in a
thermally efficient 32-pin thin QFN package (5mm ✕
5mm ✕ 0.8mm). All devices have short-circuit and
thermal-overload protection (OVP) and are specified
over the extended -40°C to +85°C temperature range.
Applications
PDA Audio Systems
Notebooks
Tablet PCs
Digital Cameras
Cell Phones
Features
♦
♦
♦
♦
♦
♦
♦
♦
♦
♦
♦
750mW BTL Stereo Speaker Amplifier
65mW Stereo Headphone Amplifier
2.7V to 5.5V Single-Supply Operation
Click-and-Pop Suppression
Low 0.003% THD+N
Low Quiescent Current: 13mA
Low-Power Shutdown Mode: 5µA
MUTE Function
Headphone Sense Input
Stereo 2:1 Input Multiplexer
Optional 2-Wire, I2C-Compatible, or Parallel
Interface
♦ Small 32-Pin Thin QFN (5mm ✕ 5mm ✕ 0.8mm)
Package
Ordering Information
PART
TEMP RANGE
PINPACKAGE
MAX9765ETJ
-40oC to +85oC
32 TQFN-EP*
T3255-4
o
o
PKG
CODE
MAX9766ETJ
-40 C to +85 C
32 TQFN-EP*
T3255-4
MAX9767ETJ
-40oC to +85oC
32 TQFN-EP*
T3255-4
*EP = Exposed paddle.
Pin Configurations and Functional Diagrams appear at end of data
sheet.
Simplified Diagram
MUX
INL1
SPKR
LEFT
INL2
MUX
HEADPHONE
INR1
INR2
SPKR
RIGHT
DEVICE
CONTROL
CONTROL
MICINMUX
MICIN+
MICOUT
AUXIN
MICBIAS
BIAS
MAX9765
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX9765/MAX9766/MAX9767
General Description
MAX9765/MAX9766/MAX9767
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
ABSOLUTE MAXIMUM RATINGS
VDD to GND ...........................................................................+6V
SVDD to GND .........................................................................+6V
SVDD to VDD .........................................................................-0.3V
PVDD to VDD .......................................................................±0.3V
PGND to GND.....................................................................±0.3V
All Other Pins to GND.................................-0.3V to (VDD + 0.3V)
Output Short-Circuit Duration (to VDD or GND)..........Continuous
Continuous Input Current (into any pin except power-supply
and output pins) ...............................................................±20mA
Continuous Power Dissipation (TA = +70°C)
32-Pin Thin QFN (derate 26.3mW/°C above +70°C) ...2105.3mW
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Junction Temperature ......................................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = PVDD = 3.0V, GND = 0, HPS = MUTE = GND, SHDN = 3V, CBIAS = 1µF, RIN = RF = 15kΩ, RL = ∞. TA = TMIN to TMAX, unless
otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
Supply Voltage Range
Quiescent Supply Current
(IVDD + IPVDD)
Shutdown Current
Switching Time
Turn-On/Turn-Off Time
Input Bias Current
SYMBOL
VDD/PVDD
IDD
ISHDN
tSW
tON/OFF
CONDITIONS
Inferred from PSRR test
MIN
TYP
2.7
MAX
UNITS
5.5
V
MAX9765/MAX9767
12
28
MAX9766
7
17
Headphone mode, HPS = VDD
7
17
SHDN = GND
5
18
Gain or input switching
(MAX9765/MAX9766)
10
CBIAS = 1µF, settled to 90%
250
CBIAS = 0.1µF, settled to 90%
25
Speaker mode
IBIAS
mA
µA
µs
ms
50
nA
Thermal Shutdown Threshold
150
o
C
Thermal Shutdown Hysteresis
8
o
C
Output Short-Circuit Current
To VDD or GND
1.2
VBIAS = 1.25V, VDD = 0V
230
A
STANDBY SUPPLY (SVDD)
Standby Current
ISVDD
VBIAS = 1.5V, VDD = 3V
400
5
µA
OUTPUT AMPLIFIERS (SPEAKER MODE)
Output Offset Voltage
VOS
VOUT_+ - VOUT_-, AV = 1V/V
Power-Supply Rejection Ratio
PSRR
Output Power
POUT
fIN = 1kHz, THD+N = 1%,
TA = +25oC (Note 2)
THD+N
fIN = 1kHz, BW = 22Hz to
22kHz
Total Harmonic Distortion Plus
Noise
Signal-to-Noise Ratio
2
SNR
10
VDD = 2.7V to 5.5V
72
f = 1kHz, VRIPPLE = 200mVP-P
72
RL = 8Ω
RL = 4Ω
85
450
400
750
POUT = 200mW,
RL = 8Ω
0.033
POUT = 400mW,
RL = 4Ω
0.065
RL = 8Ω, VOUT_ = 1.4VRMS, BW = 22Hz to
22kHz
45
mV
dB
mW
%
89
_______________________________________________________________________________________
dB
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
(VDD = PVDD = 3.0V, GND = 0, HPS = MUTE = GND, SHDN = 3V, CBIAS = 1µF, RIN = RF = 15kΩ, RL = ∞. TA = TMIN to TMAX, unless
otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
Maximum Capacitive Load Drive
CL
Slew Rate
SR
Crosstalk
CONDITIONS
MIN
No sustained oscillations
fIN = 10kHz
TYP
MAX
UNITS
400
pF
1.4
V/µs
73
dB
OUTPUT AMPLIFIERS (HEADPHONE MODE)
Power-Supply Rejection Ratio
Output Power
PSRR
POUT
Total Harmonic Distortion Plus
Noise
Signal-to-Noise Ratio
THD+N
SNR
Slew Rate
SR
Maximum Capacitive Load Drive
CL
Crosstalk
VDD = 2.7V to 5.5V
95
f = 1kHz, VRIPPLE = 200mVP-P
75
f = 20kHz, VRIPPLE = 200mVP-P
50
RL = 32Ω
fIN = 1kHz, THD+N = 1%,
TA = +25oC (Note 2)
RL = 16Ω
fIN = 1kHz, BW = 22Hz to
22kHz
dB
40
35
VOUT = 0.7RMS,
RL = 10kΩ
0.002
POUT = 15mW,
RL = 32Ω
0.005
POUT = 30mW,
RL = 16Ω
0.004
RL = 8Ω, VOUT_ = 1.4VRMS,
BW = 20Hz to 22kHz
mW
65
%
89
dB
0.7
V/µs
No sustained oscillations
200
pF
fIN = 10kHz
79
dB
BIAS VOLTAGE (BIAS)
BIAS Voltage
VBIAS
Output Resistance
RBIAS
1.4
1.5
1.6
50
V
kΩ
MICROPHONE AMPLIFIER GENERAL
RL = 100kΩ
Output Voltage Swing
VOUT
RL = 2kΩ
Slew Rate
SR
Output Short-Circuit Current
Maximum Capacitive Load Drive
CL
VDD - VOH
35
70
VOL - GND
50
400
VDD - VOH
80
150
70
400
VOL - GND
AV = 10dB
mV
0.6
V/µs
To VDD or GND
10
mA
No sustained oscillations
50
pF
DIFFERENTIAL INPUT AMPLIFIER (MICIN+, MICIN-)
Input Offset Voltage
VOS
Input Noise-Voltage Density
eN
fIN = 1kHz
AV = 20dB
AV = 40dB
2
31
11.6
5
mV
nV/√Hz
Total Harmonic Distortion Plus
Noise
THD+N
VDD = 3V, VOUT = 0.35VRMS, AV = 10dB,
fIN = 1kHz, BW = 22Hz to 22kHz
0.01
%
Small-Signal Bandwidth
BW-3dB
AV = 40dB, VOUT = 100mVP-P
300
kHz
MICIN_ to GND
100
kΩ
Input Resistance
RIN
_______________________________________________________________________________________
3
MAX9765/MAX9766/MAX9767
ELECTRICAL CHARACTERISTICS (continued)
MAX9765/MAX9766/MAX9767
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
ELECTRICAL CHARACTERISTICS (continued)
(VDD = PVDD = 3.0V, GND = 0, HPS = MUTE = GND, SHDN = 3V, CBIAS = 1µF, RIN = RF = 15kΩ, RL = ∞. TA = TMIN to TMAX, unless
otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
Input Resistance Matching
RMATCH
Differential Gain Accuracy
AVDIFF
Common-Mode Rejection Ratio
CMRR
CONDITIONS
Common-Mode Input Voltage
Range
PSRR
TYP
MAX
1
2
4
MAX9766, AV = 10dB to 45dB
2
4
MAX9767, AV = 10dB, 20dB, 30dB
2
4
AV = 10dB, fIN = 1kHz, VCM = 200mVP-P,
RS = 2kΩ
60
AV = 10dB, output
referred
62
%
dB
80
f = 1kHz, VRIPPLE =
200mVP-P
80
f = 20kHz, VRIPPLE =
200mVP-P
68
dB
1
VCM
UNITS
%
MAX9765, AV = 4dB to 39dB
VDD = 2.7V to 5.5V
Power-Supply Rejection Ratio
MIN
V
SINGLE-ENDED INPUT AMPLIFIER (AUXIN)
Input Offset Voltage
Input Noise-Voltage Density
Total Harmonic Distortion Plus
Noise
Small-Signal Bandwidth
VOS
eN
4
AV = 20dB, fIN = 1kHz
10
mV
73
nV/√Hz
THD+N
AV = 10dB, fIN = 1kHz, BW = 22Hz to
22kHz, VOUT = 0.7VRMS
0.01
%
BW-3dB
AV = 20dB, VOUT = 100mVP-P
200
kHz
Input Resistance
RIN
100
kΩ
Voltage Gain Accuracy
AV
4
%
VDD = 2.7V to 5.5V
Power-Supply Rejection Ratio
PSRR
AV = 10dB, output
referred
65
80
f = 1kHz, VRIPPLE =
200mVP-P
76
f = 20kHz, VRIPPLE =
200mVP-P
58
dB
MICROPHONE BIAS OUTPUT (MICBIAS)
Microphone Bias Output Voltage
VMICBIAS
Output Noise-Voltage Density
eN
Power-Supply Rejection Ratio
PSRR
VDD = 2.7V to 5.5V, ILOAD = 500µA
2.4
f = 1kHz
VDD = 2.7V to 5.5V
2.5
2.6
52
63
fIN = 1kHz, VRIPPLE = 200mVP-P
V
nV/√Hz
72
dB
70
DIGITAL INPUTS (MUTE, SHDN, INT/EXT)
Input Voltage High
VIH
2
V
Input Voltage Low
VIL
0.8
V
Input Leakage Current
IIN
±1
µA
MAX9767 MICGAIN INPUT (TRI-STATE PIN))
Input Voltage High
VIH
VDD
V
Input Voltage Low
VIL
GND
V
Input Voltage Mid
VIZ
FLOAT
V
4
_______________________________________________________________________________________
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
(VDD = PVDD = 3.0V, GND = 0, HPS = MUTE = GND, SHDN = 3V, CBIAS = 1µF, RIN = RF = 15kΩ, RL = ∞. TA = TMIN to TMAX, unless
otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
HEADPHONE SENSE INPUT (HPS)
0.9 x
VDD
Input Voltage High
VIH
V
Input Voltage Low
VIL
0.7 x
VDD
V
Input Leakage Current
IIN
±1
µA
2-WIRE SERIAL INTERFACE (SCL, SDA, ADD) (MAX9765/MAX9766)
Input Voltage High
VIH
Input Voltage Low
VIL
VDD > 3.6V
3
VDD ≤ 3.6V
2
Input Hysteresis
V
0.8
V
±1
µA
±1
µA
0.2
Input High Leakage Current
Input Low Leakage Current
IIH
VIN = 3V
IIL
VIN = 0V
V
Input Capacitance
CIN
10
Output Voltage Low
VOL
IOL = 3mA
0.4
pF
V
Output Current High
IOH
VOH = 3V
1
µA
400
kHz
TIMING CHARACTERISTICS (MAX9765/MAX9766)
Serial Clock Frequency
fSCL
Bus Free Time Between STOP
and START Conditions
tBUF
1.3
µs
START Condition Hold Time
tHD:STA
0.6
µs
START Condition Setup Time
tSU:STA
0.6
µs
Clock Period Low
tLOW
1.3
µs
Clock Period High
tHIGH
0.6
µs
Data Setup Time
tSU:DAT
Data Hold Time
tHD:DAT
(Note 3)
100
0
0.9
ns
µs
Receive SCL/SDA Rise Time
tR
(Note 4)
20 +
0.1CB
300
ns
Receive SCL/SDA Fall Time
tF
(Note 4)
20 +
0.1CB
300
ns
Transmit SDA Fall Time
tF
(Note 4)
20 +
0.1CB
250
ns
Pulse Width of Suppressed Spike
tSP
(Note 5)
50
ns
Note 1:
Note 2:
Note 3:
Note 4:
All devices are 100% production tested at +25°C. All temperature limits are guaranteed by design.
POUT limits are tested by a combination of electrical and guaranteed by design.
A device must provide a hold time of at least 300ns for the SDA signal to bridge the undefined region of SCL’s falling edge.
CB = total capacitance of one of the bus lines in picofarads. Device tested with CB = 400pF. 1kΩ pullup resistors connected
from SDA/SCL to VDD.
Note 5: Input filters on SDA, SCL, and ADD suppress noise spikes less than 50ns.
_______________________________________________________________________________________
5
MAX9765/MAX9766/MAX9767
ELECTRICAL CHARACTERISTICS (continued)
Typical Operating Characteristics
(VDD = PVDD = 5V, BW = 22Hz to 22kHz, TA = +25°C, unless otherwise noted.)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (SPEAKER MODE)
POUT = 100mW
POUT = 100mW
POUT = 250mW
POUT = 100mW
0.1
THD+N (%)
POUT = 500mW
POUT = 500mW
0.01
0.01
VDD = 5V
RL = 4Ω
AV = 4V/V
0.001
10
POUT = 500mW
0.01
VDD = 5V
RL = 4Ω
AV = 2V/V
0.001
100
1k
10k
VDD = 3V
RL = 4Ω
AV = 2V/V
0.001
10
100k
POUT = 250mW
0.1
THD+N (%)
THD+N (%)
0.1
100
1k
10k
100k
10
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
FREQUENCY (Hz)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (SPEAKER MODE)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (SPEAKER MODE)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (SPEAKER MODE)
POUT = 100mW
POUT = 50mW
POUT = 300mW
0.01
THD+N (%)
POUT = 500mW
POUT = 150mW
0.01
VDD = 3V
RL = 4Ω
AV = 4V/V
POUT = 150mW
0.01
VDD = 5V
RL = 8Ω
AV = 4V/V
VDD = 5V
RL = 8Ω
AV = 2V/V
0.001
0.001
100
1k
10k
POUT = 50mW
POUT = 300mW
0.1
THD+N (%)
0.1
10
MAX9765 toc06
POUT = 250mW
0.1
THD+N (%)
1
MAX9765 toc05
1
MAX9765 toc04
1
100k
0.001
10
100
1k
10k
100k
10
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
FREQUENCY (Hz)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (SPEAKER MODE)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (SPEAKER MODE)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (SPEAKER MODE)
POUT = 50mW
POUT = 300mW
POUT = 150mW
POUT = 150mW
0.01
0.001
100
1k
FREQUENCY (Hz)
10k
100k
1
MAX9765 toc09
f = 10kHz
0.1
0.01
VDD = 3V
RL = 8Ω
AV = 4V/V
VDD = 3V
RL = 8Ω
AV = 4V/V
10
f = 1kHz
POUT = 300mW
0.01
0.001
10
THD+N (%)
0.1
VDD = 5V
RL = 4Ω
AV = 2V/V
POUT = 50mW
THD+N (%)
0.1
100
MAX9765 toc08
1
MAX9765 toc07
1
6
POUT = 250mW
1
MAX9765 toc03
1
MAX9765 toc01
1
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (SPEAKER MODE)
MAX9765 toc02
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (SPEAKER MODE)
THD+N (%)
MAX9765/MAX9766/MAX9767
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
f = 20Hz
0.001
10
100
1k
FREQUENCY (Hz)
10k
100k
0
0.25
0.50
0.75
OUTPUT POWER (W)
_______________________________________________________________________________________
1.00
1.25
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
1
f = 10kHz
0.1
VDD = 3V
RL = 4Ω
AV = 2V/V
10
f = 1kHz
1
f = 10kHz
0.1
0.01
0.01
100
VDD = 3V
RL = 4Ω
AV = 4V/V
10
THD+N (%)
f = 1kHz
THD+N (%)
THD+N (%)
10
100
MAX9765 toc11
VDD = 5V
RL =4Ω
AV = 4V/V
MAX9765 toc10
100
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (SPEAKER MODE)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (SPEAKER MODE)
f = 1kHz
1
f = 10kHz
0.1
f = 20Hz
0.01
f = 20Hz
MAX9765 toc12
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (SPEAKER MODE)
f = 20Hz
0.001
0.2
0.4
0.6
0.8
0
0.50
0.75
0
1.00
0.25
0.50
0.75
1.00
OUTPUT POWER (W)
OUTPUT POWER (W)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (SPEAKER MODE)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (SPEAKER MODE)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (SPEAKER MODE)
f = 10kHz
0.1
0.01
1
f = 10kHz
0.1
10
1
f = 10kHz
0.1
f = 20Hz
f = 20Hz
0.001
0.001
0.001
0.2
0.4
0.6
0.8
f = 1kHz
0.01
0.01
f = 20Hz
0
VDD = 3V
RL = 8Ω
AV = 2V/V
MAX9765 toc15
f = 1kHz
0
0.2
0.4
0.6
0
0.8
0.1
0.2
0.3
0.4
0.5
0.6
0.7
OUTPUT POWER (W)
OUTPUT POWER (W)
OUTPUT POWER (W)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (SPEAKER MODE)
OUTPUT POWER vs. LOAD RESISTANCE
(SPEAKER MODE)
OUTPUT POWER vs. LOAD RESISTANCE
(SPEAKER MODE)
1
f = 10kHz
0.1
0.01
1000
800
600
THD+N = 10%
400
THD+N = 1%
0.1
0.2
800
700
600
THD+N = 10%
500
400
THD+N = 1%
300
100
0
0.001
0
VCC = 3V
900
200
200
f = 20Hz
1000
OUTPUT POWER (mW)
f = 1kHz
VCC = 5V
MAX9765 toc17
10
1200
OUTPUT POWER (mW)
VDD = 3V
RL = 8Ω
AV = 4V/V
MAX9765 toc16
100
MAX9765 toc18
1
100
THD+N (%)
10
THD+N (%)
f = 1kHz
VDD = 5V
RL = 8Ω
AV = 4V/V
MAX9765 toc14
100
MAX9765 toc13
VDD = 5V
RL = 8Ω
AV = 2V/V
10
THD+N (%)
0.25
OUTPUT POWER (W)
100
THD+N (%)
0.001
0.001
0
0.3
0.4
0.5
OUTPUT POWER (W)
0.6
0.7
0
0
10
100
1k
LOAD RESISTANCE (Ω)
10k
0
10
100
1k
10k
LOAD RESISTANCE (Ω)
_______________________________________________________________________________________
7
MAX9765/MAX9766/MAX9767
Typical Operating Characteristics (continued)
(VDD = PVDD = 5V, BW = 22Hz to 22kHz, TA = +25°C, unless otherwise noted.)
Typical Operating Characteristics (continued)
(VDD = PVDD = 5V, BW = 22Hz to 22kHz, TA = +25°C, unless otherwise noted.)
1.0
0.8
0.6
0.4
0.5
0.5
0.4
0.3
VDD = 5V
RL = 8Ω
f = 1kHz
0.25
0.50
0.75
1.00
0.4
0.3
0.2
VDD = 3V
RL = 4Ω
f = 1kHz
0.1
0
0
0
0
0.15
0.30
0.45
0.60
0.75
0
0.25
0.50
0.75
1.00
OUTPUT POWER (W)
OUTPUT POWER (W)
OUTPUT POWER (W)
POWER DISSIPATION vs. OUTPUT POWER
(SPEAKER MODE)
OUTPUT POWER vs. TEMPERATURE
(SPEAKER MODE)
OUTPUT POWER vs. TEMPERATURE
(SPEAKER MODE)
1000
0.20
0.15
0.10
800
THD+N = 1%
600
700
OUTPUT POWER (mW)
OUTPUT POWER (mW)
THD+N = 10%
400
MAX9765 toc24
0.25
800
MAX9765 toc23
1200
MAX9765 toc22
0.30
THD+N = 10%
600
500
THD+N = 1%
400
300
200
VDD = 3V
RL = 8Ω
f = 1kHz
0.05
200
0
0
0
0.15
0.30
0.45
-40
0
10
35
60
-40
85
-15
10
35
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCY (SPEAKER MODE)
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCY (SPEAKER MODE)
ENTERING SHUTDOWN (SPEAKER MODE)
-20
-20
-40
PSRR (dB)
-30
-40
-60
-60
-70
-80
-80
-90
-90
-100
-100
1k
FREQUENCY (Hz)
10k
100k
SHDN
2V/div
OUT_+ AND
OUT_500mV/div
-50
-70
100
VDD = 3V
-10
-30
-50
MAX9765 toc27
0
MAX9765 toc25
VDD = 5V
10
-15
f = 1kHz
RL = 8Ω
OUTPUT POWER (W)
0
-10
0.60
100
f = 1kHz
RL = 4Ω
MAX9765 toc26
POWER DISSIPATION (W)
0.6
0.1
0
8
0.7
0.2
VDD = 5V
RL = 4Ω
f = 1kHz
0.2
0.6
POWER DISSIPATION (W)
1.2
POWER DISSIPATION vs. OUTPUT POWER
(SPEAKER MODE)
MAX9765 toc20
0.8
POWER DISSIPATION (W)
1.4
POWER DISSIPATION (W)
0.9
MAX9765 toc19
1.6
POWER DISSIPATION vs. OUTPUT POWER
(SPEAKER MODE)
MAX9765 toc21
POWER DISSIPATION vs. OUTPUT POWER
(SPEAKER MODE)
PSRR (dB)
MAX9765/MAX9766/MAX9767
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
OUT_+ OUT_100mV/div
10
100
1k
FREQUENCY (Hz)
10k
100k
200ms/div
RL = 8Ω
INPUT AC-COUPLED TO GND
_______________________________________________________________________________________
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
ENTERING POWER-DOWN
(SPEAKER MODE)
EXITING SHUTDOWN (SPEAKER MODE)
MAX9765 toc28
MAX9765 toc29
VCC
SHDN
2V/div
2V/div
OUT_+ AND
OUT_500mV/div
500mV/div
OUT_+ AND
OUT
100mV/div
OUT_+ - OUT
OUT_+ OUT_100mV/div
200ms/div
RL = 8Ω
INPUT AC-COUPLED TO GND
CBIAS = 1µF
200ms/div
RL = 8Ω
INPUT AC-COUPLED TO GND
POWER-UP
(SPEAKER MODE)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (HEADPHONE MODE)
MAX9765 toc30
MAX9765 toc31
1
VDD = 5V
RL = 16Ω
AV = 1V/V
2V/div
VCC
THD+N (%)
0.1
500mV/div
OUT_+ AND
OUT
POUT = 10mW
0.01
POUT = 25mW
100mV/div
OUT_+ - OUT
POUT = 50mW
0.001
200ms/div
10
100
RL = 8Ω
INPUT AC-COUPLED TO GND
CBIAS = 1µF
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (HEADPHONE MODE)
1
VDD = 3V
RL = 16Ω
AV = 2V/V
0.1
POUT = 25mW
THD+N (%)
0.1
THD+N (%)
THD+N (%)
POUT = 25mW
POUT = 50mW
0.01
0.01
100
1k
FREQUENCY (Hz)
10k
100k
POUT = 10mW
POUT = 50mW
POUT = 10mW
0.001
10
POUT = 25mW
0.01
POUT = 10mW
0.001
MAX9765 toc34
VDD = 3V
RL = 16Ω
AV = 1V/V
0.1
POUT = 50mW
100k
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (HEADPHONE MODE)
MAX9765 toc33
1
MAX9765 toc32
VDD = 5V
RL = 16Ω
AV = 2V/V
10k
FREQUENCY (Hz)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (HEADPHONE MODE)
1
1k
0.001
10
100
1k
FREQUENCY (Hz)
10k
100k
10
100
1k
10k
100k
FREQUENCY (Hz)
_______________________________________________________________________________________
9
MAX9765/MAX9766/MAX9767
Typical Operating Characteristics (continued)
(VDD = PVDD = 5V, BW = 22Hz to 22kHz, TA = +25°C, unless otherwise noted.)
Typical Operating Characteristics (continued)
(VDD = PVDD = 5V, BW = 22Hz to 22kHz, TA = +25°C, unless otherwise noted.)
1
VDD = 5V
RL = 32Ω
AV = 2V/V
VDD = 3V
RL = 32Ω
AV = 1V/V
0.1
POUT = 5mW
POUT = 10mW
0.01
THD+N (%)
POUT = 10mW
THD+N (%)
0.1
THD+N (%)
0.1
1
POUT = 5mW
POUT = 10mW
POUT = 20mW
POUT = 20mW
10
100
1k
10k
POUT = 5mW
0.01
0.01
0.001
POUT = 20mW
0.001
0.001
100k
MAX9765 toc37
VDD = 5V
RL = 32Ω
AV = 1V/V
MAX9765 toc35
1
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (HEADPHONE MODE)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (HEADPHONE MODE)
MAX9765 toc36
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (HEADPHONE MODE)
10
100
1k
10k
10
100k
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
FREQUENCY (Hz)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (HEADPHONE MODE)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (HEADPHONE MODE)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (HEADPHONE MODE)
f = 1kHz
1
f = 20Hz
0.1
VDD = 5V
RL = 16Ω
AV = 2V/V
10
MAX9765 toc40
100
THD+N (%)
POUT = 5mW
VDD = 5V
RL = 16Ω
AV = 1V/V
10
THD+N (%)
THD+N (%)
0.1
POUT = 10mW
100
MAX9765 toc39
VDD = 3V
RL = 32Ω
AV = 2V/V
MAX9765 toc38
1
f = 1kHz
1
f = 10kHz
f = 20Hz
0.1
0.01
f = 10kHz
0.01
0.01
POUT = 20mW
0.001
10
100
1k
10k
0.001
0
100k
20
40
60
80
100
120
0
20
40
60
80
100
120
FREQUENCY (Hz)
OUTPUT POWER (mW)
OUTPUT POWER (mW)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (HEADPHONE MODE)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (HEADPHONE MODE)
OUTPUT POWER vs. LOAD RESISTANCE
(HEADPHONE MODE)
1
f = 20Hz
0.1
10
f = 10kHz
f = 1kHz
160
1
f = 20Hz
f = 10kHz
0.1
VCC = 5V
140
OUTPUT POWER (mW)
f = 1kHz
VDD = 3V
RL = 16Ω
AV = 2V/V
MAX9765 toc42
10
100
THD+N (%)
VDD = 3V
RL = 16Ω
AV = 1V/V
MAX9765 toc41
100
MAX9765 toc43
0.001
THD+N (%)
MAX9765/MAX9766/MAX9767
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
120
100
THD+N = 10%
80
60
THD+N = 1%
40
0.01
0.01
20
0
20
40
60
80
OUTPUT POWER (mW)
10
0
0.001
0.001
100
120
0
20
40
60
80
OUTPUT POWER (mW)
100
120
1
10
100
1k
LOAD RESISTANCE (Ω)
______________________________________________________________________________________
10k
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
POWER DISSIPATION vs. OUTPUT POWER
(HEADPHONE MODE)
THD+ N = 10%
60
THD+N = 1%
40
80
RL = 32Ω
60
40
20
20
0
10
100
1k
10k
20
VDD = 3V
f = 1kHz
0
0
25
50
75
100
0
15
30
45
75
OUTPUT POWER (mW)
OUTPUT POWER vs. TEMPERATURE
(HEADPHONE MODE)
OUTPUT POWER vs. TEMPERATURE
(HEADPHONE MODE)
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCY (HEADPHONE MODE)
60
40
20
THD+N = 1%
30
20
-15
10
35
60
85
-50
-60
-80
f = 1kHz
RL = 32Ω
-90
-100
-40
-15
10
35
60
85
10
TEMPERATURE (°C)
TEMPERATURE (°C)
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCY (HEADPHONE MODE)
MAX9765 toc49
-40
-70
0
0
-20
-30
40
10
f = 1kHz
RL = 16Ω
VDD = 5V
-10
PSRR (dB)
OUTPUT POWER (mW)
THD+N = 1%
THD+N = 10%
50
0
MAX9765 toc48
60
MAX9765 toc47
80
100
1k
ENTERING SHUTDOWN (HEADPHONE MODE)
MAX9765 toc50
VDD = 3V
-20
10k
100k
FREQUENCY (Hz)
EXITING SHUTDOWN (HEADPHONE MODE)
MAX9765 toc51
0
-10
60
OUTPUT POWER (mW)
THD+N = 10%
MAX9765 toc52
SHDN
2V/div
SHDN
2V/div
-30
PSRR (dB)
RL = 32Ω
30
LOAD RESISTANCE (Ω)
100
-40
40
10
VDD = 5V
f = 1kHz
0
1
OUTPUT POWER (mW)
100
RL = 16Ω
50
POWER DISSIPATION (mW)
100
RL = 16Ω
120
POWER DISSIPATION (mW)
OUTPUT POWER (mW)
120
60
MAX9765 toc45
VCC = 3V
80
140
MAX9765 toc44
140
POWER DISSIPATION vs. OUTPUT POWER
(HEADPHONE MODE)
MAX9765 toc46
OUTPUT POWER vs. LOAD RESISTANCE
(HEADPHONE MODE)
-40
-50
-60
OUT_+
500mV/div
OUT_+
500mV/div
-70
-80
HP JACK
100mV/div
-90
HP JACK
100mV/div
-100
10
100
1k
FREQUENCY (Hz)
10k
100k
200ms/div
RL = 16Ω
INPUT AC-COUPLED TO GND
200ms/div
RL = 16Ω
INPUT AC-COUPLED TO GND
______________________________________________________________________________________
11
MAX9765/MAX9766/MAX9767
Typical Operating Characteristics (continued)
(VDD = PVDD = 5V, BW = 22Hz to 22kHz, TA = +25°C, unless otherwise noted.)
Typical Operating Characteristics (continued)
(VDD = PVDD = 5V, BW = 22Hz to 22kHz, TA = +25°C, unless otherwise noted.)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (DIFFERENTIAL INPUT)
EXITING POWER-DOWN (HEADPHONE MODE)
MAX9765 toc53
MAX9765 toc54
1
MAX9765 toc55
ENTERING POWER-DOWN (HEADPHONE MODE)
VDD = 5V
VCC
2V/div
VCC
2V/div
OUT_+
500mV/div
THD+N (%)
0.1
OUT_+
500mV/div
VOUT = 0.26VRMS
0.01
HP JACK
100mV/div
HP JACK
100mV/div
VOUT = 0.35VRMS
0.001
200ms/div
RL = 16Ω
INPUT AC-COUPLED TO GND
200ms/div
RL = 16Ω
INPUT AC-COUPLED TO GND
100
100
10
THD+N (%)
THD+N (%)
f = 1kHz
1
0.1
f = 10kHz
0.01
100
1k
10k
1
f = 10kHz
0.1
f = 100Hz
0.001
0
100k
1
2
0
3
1
2
3
FREQUENCY (Hz)
OUTPUT VOLTAGE (VRMS)
OUTPUT VOLTAGE (VRMS)
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCY (DIFFERENTIAL INPUT)
INPUT-REFERRED NOISE
(DIFFERENTIAL MICROPHONE AMPLIFIER)
DIFFERENTIAL MICROPHONE AMPLIFIER
SMALL-SIGNAL TRANSIENT RESPONSE
-40
VDD = 5V
-60
-80
-100
MAX9765 toc60
-20
MAX9765 toc61
1000
INPUT-REFERRED NOISE (nV/√Hz)
MAX9765 toc59
0
IN
50mV/div
AV = 20dB
100
OUT
50mV/div
AV = 40dB
VDD = 3V
10
-120
10
100
1k
FREQUENCY (Hz)
12
f = 1kHz
10
f = 100Hz
0.001
10
VDD = 3V
0.01
0.01
0.001
100k
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT AMPLITUDE (DIFFERENTIAL INPUT)
VDD = 5V
VOUT = 0.35VRMS
10k
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT AMPLITUDE (DIFFERENTIAL INPUT)
0.1
VOUT = 0.26VRMS
1k
FREQUENCY (Hz)
THD+N (%)
VDD = 3V
100
MAX9765 toc58
MAX9765 toc56
1
10
MAX9765 toc57
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (DIFFERENTIAL INPUT)
PSRR (dB)
MAX9765/MAX9766/MAX9767
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
10k
100k
10
100
1k
FREQUENCY (Hz)
10k
100k
200µs/div
AV = 4dB
fIN = 1kHz
______________________________________________________________________________________
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (SINGLE-ENDED INPUT)
DIFFERENTIAL MICROPHONE AMPLIFIER
OVERDRIVEN OUTPUT
MAX9765 toc63
MAX9765 toc62
1
MAX9765 toc64
DIFFERENTIAL MICROPHONE AMPLIFIER
LARGE-SIGNAL TRANSIENT RESPONSE
VDD = 5V
IN
1V/div
0.1
VOUT = 176mVRMS
THD+N (%)
IN
500mV/div
0.01
OUT
1V/div
OUT
1V/div
VOUT = 265mVRMS
0.001
100
AV = 4dB
fIN = 1kHz
AV = 4dB
fIN = 1kHz
VDD = 3V
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT AMPLITUDE (SINGLE-ENDED INPUT)
100
100
VDD = 5V
10
1
f = 10kHz
0.1
VDD = 3V
10
THD+N (%)
f = 1kHz
THD+N (%)
100k
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT AMPLITUDE (SINGLE-ENDED INPUT)
0.1
VOUT = 176mVRMS
10k
MAX9765 toc67
MAX9765 toc65
1
1k
FREQUENCY (Hz)
MAX9765 toc66
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (SINGLE-ENDED INPUT)
THD+N (%)
10
200µs/div
200µs/div
1
f = 10kHz
0.1
0.01
0.01
VOUT = 265mVRMS
0.01
f = 100Hz
f = 100Hz
f = 1kHz
0.001
0.001
0.001
1k
10k
0
100k
0.5
FREQUENCY (Hz)
1.0
0
2.0
1.5
0.5
-40
VDD = 5V
-60
-80
VDD = 3V
-100
-120
600
AV = 40dB
INPUT-REFERRED NOISE (nV/√Hz)
MAX9765 toc68
-20
1.5
2.0
INPUT-REFERRED NOISE
(SINGLE-ENDED INPUT
MICROPHONE AMPLIFIER)
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCY (SINGLE-ENDED INPUT)
0
1.0
OUTPUT VOLTAGE (VRMS)
OUTPUT VOLTAGE (VRMS)
MAX9765 toc69
100
PSRR (dB)
10
500
400
300
200
100
0
10
100
1k
FREQUENCY (Hz)
10k
100k
10
100
1k
10k
100k
FREQUENCY (Hz)
______________________________________________________________________________________
13
MAX9765/MAX9766/MAX9767
Typical Operating Characteristics (continued)
(VDD = PVDD = 5V, BW = 22Hz to 22kHz, TA = +25°C, unless otherwise noted.)
Typical Operating Characteristics (continued)
(VDD = PVDD = 5V, BW = 22Hz to 22kHz, TA = +25°C, unless otherwise noted.)
SINGLE-ENDED MICROPHONE AMPLIFIER
SMALL-SIGNAL TRANSIENT RESPONSE
SINGLE-ENDED MICROPHONE AMPLIFIER
LARGE-SIGNAL TRANSIENT RESPONSE
MAX9765 toc70
MAX9765 toc71
IN
50mV/div
IN
500mV/div
OUT
100mV/div
OUT
1V/div
200µs/div
200µs/div
AV = 10dB
fIN = 1kHz
AV = 10dB
fIN = 1kHz
SUPPLY CURRENT vs. SUPPLY VOLTAGE
(SPEAKER MODE)
SINGLE-ENDED MICROPHONE AMPLIFIER
OVERDRIVEN OUTPUT
MAX9765 toc72
MAX9765 toc73
20
TA = +85°C
16
SUPPLY CURRENT (mA)
IN
1V/div
TA = +25°C
12
8
TA = -40°C
4
OUT
1V/div
0
2.7
200µs/div
AV = 10dB
fIN = 1kHz
4.1
4.8
5.5
30
8
25
6
TA = -40°C
4
2
TA = +85°C
20
TA = +25°C
15
10
5
0
MAX9765 toc75
TA = +25°C
SUPPLY CURRENT (µA)
TA = +85°C
SHUTDOWN SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX9765 toc74
10
TA = -40°C
0
2.7
3.4
4.1
SUPPLY VOLTAGE (V)
14
3.4
SUPPLY VOLTAGE (V)
SUPPLY CURRENT vs. SUPPLY VOLTAGE
(HEADPHONE MODE)
SUPPLY CURRENT (mA)
MAX9765/MAX9766/MAX9767
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
4.8
5.5
2.7
3.4
4.1
4.8
5.5
SUPPLY VOLTAGE (V)
______________________________________________________________________________________
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
PIN
NAME
FUNCTION
MAX9765
MAX9766
MAX9767
1
1
1
SHDN
2, 7, 18
2, 7, 18
2, 7, 8,
18, 23,
24, 27, 32
N.C.
3
3
6
OUTL+
4, 21
4, 21
4, 21
PVDD
5, 20
5, 20
5, 20
PGND
Power Ground. Connect PGND to GND.
6
6
3
OUTL-
Left-Channel Bridged Amplifier Negative Output
8
8
—
INL2
Active-Low Shutdown. Connect SHDN to VDD for normal operation.
No Connection. Not internally connected.
Left-Channel Bridged Amplifier Positive Output. OUTL+ also serves as the
left-channel headphone amplifier output.
Output Amplifier Power Supply. Connect PVDD to VDD.
Left-Channel Input 2
9
9
—
INL1
10
10
10
MICIN+
Differential Microphone Amplifier Noninverting Input
Left-Channel Input 1
11
11
11
MICIN-
Differential Microphone Amplifier Inverting Input
12
12
12
AUXIN
13
13
13
VDD
14
14
14
SVDD
15
15
15
MICBIAS
Microphone Bias Output. Bypass MICBIAS with a 1µF capacitor to GND.
16
—
—
MICOUT
Microphone Amplifier Output
17
17
—
GAINR
19
—
22
OUTR-
Right-Channel Bridged Amplifier Negative Output
Single-Ended Microphone Amplifier Input
Power Supply
Standby Power Supply. Connect to a standby power supply that is always on,
or connect to VDD through a Schottky diode and bypass with a 220µF
capacitor to GND. Short to VDD if clickless operation is not essential.
Right-Channel Gain Set
22
22
19
OUTR+
Right-Channel Bridged Amplifier Positive Output. OUTR+ also serves as the
right-channel headphone amplifier output.
23
—
—
ADD
Address Select. A logic high sets the address LSB to 1, a logic low sets the
address LSB to 0.
24
24
—
SDA
Bidirectional Serial Data I/O
25
25
—
SCL
Serial Clock Line
26, 29
26, 29
29
GND
Ground
27
27
—
INR2
Right-Channel Input 2
28
28
—
INR1
Right-Channel Input 1
30
30
—
HPS
Headphone Sense Input
31
31
31
BIAS
DC Bias Bypass. See BIAS Capacitor section for capacitor selection.
Connect CBIAS capacitor from BIAS to GND.
32
32
—
—
16
16
GAINL
MICOUT+
Left-Channel Gain Set
Microphone Amplifier Positive Output
______________________________________________________________________________________
15
MAX9765/MAX9766/MAX9767
Pin Description
MAX9765/MAX9766/MAX9767
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
Pin Description (continued)
PIN
NAME
MAX9765
MAX9766
MAX9767
—
19
17
MICOUT-
—
23
—
GAINM
—
—
9
INL
—
—
25
INT/EXT
—
—
26
MICGAIN
—
—
28
INR
—
—
30
MUTE
—
—
—
EP
FUNCTION
Microphone Amplifier Negative Output
Mono Mode Gain Set
Left-Channel Input
Internal (Differential) or External (Single-Ended) Input Select. Drive INT/EXT
low to select internal or high to select external microphone amplifier.
Microphone Amplifier Gain Set. Tri-State Pin. Connect to VDD for gain = 10dB,
float for gain = 20dB, and to GND for gain = 30dB.
Right-Channel Input
Mute Input
Exposed Pad. Connect to ground plane of PC board to optimize heatsinking.
Detailed Description
The MAX9765/MAX9766/MAX9767 feature 750mW BTL
speaker amplifiers, 65mW headphone amplifiers, input
multiplexers, headphone sensing, differential and single-ended input microphone amplifiers, and comprehensive click-and-pop suppression. The MAX9765/
MAX9766 are controlled through an I2C-compatible, 2wire serial interface. The MAX9767 is controlled
through three logic inputs: MUTE, SHDN, INT (see the
Selector Guide). The MAX9765 family features exceptional PSRR (95dB at 1kHz), allowing these devices to
operate from noisy digital supplies without the need for
a linear regulator.
The speaker amplifiers use a BTL configuration. The
MAX9765/MAX9766 main amplifiers are composed of
an input amplifier and an output amplifier. Resistor RIN
sets the input amplifier’s gain, and resistor RF sets the
output amplifier’s gain. The output of these two amplifiers serves as the input to a slave amplifier configured
as an inverting unity-gain follower. This results in two
outputs, identical in magnitude, but 180° out of phase.
The overall gain of the speaker amplifiers is twice the
product of the two amplifier gains (see the Gain-Setting
Resistor section). A unique feature of this architecture
is that there is no phase inversion from input to output.
The MAX9767 does not use a two-stage input amplifier
and therefore has phase inversion from input to output.
When configured as a headphone (single-ended) amplifier, the slave amplifier is disabled, muting the speaker
and the main amplifier drives the headphone. The
MAX9765/MAX9766/MAX9767 can deliver 700mW of
16
continuous average power into a 4Ω load with less than
1% THD+N in speaker mode. The MAX9765/MAX9766
can deliver 70mW of continuous average power into a
16Ω load with less than 1% THD+N in headphone
mode. The speaker amplifiers also feature thermaloverload and short-circuit current protection.
All devices feature microphone amplifiers with both differential and single-ended inputs. Differential input is
intended for use with internal microphones. Singleended input is intended for use with external (auxiliary)
microphones. The differential input configuration is particularly effective when layout constraints force the
microphone amplifier to be physically remote from the
ECM microphone and/or the rest of the audio circuitry.
The MAX9766/MAX9767 feature a complementary output, creating an ideal interface with CODECs and other
devices with differential inputs. All devices also feature
an internal microphone bias generator.
Amplifier Common-Mode Bias
These devices feature an internally generated common-mode bias voltage of 1.5V referenced to GND.
BIAS provides both click-and-pop suppression and
sets the DC bias level for the audio signal. BIAS is internally connected to the noninverting input of each
speaker amplifier (see the Typical Application Circuit).
Choose the value of the bypass capacitor as described
in the BIAS Capacitor section.
Input Multiplexer
The MAX9765/MAX9766 feature a 2:1 input multiplexer
on the front end of each amplifier. The multiplexer is
controlled by bit 1 in the control register. A logic low
______________________________________________________________________________________
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
MAX9765
IN_1
AUDIO
INPUT
30kΩ
IN_2
Figure 1. Using the Input Multiplexer for Gain Setting
selects input IN_1 and a logic high selects input IN_2.
Both right- and left-channel multiplexers are controlled
by the same input.
The input multiplexer can also be used to further
expand the number of gain options available from the
MAX9765/MAX9766. Connect the audio source to the
device through two different input resistors for multiple
gain configurations (Figure 1). Additionally, the input
multiplexer allows a speaker equalization network to be
switched into the speaker signal path. This is typically
useful in optimizing acoustic response from speakers
with small physical dimensions.
Mono Mode
The mono MAX9766 incorporates a mixer/attenuator
(see the Functional Diagram). In speaker (mono) mode,
the mixer/attenuator combines the two stereo inputs
(INL_ and INR_) and attenuates the resultant signal by
a factor of 2. This allows for full reproduction of a stereo
signal through a single speaker while maintaining optimum headroom. The resistor connected between
GAINM and OUTL+ sets the device gain in speaker
mode. This allows the speaker amplifier to have a different gain and feedback network from the headphone
amplifier.
Headphone Sense Disable Input
The headphone sensing function can be disabled by
the HPS_D bit (MAX9765/MAX9766). HPS_D bit determines whether the device is in automatic-detection
mode, or fixed-mode operation.
Headphone Sense Input (HPS)
When the MAX9765/MAX9766 are in automatic headphone-detection mode, the state of the headphone
sense input (HPS) determines the operating mode of
the device. A voltage on HPS less than 0.7 ✕ VDD sets
the device to speaker mode. A voltage greater than 0.9
✕ VDD disables the inverting bridge amplifier (OUT_-),
Shutdown
The MAX9765/MAX9766/MAX9767 feature a 5µA, lowpower shutdown mode that reduces quiescent current
consumption and extends battery life. The drive and
microphone amplifiers and the bias circuitry are disabled, the amplifier outputs (OUT_/MIC_) go high
impedance, and BIAS and MICBIAS are driven to GND.
The digital section of the MAX9765/MAX9766 remains
active when the device is shut down through the interface. A logic high on bit 0 of the SHDN register places
the MAX9765/MAX9766 in shutdown. A logic low
enables the device. A logic low on the SHDN input
places the devices into shutdown mode, disables the
interface, and resets the I2C registers to a default state.
A logic high on SHDN enables the device. A logic high
on SHDN enables the devices.
MUTE
All devices feature a mute mode. When the device is
muted, the input is disconnected from the amplifiers.
MUTE only affects the power amplifiers, and does not
shut down the device. The MAX9765/MAX9766 MUTE
mode is selected by writing to the MUTE register (see
Command Byte Definitions). The left and right channels
can be independently muted. The MAX9767 features
an active-high MUTE input that mutes both channels.
INT/EXT
The MAX9767 microphone amplifier input configuration
is controlled by the INT/EXT input. A logic low In
INT/EXT selects internal (differential) microphone
mode. A logic high selects external (single-ended)
mode.
Click-and-Pop Suppression
The MAX9765/MAX9766/MAX9767 feature Maxim’s
comprehensive click-and-pop suppression. During
startup and shutdown, the common-mode bias voltage
of the amplifiers is slowly ramped to and from the DC
bias point using an S-shaped waveform. In headphone
______________________________________________________________________________________
17
MAX9765/MAX9766/MAX9767
15kΩ
which mutes the speaker amplifier and sets the device
into headphone mode.
Connect HPS to the control pin of a 3-wire headphone
jack as shown in Figure 2. With no headphone present,
the resistive voltage-divider created by R1 and R2 sets
the voltage on HPS to 44mV, setting the device to speaker mode. When a headphone plug is inserted into the
jack, the control pin is disconnected from the tip contact,
and HPS is pulled to VDD through R1, setting the device
into headphone mode. Place a resistor in series with the
control pin and HPS (R3) to prevent any audio signal
from coupling into HPS when the device is in speaker
mode.
MAX9765/MAX9766/MAX9767
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
mode, this waveform shapes the frequency spectrum,
minimizing the amount of audible components present
at the headphone. In speaker mode, the BTL amplifiers
start up in the same fashion as in headphone mode.
When entering shutdown, both amplifier outputs ramp
to GND quickly and simultaneously. The devices can
also be connected to a standby power source that
ensures that the device undergoes its full shutdown
cycle even after power has been removed. The value of
the capacitor on the BIAS pin affects the click-and-pop
energy. For optimum click/pop performance, use a 1µF
capacitor.
Standby Power Supply (SVDD)
The MAX9765/MAX9766/MAX9767 feature a system
that provides clickless power-down when power is
removed from the device. SVDD is an optional secondary supply that powers the device through its shutdown cycle when VDD is removed. During this cycle,
the amplifier output DC level slowly ramps to GND,
ensuring clickless power-down. If clickless power-down
is required, connect SVDD to either a secondary power
supply that is always on, or connect a reservoir capacitor from SVDD to GND. SVDD does not need to be connected to either a secondary power supply or reservoir
capacitor for normal device operation. If click-and-pop
suppression during power-down is not required, connect SVDD to VDD directly.
The clickless power-down cycle only occurs when the
device is in headphone mode. The speaker mode is
inherently clickless, the differential architecture cancels
the DC shift across the speaker. The MAX9765/
MAX9766/MAX9767 BTL outputs are pulled to GND
quickly and simultaneously, resulting in no audible
components. If the MAX9765/MAX9766/MAX9767 are
only used as speaker amplifiers, then reservoir capacitors or secondary supplies are not necessary.
When using a reservoir capacitor, a 220µF capacitor
provides optimum charge storage for the shutdown
cycle for all conditions. If a smaller reservoir capacitor
is desired, decrease the size of CBIAS. A smaller CBIAS
causes the output DC level to decay at a faster rate,
increasing the audible content at the speaker, but
reducing the duration of the shutdown cycle.
Digital Interface
The MAX9765/MAX9766 feature an I2C/SMBus-compatible 2-wire serial interface consisting of a serial data
line (SDA) and a serial clock line (SCL). SDA and SCL
facilitate bidirectional communication between the
MAX9765/MAX9766 and the master at clock rates up to
400kHz. Figure 3 shows the 2-wire interface timing diagram. The MAX9765/MAX9766 are transmit/receive
18
3V
R1
680kΩ
R3
47kΩ
MAX9765
MAX9766
HPS
OUTL+
OUTR+
R2
10kΩ
10kΩ
Figure 2. HPS Configuration Circuit
slave-only devices, relying upon a master to generate a
clock signal. The master (typically a microcontroller) initiates data transfer on the bus and generates SCL to
permit that transfer.
A master device communicates to the MAX9765/
MAX9766 by transmitting the proper address followed
by a command and/or data words. Each transmit
sequence is framed by a START (S) or REPEATED
START (Sr) condition and a STOP (P) condition. Each
word transmitted over the bus is 8 bits long and is
always followed by an acknowledge clock pulse.
The MAX9765/MAX9766 SDA and SCL amplifiers are
open-drain outputs requiring a pullup resistor to generate a logic-high voltage. Series resistors in line with
SDA and SCL are optional. These series resistors protect the input stages of the devices from high-voltage
spikes on the bus lines, and minimize crosstalk and
undershoot of the bus signals.
Bit Transfer
One data bit is transferred during each SCL clock
cycle. The data on SDA must remain stable during the
high period of the SCL clock pulse. Changes in SDA
while SCL is high are control signals (see the START
and STOP Conditions section). SDA and SCL idle high
when the I2C bus is not busy.
START and STOP Conditions
When the serial interface is inactive, SDA and SCL idle
high. A master device initiates communication by issuing a START condition. A START condition is a high-tolow transition on SDA with SCL high. A STOP condition
is a low-to-high transition on SDA while SCL is high
(Figure 4). A START condition from the master signals
the beginning of a transmission to the MAX9765/
MAX9766. The master terminates transmission by issuing the STOP condition; this frees the bus. If a REPEATED START condition is generated instead of a STOP
______________________________________________________________________________________
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
MAX9765/MAX9766/MAX9767
SDA
tBUF
tHD, STA
tSU, DAT
tHD, STA
tHD, DAT
tLOW
tSP
tSU, STO
SCL
tHIGH
tHD, STA
tR
tF
START
CONDITION
REPEATED
START
CONDITION
STOP
CONDITION
START
CONDITION
Figure 3. 2-Wire Serial Interface Timing Diagram
condition, the bus remains active. When a STOP condition or incorrect address is detected, the
MAX9765/MAX9766 internally disconnects SCL from
the serial interface until the next START condition, minimizing digital noise and feedthrough.
Early STOP Conditions
The MAX9765/MAX9766 recognize a STOP condition at
any point during the transmission except if a STOP condition occurs in the same high pulse as a START condition (Figure 5). This condition is not a legal I2C format;
at least one clock pulse must separate any START and
STOP conditions.
REPEATED START Conditions
A REPEATED START (S r ) condition may indicate a
change of data direction on the bus. Such a change
occurs when a command word is required to initiate a
read operation. Sr may also be used when the bus
master is writing to several I2C devices and does not
want to relinquish control of the bus. The MAX9765/
MAX9766 serial interface supports continuous write
operations with or without an Sr condition separating
them. Continuous read operations require Sr conditions
because of the change in direction of data flow.
Acknowledge Bit (ACK)
The acknowledge bit (ACK) is the ninth bit attached to
any 8-bit data word. The receiving device always generates ACK. The MAX9765/MAX9766 generate an ACK
when receiving an address or data by pulling SDA low
during the ninth clock period. When transmitting data,
the MAX9765/MAX9766 wait for the receiving device to
generate an ACK. Monitoring ACK allows for detection
of unsuccessful data transfers. An unsuccessful data
transfer occurs if a receiving device is busy or if a sys-
S
Sr
P
SCL
SDA
Figure 4. START/STOP Conditions
tem fault has occurred. In the event of an unsuccessful
data transfer, the bus master should reattempt communication at a later time.
Slave Address
The bus master initiates communication with a slave
device by issuing a START condition followed by a 7-bit
slave address (Figure 6). When idle, the MAX9765/
MAX9766 wait for a START condition followed by its
slave address. The serial interface compares each
address value bit-by-bit, allowing the interface to power
down immediately if an incorrect address is detected.
The LSB of the address word is the Read/Write (R/W)
bit. R/W indicates whether the master is writing to or
reading from the MAX9765/MAX9766 (R/W = 0 selects
the write condition, R/W = 1 selects the read condition).
After receiving the proper address, the MAX9765/
MAX9766 issue an ACK by pulling SDA low for one
clock cycle.
The MAX9765 has a factory/user-programmed address
(Table 2). The MAX9766 has a factory-programmed
address: 1001011.
______________________________________________________________________________________
19
MAX9765/MAX9766/MAX9767
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
Table 1. HPS Setting (MAX9765/MAX9766)
SCL
HPS_D BIT
HPS
SPKR/
HP BIT
MODE
0
0
X
BTL
0
1
X
SE
1
X
0
BTL
1
X
1
SE
SDA
STOP
START
LEGAL STOP CONDITION
Table 2. I2C Slave Addresses
SCL
ADD CONNECTION
I2C ADDRESS
GND
100 1000
VDD
100 1001
SDA
START
ILLEGAL
STOP
A5
A4
A3
100 1011
REGISTER
ADDRESS
Figure 5. Early STOP Condition
A6
100 1010
SCL
Table 3. MUTE Register Format
ILLEGAL EARLY STOP CONDITION
S
SDA
A2
A1
A0
R/W
BIT
NAME
VALUE
DESCRIPTION
7
X
Don’t Care
—
6
X
Don’t Care
—
5
X
Don’t Care
—
0*
Unmute right channel
1
Mute right channel
0*
Unmute left channel
1
Mute left channel
Figure 6. Slave Address Byte Definition
Write Data Format
There are three registers that configure the
MAX9765/MAX9766: the MUTE register, SHDN register,
and control register. In write data mode (R/W = 0), the
register address and data byte follow the device
address (Figure 7).
MUTE Register
The MUTE register (01hex) is a read/write register that
sets the MUTE status of the device. Bit 3 (MUTEL) of
the MUTE register controls the left channel, bit 4
(MUTER) controls the right channel. A logic high mutes
the respective channel, a logic low brings the channel
out of mute.
SHDN Register
The SHDN register (02hex) is a read/write register that
controls the power-up state of the device. A logic high
in bit 0 of the SHDN register shuts down the device; a
logic low turns on the device. A logic high is required in
bits 2 to 7 to reset all registers to their default register
settings.
20
0000 0001
4
MUTER
3
MUTEL
2
X
Don’t Care
—
1
X
Don’t Care
—
0
X
Don’t Care
—
*Default state.
Control Register
The control register (03hex) is a read/write register that
determines the device configuration. Bit 1 (IN1/IN2)
controls the input multiplexer, a logic high selects input
1, a logic low selects input 2. Bit 2 (HPS_EN) controls
the headphone sensing. A logic low configures the
device in automatic headphone detection mode. A
logic high disables the HPS input. Bit 3 (INT/EXT) controls the microphone amplifier inputs. A logic low
selects differential (internal) input mode. A logic high
selects single-ended (external) input mode. Bit 4
(SPKR/HP) selects the amplifier operating mode when
______________________________________________________________________________________
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
REGISTER
ADDRESS
BIT
RESET
6
RESET
5
RESET
4
RESET
3
RESET
2
RESET
1
X
0
REGISTER
ADDRESS
0000 0010
NAME
7
Table 5. Control Register Format
SHDN
VALUE
DESCRIPTION
BIT
NAME
0*
—
7
MG2
1
Reset device
6
MG1
5
MG0
0*
—
1
Reset device
0*
—
1
Reset device
0*
—
1
Reset device
0*
—
1
Reset device
0*
—
1
Reset device
Don’t Care
—
0*
Normal operation
1
Shutdown
4
0000 0011
VALUE
Microphone amplifier
gain set; 3-bit code sets
the gain of the
microphone amplifiers
(Table 6)
SPKR/HP
INT/EXT
3
2
*Default state.
S
ADDRESS
WR
ACK
7 BITS
WR
7 BITS
I2C SLAVE ADDRESS.
SELECTS DEVICE.
ACK
COMMAND
IN1/IN2
0
X
DATA
ACK
8 BITS
REGISTER ADDRESS.
SELECTS REGISTER TO BE
WRITTEN TO.
SELECTS DEVICE.
ADDRESS
ACK
8 BITS
I2C SLAVE ADDRESS.
S
COMMAND
ACK
8 BITS
REGISTER ADDRESS.
SELECTS REGISTER
TO BE READ.
0*
Speaker mode selected
1
Headphone mode
selected
0*
Differential input selected
1
Single-ended input
selected
0*
Automatic headphone
detection enabled
1
Automatic headphone
detection disabled
(HPS ignored)
0*
Input 1 selected
1
Input 2 selected
HPS_D
1
DESCRIPTION
Don’t Care
—
P
1
REGISTER DATA.
S
ADDRESS
WR
7 BITS
I2C SLAVE ADDRESS.
SELECTS DEVICE.
ACK
DATA
P
8 BITS
1
DATA FROM
SELECTED REGISTER.
Figure 7. Write/Read Data Format Example
HPS_EN = 1. A logic high selects speaker mode, a
logic low selects headphone mode. Bits 5 to 7 (MG0-2)
control the gain of the microphone amplifiers (Table 5).
Read Data Format
In read mode (R/W = 1), the MAX9765/MAX9766 write
the contents of the selected register to the bus. The
direction of the data flow reverses following the
address acknowledge by the MAX9765/MAX9766. The
master device reads the contents of all registers,
including the read-only status register. Table 7 shows
the status register format. Figure 7 shows an example
read data sequence.
______________________________________________________________________________________
21
MAX9765/MAX9766/MAX9767
Table 4. SHDN Register Format
MAX9765/MAX9766/MAX9767
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
Table 6. Microphone Gain Setting
MG2
MG1
MG0
MAX9765
DIFF GAIN (dB)
MAX9766
DIFF GAIN (dB)
SINGLE-ENDED GAIN
(dB)
0*
0*
0*
4
10
10
0
0
1
9
15
15
0
1
0
14
20
20
0
1
1
19
25
25
1
0
0
24
30
29
1
0
1
29
35
34
1
1
0
34
40
36
1
1
1
39
45
40
*Default state.
I2C Compatibility
The MAX9765/MAX9766 are compatible with existing I2C
systems. SCL and SDA are high-impedance inputs; SDA
has an open drain that pulls the data line low during the
ninth clock pulse. The communication protocol supports
the standard I2C 8-bit communications. The general call
address is ignored. The MAX9765/MAX9766 addresses
are compatible with the 7-bit I2C addressing protocol
only. No 10-bit formats are supported.
Applications Information
BTL Amplifiers
The MAX9765/MAX9766/MAX9767 feature speaker
amplifiers designed to drive a load differentially, a configuration referred to as bridge-tied load (BTL). The BTL
configuration (Figure 8) offers advantages over the single-ended configuration, where one side of the load is
connected to ground. Driving the load differentially
doubles the output voltage compared to a singleended amplifier under similar conditions. Thus, the
devices’ differential gain is twice the closed-loop gain
of the input amplifier. The effective gain is given by:
A VD = 2 ×
RF
RIN
Substituting 2 x VOUT(P-P) for VOUT(P-P) into the following equations yields four times the output power due to
doubling of the output voltage:
22
VRMS =
VOUT(P−P)
2 2
2
V
POUT = RMS
RL
Since the outputs are differential, there is no net DC
voltage across the load. This eliminates the need for
DC-blocking capacitors required for single-ended
amplifiers. These capacitors can be large, expensive,
consume board space, and degrade low-frequency
performance.
Single-Ended Headphone Amplifier
The MAX9765/MAX9766 can be configured as singleended headphone amplifiers through software or by
sensing the presence of a headphone plug (HPS). In
headphone mode, the inverting output of the BTL
amplifier is disabled, muting the speaker. The gain is
1/2 that of the device in speaker mode, and the output
power is reduced by a factor of 4.
In headphone mode, the load must be capacitively
coupled to the device, blocking the DC bias voltage
from the load (see the Typical Application Circuit and
the Output-Coupling Capacitor section).
Microphone Amplifiers
Differential Microphone Amplifier
The MAX9765/MAX9766/MAX9767 feature a low-noise,
high CMRR, differential input microphone amplifier. The
differential input structure is almost essential in noisy
digital systems where amplification of low-amplitude
analog signals is necessary such as notebooks and
PDAs. When properly employed, the differential input
architecture offers the following advantages:
______________________________________________________________________________________
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
REGISTER ADDRESS
BIT
NAME
7
THRM
6
AMPR-
5
AMPR+
4
AMPL-
MAX9765/MAX9766/MAX9767
Table 7. Status Register Format
0000 0000
VALUE
0
DESCRIPTION
Device temperature below thermal limit
1
Device temperature exceeding thermal limit
0
OUTR- current below current limit
1
OUTR- current exceeding current limit
0
OUTR+ current below current limit
1
OUTR+ current exceeding current limit
0
OUTL- current below current limit
1
OUTL- current exceeding current limit
0
OUTL+ current below current limit
1
OUTL+ current exceeding current limit
0
Device in speaker mode
1
Device in headphone mode
3
AMPL+
2
HPSTS
1
X
Don’t Care
—
0
X
Don’t Care
—
●
Improved PSRR.
●
Higher ground noise immunity.
●
Microphone and preamplifier can be placed physically farther apart, easing PC board layout requirements.
VOUT(P-P)
+1
2 x VOUT(P-P)
Common-Mode Rejection Ratio
Common-mode rejection ratio (CMRR) refers to an
amplifier’s ability to reject any signal applied equally to
both inputs. In the case of amplifying a low-level microphone signal in noisy digital environments, CMRR is a
key figure of merit. In audio circuits, CMRR is given by:
VOUT(P-P)
-1
Figure 8. Bridge-Tied Load Configuration
A
V
CMRR(dB) = DM = INDIFF
A CM ∆VINCM
where ADM is the differential gain, ACM is the commonmode gain, ∆VINCM is the change in input commonmode voltage (IN+ and IN- connected together), and
VINDIFF is the differential input voltage.
Typical input voltage magnitudes are small enough
such that the output is not clipped in either differential
or common-mode application. The MAX9765/MAX9766/
MAX9767 differential microphone amplifier architecture
CMRR actually improves as ADM increases—an additional advantage to the use of differential inputs.
Power Dissipation and Heat Sinking
Under normal operating conditions, the MAX9765/
MAX9766/MAX9767 can dissipate a significant amount
of power. The maximum power dissipation for each
package is given in the Absolute Maximum Ratings
section under Continuous Power Dissipation or can be
calculated by the following equation:
PDISSPKG(MAX) =
TJ(MAX) − TA
θJA
where TJ(MAX) is +150°C, TA is the ambient temperature, and θJA is the reciprocal of the derating factor in
°C/W as specified in the Absolute Maximum Ratings
______________________________________________________________________________________
23
MAX9765/MAX9766/MAX9767
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
section. For example, θ JA of the QFN package is
+42°C/W.
The increase in power delivered by the BTL configuration directly results in an increase in internal power dissipation over the single-ended configuration. The
maximum power dissipation for a given VDD and load is
given by the following equation:
PDISS(MAX) =
2VDD2
π 2RL
If the power dissipation for a given application exceeds
the maximum allowed for a given package, either reduce
VDD, increase load impedance, decrease the ambient
temperature, or add heatsinking to the device. Large
output, supply, and ground PC board traces improve the
maximum power dissipation in the package.
Thermal-overload protection limits total power dissipation in these devices. When the junction temperature
exceeds +150°C, the thermal-protection circuitry disables the amplifier output stage. The amplifiers are
enabled once the junction temperature cools by 8°C.
This results in a pulsing output under continuous thermal-overload conditions as the device heats and cools.
Component Selection
Gain-Setting Resistors
External feedback components set the gain of the
MAX9765/MAX9766/MAX9767. Resistor RIN sets the
gain of the input amplifier (AVIN) and resistor RF sets
the gain of the second-stage amplifier (AVOUT):
⎛ 15kΩ ⎞
⎛ RF ⎞
A VIN = − ⎜
⎟ , A VOUT = − ⎜⎝ 15kΩ ⎟⎠
⎝ RIN ⎠
Combining AVIN and AVOUT, RIN and RF set the singleended gain of the device as follows:
⎛ 15kΩ ⎞
⎛ RF ⎞
⎛ RF ⎞
A V = A VIN × A VOUT = − ⎜
⎟ × − ⎜⎝ 15kΩ ⎟⎠ = +⎜ R ⎟
⎝ RIN ⎠
⎝ IN ⎠
As shown, the two-stage amplifier architecture results
in a noninverting gain configuration, preserving relative
phase through the MAX9765/MAX9766. The gain of the
device in BTL mode is twice that of the single-ended
mode. Choose RIN between 10kΩ and 15kΩ and RF
between 15kΩ and 100kΩ.
Input Filter
The input capacitor (CIN), in conjunction with RIN, forms
a highpass filter that removes the DC bias from an
incoming signal. The AC-coupling capacitor allows the
amplifier to bias the signal to an optimum DC level.
Assuming zero-source impedance, the -3dB point of
the highpass filter is given by:
f−3dB =
1
2πRINCIN
Choose RIN according to the Gain-Setting Resistors
section. Choose the CIN such that f-3dB is well below
the lowest frequency of interest. Setting f-3dB too high
affects the amplifier’s low-frequency response. Use
capacitors whose dielectrics have low-voltage coefficients, such as tantalum or aluminum electrolytic.
Capacitors with high-voltage coefficients, such as
ceramics, may result in an increased distortion at low
frequencies.
Other considerations when designing the input filter
include the constraints of the overall system,
the actual frequency band of interest, and click-andpop suppression. Although high-fidelity audio calls for
a flat gain response between 20Hz and 20kHz,
portable voice-reproduction devices such as cellular
phones and two-way radios need only concentrate on
the frequency range of the spoken human voice (typically 300Hz to 3.5kHz). In addition, speakers used in
portable devices typically have a poor response below
150Hz. Taking these two factors into consideration, the
input filter may not need to be designed for a 20Hz to
20kHz response, saving both board space and cost
due to the use of smaller capacitors.
(MAX9765 / MAX9766)
R
A VIN = − F
RIN
24
(MAX9767)
______________________________________________________________________________________
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
f−3dB =
1
2πRLCOUT
As with the input capacitor, choose COUT such that
f-3dB is well below the lowest frequency of interest.
Setting f-3dB too high affects the amplifier‘s low-frequency response.
Load impedance is a concern when choosing COUT.
Load impedance can vary, changing the -3dB point of
the output filter. A lower impedance increases the corner frequency, degrading low-frequency response.
Select COUT such that the worst-case load/COUT combination yields an adequate response. Select capacitors with low ESR.
BIAS Capacitor
BIAS is the output of the internally generated 1.5VDC
bias voltage. The BIAS bypass capacitor, C BIAS ,
improves PSRR and THD+N by reducing power supply
and other noise sources at the common-mode bias
node, and also generates the clickless/popless, startup/shutdown DC bias waveforms for the speaker amplifiers. Bypass BIAS with a 1µF capacitor to GND.
Smaller capacitor values produce faster turn-on/off
times and may impact the click/pop levels.
Supply Bypassing
Proper power-supply bypassing ensures low-noise,
low-distortion performance. Place a 0.1µF ceramic
capacitor from V DD to GND. Add additional bulk
capacitance as required by the application. Bypass
PVDD with a 100µF capacitor to GND. Locate bypass
capacitors as close to the device as possible.
Layout and Grounding
Good PC board layout is essential for optimizing performance. Use large traces for the power-supply inputs
and amplifier outputs to minimize losses due to parasitic trace resistance, as well as route heat away from
the device. Good grounding improves audio performance, minimizes crosstalk between channels, and
prevents any digital switching noise from coupling into
the audio signal. If digital signal lines must cross over
or under audio signal lines, ensure that they cross perpendicular to each other.
The MAX9765/MAX9766/MAX9767 thin QFN packages
feature exposed thermal pads on their undersides. This
pad lowers the package’s thermal resistance by providing a direct heat conduction path from the die to the
printed circuit board. Connect the pad to signal ground
by using a large pad, or multiple vias to the ground
plane.
______________________________________________________________________________________
25
MAX9765/MAX9766/MAX9767
Output-Coupling Capacitor
The MAX9765/MAX9766/MAX9767 require output-coupling capacitors to operate in single-ended (headphone) mode. The output-coupling capacitor blocks the
DC component of the amplifier output, preventing DC
current from flowing to the load. The output capacitor
and the load impedance form a highpass filter with a
-3dB point determined by:
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
MAX9765/MAX9766/MAX9767
Typical Application Circuit
0.1µF
VDD
BIAS
PVDD
SVDD
1µF
*CSVDD
220µF
15kΩ
GAINL
OUTL+
0.47µF 15kΩ
INL1
OUTL0.47µF 15kΩ
HPF
INL2
CODEC
MAX9765
0.47µF 15kΩ
INR1
OUTR0.47µF 15kΩ
HPF
INR2
OUTR+
220µF
15kΩ
GAINR
SCL
MICROCONTROLLER
SDA
HPS
0.1µF
AUX_IN
ADD
SHDN
2.2kΩ
MICOUT
MICBIAS
2.2kΩ
0.1µF
IN+
IN0.1µF
*CSVDD IS ONLY REQUIRED IF LOW CLICK-AND-POP LEVELS ARE NECESSARY DURING POWER-DOWN.
26
______________________________________________________________________________________
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
VDD
*
0.1µF
CSVDD
PVDD
VDD
SVDD
15kΩ
GAINL
AUDIO
INPUT
0.47µF
15kΩ
INL1
2:1
INPUT
MUX
INL2
AUDIO
INPUT
0.47µF
15kΩ
VDD
15kΩ
680kΩ
OUTL+
15kΩ
220µF
15kΩ
BIAS
BIAS
15kΩ
1µF
OUTL-
15kΩ
0.47µF
AUDIO
INPUT
GAINR
15kΩ
INR1
2:1
INPUT
MUX
INR2
AUDIO
INPUT
0.47µF
15kΩ
15kΩ
OUTR+
15kΩ
220µF
15kΩ
SHDN
15kΩ
SCL
I2C
LOGIC
SDA
OUTR-
ADD
HPS
0.1µF
HPS
47kΩ
AUXIN
10kΩ
2.2kΩ
MICBIAS
2:1
OUTPUT
MUX
MIC
BIAS
0.1µF
MICOUT
2.2kΩ
0.1µF
MICIN+
MICIN0.1µF
MAX9765
GND
*CSVDD IS ONLY REQUIRED IF LOW CLICK-AND-POP LEVELS ARE NECESSARY DURING POWER-DOWN.
______________________________________________________________________________________
27
MAX9765/MAX9766/MAX9767
Functional Diagrams
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
MAX9765/MAX9766/MAX9767
Functional Diagrams (continued)
VDD
*
0.1µF
PVDD
CSVDD
VDD SVDD
15kΩ
0.47µF
AUDIO
INPUT
15kΩ
GAIN
MUX
INL1
INL2
AUDIO
INPUT
2:1
INPUT
MUX
GAINL
GAINM
VDD
15kΩ
15kΩ
15kΩ
OUTL+
680kΩ
15kΩ
0.47µF
220µF
BIAS
BIAS
15kΩ
1µF
15kΩ
OUTL-
15kΩ
AUDIO
INPUT
0.47µF
15kΩ
INR1
INR2
AUDIO
INPUT
0.47µF
2:1
INPUT
MUX
GAINR
15kΩ
15kΩ
OUTR
15kΩ
220µF
SHDN
SCL
0.1µF
SDA
I2C
LOGIC
AUXIN
MAX9766
HPS
47kΩ
HPS
10kΩ
2.2kΩ
MICBIAS
0.1µF
MIC
BIAS
2:1
OUTPUT
MUX
2.2kΩ
0.1µF
MICOUT+
MICOUT-
MICIN+
MICIN-
0.1µF
GND
*CSVDD IS ONLY REQUIRED IF LOW CLICK-AND-POP LEVELS ARE NECESSARY DURING POWER-DOWN.
28
______________________________________________________________________________________
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
15kΩ
15kΩ
0.1µF 15kΩ
AUDIO
INPUT
INL
OUTL15kΩ
15kΩ
VDD
VDD
0.1µF
PVDD
OUTL+
BIAS
0.1µF
OUTR+
SHDN
15kΩ
MUTE
INTEXT
AUDIO
INPUT
0.47µF
15kΩ
OUTR-
15kΩ
INR
0.1µF
MAX9767
AUXIN
MICOUT+
2.2kΩ
MICBIAS
1µF
MIC
BIAS
2.2kΩ
0.1µF
OUTPUT
MUX
MICOUT-
GND
MICIN+
MICIN-
PGND
0.1µF
GADJ
GAIN
CONTROL
______________________________________________________________________________________
29
MAX9765/MAX9766/MAX9767
Functional Diagrams (continued)
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
SCL
SCL
25
GND
GND
26
INR2
INR2
27
INR1
INR1
28
GND
GND
29
HPS
HPS
30
BIAS
BIAS
31
GAINL
GAINL
32
32
31
30
29
28
27
26
25
SHDN
1
24 SDA
SHDN
1
24 SDA
N.C.
2
23 ADD
N.C.
2
23 GAINM
OUTL+
3
22 OUTR+
OUTL+
3
22 OUTR+
PVDD
4
21 PVDD
PVDD
4
N.C.
7
18 N.C.
N.C.
7
18 N.C.
INL2
8
17 GAINR
INL2
8
17 GAINR
14
15
16
9
10
11
THIN QFN
12
13
14
15
16
MICOUT+
13
MICBIAS
12
SVDD
11
VDD
10
20 PGND
AUXIN
9
MICIN-
19 MICOUT-
MICIN+
6
INL1
OUTL-
MICOUT
19 OUTR-
MICBIAS
6
SVDD
5
VDD
PGND
AUXIN
OUTL-
21 PVDD
MAX9766
20 PGND
MICIN-
5
MICIN+
PGND
MAX9765
INL1
MAX9765/MAX9766/MAX9767
Pin Configurations
N.C.
BIAS
MUTE
GND
INR
N.C.
MICGAIN
INT/EXT
THIN QFN
32
31
30
29
28
27
26
25
SHDN
1
24 N.C.
N.C.
2
23 N.C.
OUTL-
3
22 OUTR-
PVDD
4
21 PVDD
MAX9767
20 PGND
PGND
5
OUTL+
6
19 OUTR+
N.C.
7
18 N.C.
N.C.
8
14
15
16
MICBIAS
MICOUT+
MICIN-
13
SVDD
MICIN+
12
VDD
11
AUXIN
10
INL
17 MICOUT9
THIN QFN
30
______________________________________________________________________________________
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
PART
CONTROL
INTERFACE
SPEAKER
AMPLIFIER
INPUT
MULTIPLEXER
HEADPHONE
AMPLIFIER
MICROPHONE
AMPLIFIER
OUTPUT
MAX9765
I2C compatible
Stereo
✓
Stereo
Single ended
MAX9766
I2C compatible
Mono
✓
Stereo
Differential
MAX9767
Parallel
Stereo
—
—
Differential
Chip Information
MAX9765 TRANSISTOR COUNT: 4829
MAX9766 TRANSISTOR COUNT: 4533
MAX9767 TRANSISTOR COUNT: 4731
PROCESS: BiCMOS
______________________________________________________________________________________
31
MAX9765/MAX9766/MAX9767
Selector Guide
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
QFN THIN.EPS
MAX9765/MAX9766/MAX9767
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
32
______________________________________________________________________________________
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
Revision History
Pages changed at Rev 2: 1, 15, 29, 30, 33
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 33
© 2007 Maxim Integrated Products
is a registered trademark of Maxim Integrated Products, Inc.
MAX9765/MAX9766/MAX9767
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
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