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M7610A

M7610A

  • 厂商:

    ETC1

  • 封装:

  • 描述:

    M7610A - CMOS LSI designed for automatic PIR lamp control. - List of Unclassifed Manufacturers

  • 数据手册
  • 价格&库存
M7610A 数据手册
㆒華半導體股份㈲限公司 MOSDESIGN SEMICONDUCTOR CORP. PIR CONTROLLER M7610A PIR CONTROLLER GENERAL DESCRIPTION 功能敘述 功能敘述 The M7610A is a CMOS LSI designed for automatic PIR lamp control. It can operating with 2 wire configurations for triac applications or with 3 wire configurations for relay applications. The chip contains operational amplifiers, comparator, timer, a zero crossing detector, a control circuit, a voltage regulator, a system oscillator and an output timing oscillator. FEATURES 產品特長 產品特長 • On-chip regulator. • Adjustable output duration. • CDS input. • 30 second warm-up. • ON/AUTO/OFF selected by MODE pin. • Override function. • Auto-reset if the ZC signal disappears for over 3 second. • 16 pin DIP or SOP package. APPLICATIONS 產品應用 產品應用 • PIR light controller, Motion Detector, Alarm system, Auto-door bell. BLOCK DIAGRAM 功能方塊圖 功能方塊圖 OP2O OP2N OP2P OP1O OP1N OP1P VEE OSCD + + Comparator Latch Circuit Mode & CDS Circuit MODE CDS Voltage Divider Control Circuit Output circuit RELAY (TRIAC) Regulator Delay Oscillator System Oscillator RSTB Delay Circuit OSCS System Oscillator Zero Cross Debounce ZC 1/10 2003-01-02 ㆒華半導體股份㈲限公司 MOSDESIGN SEMICONDUCTOR CORP. PIR CONTROLLER M7610A PIR CONTROLLER ABSOLUTE MAXIMUM RATING Parameter Supply Voltage Input Voltage Operating Temperature Storage Temperature Zero Crossing Current Rating -0.3 to 13.0 VSS-0.3~VDD +0.3 -25 to 75 -50 to 125 Max 300 Unit V V ℃ ℃ μA (TA=25℃) ELECTRICAL CHARACTERISTICS Characteristics Operating Voltage Regulator Output Voltage Operating Current CDS “H” Transfer Voltage CDS “L” Transfer Voltage Output Source Current(Relay, Triac) Output Sink Current(Relay, Triac) VEE Sink Current “H” Input Voltage “L” Input Voltage ZC “H” Transfer Voltage ZC “H” Transfer Voltage ZC “L” Transfer Voltage System Oscillator Frequency Delay Oscillator Frequency OP Amp Open Loop Gain OP Amp Input Offset Voltage Sym. VDD VEE IDD VTH1 VTH1 IOH1 IOL1 IOL2 VIH VIL VTH2 VTH2 VTL2 FSYS Fd AVO Vos Min. 5 3.5 — 6.4 3.7 -6 40 — 0.8 VDD — 4.7 4.7 1.3 12.8 1.28 60 ― Typ. 9 4 100 8 4.7 -12 80 1 — — 6.7 6.7 1.8 16 1.6 80 10 Max. 12 4.5 350 9.6 5.6 — — — — 0.2 VDD 8.7 8.7 2.3 19.2 1.92 — 35 Unit V V μA V V mA mA mA V V V V V KHz KHz dB mV Conditions VDD—VEE No load, OSC on. VOH = 10.8V VOL = 1.2V VDD-VEE=4V Rosc=680KΩ, Cosc=100P ( RELAY) Rosc=620KΩ, Cosc=100P ( TRIAC ) Roscd=270K,COSCD=3900P No load No load 2/10 2003-01-02 ㆒華半導體股份㈲限公司 MOSDESIGN SEMICONDUCTOR CORP. PIR CONTROLLER M7610A PIR CONTROLLER Pin Assignment VSS RELAY OSCD OSCS ZC CDS MODE VDD 8 9 1 16 OP2O OP2N OP2P OP1O OP1N OP1P RSTB VEE VSS TRIAC OSCD OSCS ZC CDS MODE VDD 8 9 1 16 OP2O OP2N OP2P OP1O OP1N OP1P RSTB VEE Pin Description Pin No A 1 2 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 3 4 5 6 7 8 9 10 11 12 13 14 15 16 B VSS Negative power supply. Pin Name Description RELAY Relay drive output through external NPN transistor. Active high. TRIAC Triac drive output. Pulse output when active. OSCD OSCS ZC CDS MODE VDD VEE RSTB OP1P OP1N OP1O OP2P OP2N OP2O Delay time oscillator I/O pin. System oscillator I/O pin. Input pin for AC zero crossing detecting. Connect to the CDS voltage divider for daytime/night auto-detecting. Operating mode selection input. Positive power supply. Regulated voltage output pin. Chip reset input pin. Active low. Noninverting input of OP1. Inverting input of OP1. Output of OP1. Noninverting input of OP2. Inverting input of OP2. Output of OP2. 3/10 2003-01-02 ㆒華半導體股份㈲限公司 MOSDESIGN SEMICONDUCTOR CORP. PIR CONTROLLER M7610A PIR CONTROLLER Trigger Timing RSTB CDS Output Enable Comparator input Comparator output Detect Enable Test Enable RELAY TRIAC ON Power-on delay time 30S 10S Test enable 24ms (Note 2) 5 sec -Irigger level -Irigger level (Note1) ON Pulse output (Note 3) Note : 1. The output will be activated, if the trigger signal meets the following criteria: • 3 triggers within 2 seconds. • A trigger signal sustain duration≧0.34s. • 2 trigger signals within 2s with one of the trigger signal sustain≧0.16s. 2. The effective comparator output width can be selected to be 24ms or 32ms or 48ms by mask option, the default is 24ms (system frequency = 16KHz). 3. The output duration is set by external RC connected to the OSCD pin. Functional Description • VEE : The VEE supplies power to the analog front end circuits with a stabilized voltage which is –4V with respect to VDD normally. • OSCS : System oscillator input pin, connect to external RC to generate 16KHz system frequency. Rs 560K Cs 100P Fig.1 System oscillator • OSCD : Output timing oscillator input pin, connect to external RC to obtain desired output turn-on duration. Variable output turn-on duration can be obtained by selecting various values of RC or using a variable resistor. RD CD Fig.2 Output timing oscillator 4/10 2003-01-02 ㆒華半導體股份㈲限公司 MOSDESIGN SEMICONDUCTOR CORP. PIR CONTROLLER M7610A PIR CONTROLLER • RELAY (TRIAC) : The output pin is set as a relay driving (active high) output for the M7610A, or as a triac driving (active low)output for the M7610B. The output active duration is controlled by the OSCD oscillating period. OUTPUT • CDS : M7610A Relay M7610B Triac This pin is a CMOS Schmitt trigger input structure. It is used to distinguish between day time & night. When the input voltage of CDS is high the PIR input will be enabled. When CDS is low the PIR input will be disabled. The input disable to enable debounce time is 5 seconds. Connect this pin to VDD when not using this function. CDS LOW HIGH • MODE : Status Day time Night PIR Disable Enable CDS 5 sec PIR enable 24mS, > 32mS or >48mS. The default is 24ms. • Option for setting comparator window to be 1/16, 1/11.3 or 1/9 (VDD-VEE). The default is 1/16 (VDD-VEE). • PIR amplifier : Consult the diagram below for details of the PIR front end amplifier. In Fig.5 there are 2 op-amps with different applications. OP1 can be used independently as a first stage inverting or non-inverting amplifier for the PIR. As the output of OP2 is directly connected to the input of the comparator, therefore it is used as a second stage amplifying device. The non-inverting input of OP2 is connected to the comparator’s window center point and can be used to check this voltage and to provide a bias voltage that is equal to the center point voltage of the comparator. In Fig.5 the comparator can have 3 window levels, set by mask options, 1) 1/16 (VDD-VEE), 2) 1/11.3 (VDD-VEE), 3) 1/9 (VDD-VEE). If not specified the default window will be set to 1/16 (VDD-VEE). The preset voltage for VDD-VEE is 4V. The VCP and VCN default value is therefore 0.25V,. ( 4/16 V ) • Second stage amplifier : R2 1M C2 0.022 OP2O RW R1 22K RW OP2N OP2 First singe output VDD C1 22μ C3 ON/OFF OP2P RW Fig. 6 Typical second stage amplifier VEE RW 7/10 2003-01-02 ㆒華半導體股份㈲限公司 MOSDESIGN SEMICONDUCTOR CORP. PIR CONTROLLER M7610A PIR CONTROLLER VEE C1 22μ R1 22K VDD C2 0.022 PIR S D G OP1 56K VEE PIR S D G OP1 OUT OP1 R13 100K~180K VD OP1 OUT R2 1M VDD C12 0.047 VEE C11 22μ R11 22K R12 510K Fig.8 High gain first stage Fig.7 Typical PIR amplifier R4 56K C15 100μ VEE Usually the second stage PIR amplifier is a simple capacitively coupled inverting amplifier with low pass configuration. In Fig.6 OP2P is directly connected to the comparator window center, and with the C3 filter can act as the bias for OP2. For this configuration AV=R2/ R1, low cutoff frequency FL=1/2πR1C1, high cutoff frequency Fh=1/2πR2C2.By changing the value of R2 the sensitivity can be varied. C1 and C3, must be low leakage types, to prevent the DC operating point from changing due to current leakage. • Fist Stage of PIR amplifier : Fig.7 shows a typical first stage amplifier. C2 and R2 form a simple low pass filter with cut off frequency of 7Hz. The low frequency response will be governed by R1 and C1 with cut-off frequency at 0.33Hz. AV=(R1+R2) Fig.7 and Fig.8 are similar but in Fig.8 the amplifier’s input signal is taken from the drain of the PIR. This has higher gain than Fig.7. Since OP1 is PMOS input VD must be greater than 1.2V for adequate operation. 8/10 2003-01-02 ㆒華半導體股份㈲限公司 MOSDESIGN SEMICONDUCTOR CORP. PIR CONTROLLER M7610A PIR CONTROLLER ㆒.Relay Application AC110V C=0.8~1μ/ 350V , R6=100Ω/1W AC220V C=0.8~1μ/ 600V , R6=100Ω/2W C R6 1.5A/600V AC C13 ON/OFF Override C5 C3 C6 12V/1W 78L05 VDD=5V C9 VDD1 VDD1 M7610A 1 VSS 16 OP20 OP2N OP2P R14 1M C7 R5 VDD 4002 R1 945 VDD C8 R13 R16 RLYB OSCD OSCS VDD1 4002 R18 R8 R9 R7 C10 OP10 OP1N OP1P RSTB R3 C1 8 9 VEE C2 R4 C4 S D G C12 R2 PIR SD622 R12 1N4148 R15 R17 945 ON AUTO OFF C14 (Tantalum capacitor) (鉭質電容) ZC CDS MODE VDD CDS R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R13 R14 R15 R16 R17 R18 22K 56K 22K 1M 22K 100/2W 2.2M 1M 680K 100K 1M 1M 1.5K 47K 1M 30K C1 22μ/16V C2 0.022μ C3 100P C4 100μ/16V C5 1000μ/16V C6 0.01μ C7 22μ/16V C8 0.022μ C9 330μ/16V C10 10μ/16V C12 0.022μ C13 0.1μ/400~600V C14 4.7μ 9/10 2003-01-02 ㆒華半導體股份㈲限公司 MOSDESIGN SEMICONDUCTOR CORP. PIR CONTROLLER M7610A PIR CONTROLLER ㆓. TRIAC Application AC110V C=0.68μ/350V AC220V C=0.68μ/400 ~ 600V R11 R12 C D5 4002 VDD AC ON/OFF Override 4002 12V C12 C8 C9 C10 R8 VDD M7610B 1 16 OP20 OP2N OP2P R5 R4 C6 C11 R7 GND TRIAC C7 VDD R13 C14 4002 R6 R10 R9 OSCD OSCS ZC C2 OP10 OP1N OP1P RSTB 8 9 VEE R2 C4 C5 R3 C1 S D G C3 R1 PIR SD622 ON CDS AUTO OFF CDS MODE VDD R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 100K 22K 1M 22K 1M 2.2M 2.2M 330K 620K 270K 1M 100 10K C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C14 100μ/16V 10μ/16V 0.022μ 22μ/16V 0.022μ 22μ/16V 0.022μ 100μ/16V 100P 3900P 0.1μ 100μ/16V 1000P * All specs and applications shown above subject to change without prior notice. (以㆖電路及規格僅供參考,本公司得逕行修正) 10/10 2003-01-02
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