SPLC780D

S P L C 780D 16COM/40SEG Controller/Driver NOV. 04, 2004 Version 1.2 SUNPLUS TECHNOLOGY CO. reserves the right to change this documentation without prior notice. Information provided by SUNPLUS TECHNOLOGY No responsibility is assumed by In addition, SUNPLUS products CO. is believed to be accurate and reliable. However, SUNPLUS TECHNOLOGY CO. makes no warranty for any errors which may appear in this document. Contact SUNPLUS TECHNOLOGY CO. to obtain the latest version of device specifications before placing your order. SUNPLUS TECHNOLOGY CO. for any infringement of patent or other rights of third parties which may result from its use. may reasonably be expected to result in significant injury to the user, without the express written approval of Sunplus. are not authorized for use as critical components in life support devices/ systems or aviation devices/systems, where a malfunction or failure of the product SPLC780D Table of Contents PAGE 1. GENERAL DESCRIPTION .......................................................................................................................................................................... 4 2. FEATURES.................................................................................................................................................................................................. 4 3. BLOCK DIAGRAM ...................................................................................................................................................................................... 4 4. SIGNAL DESCRIPTIONS............................................................................................................................................................................ 5 5. COMPARISON OF SPLC780D AND SPLC780C ........................................................................................................................................ 5 6. FUNCTIONAL DESCRIPTIONS.................................................................................................................................................................. 6 6.1. OSCILLATOR .......................................................................................................................................................................................... 6 6.2. CONTROL AND DISPLAY INSTRUCTIONS ................................................................................................................................................... 6 6.3. INSTRUCTION TABLE............................................................................................................................................................................... 8 6.4. 8-BIT OPERATION AND 8-DIGIT 1-LINE DISPLAY (USING INTERNAL RESET)................................................................................................ 9 6.5. 4-BIT OPERATION AND 8-DIGIT 1-LINE DISPLAY (USING INTERNAL RESET).............................................................................................. 10 6.6. 8-BIT OPERATION AND 8-DIGIT 2-LINE DISPLAY (USING INTERNAL RESET).............................................................................................. 10 6.7. RESET FUNCTION .................................................................................................................................................................................11 6.8. DISPLAY DATA RAM (DD RAM)............................................................................................................................................................ 13 6.9. TIMING GENERATION CIRCUIT............................................................................................................................................................... 13 6.10. LCD DRIVER CIRCUIT ....................................................................................................................................................................... 13 6.11. CHARACTER GENERATOR ROM (CG ROM)....................................................................................................................................... 13 6.12. CHARACTER GENERATOR RAM (CG RAM)........................................................................................................................................ 13 6.13. CURSOR/BLINK CONTROL CIRCUIT .................................................................................................................................................... 17 6.14. INTERFACING TO MPU....................................................................................................................................................................... 18 6.15. SUPPLY VOLTAGE FOR LCD DRIVE..................................................................................................................................................... 19 6.16. REGISTER --- IR (INSTRUCTION REGISTER) AND DR (DATA REGISTER) ............................................................................................. 22 6.17. BUSY FLAG (BF) ............................................................................................................................................................................... 22 6.18. ADDRESS COUNTER (AC).................................................................................................................................................................. 22 6.19. I/O PORT CONFIGURATION ................................................................................................................................................................ 22 7. ELECTRICAL SPECIFICATIONS ............................................................................................................................................................. 23 7.1. ABSOLUTE MAXIMUM RATINGS ............................................................................................................................................................. 23 7.2. DC CHARACTERISTICS (VDD = 2.7V TO 4.5V, TA = 25℃) ..................................................................................................................... 23 7.3. AC CHARACTERISTICS (VDD = 2.7V TO 4.5V, TA = 25℃) ..................................................................................................................... 24 7.4. DC CHARACTERISTICS (VDD = 4.5V TO 5.5V, TA = 25℃)..................................................................................................................... 25 7.5. AC CHARACTERISTICS (VDD = 4.5V TO 5.5V, TA = 25℃) ..................................................................................................................... 25 8. APPLICATION CIRCUITS ......................................................................................................................................................................... 27 8.1. R-OSCILLATOR .................................................................................................................................................................................... 27 8.2. INTERFACE TO MPU............................................................................................................................................................................. 27 8.3. SPLC780D APPLICATION CIRCUIT ....................................................................................................................................................... 27 8.4. APPLICATIONS FOR LCD ...................................................................................................................................................................... 27 9. CHARACTER GENERATOR ROM ........................................................................................................................................................... 27 9.1. SPLC780D - 01 .................................................................................................................................................................................. 27 9.2. SPLC780D - 02 .................................................................................................................................................................................. 27 9.3. SPLC780D - 03 .................................................................................................................................................................................. 27 9.4. SPLC780D - 08 .................................................................................................................................................................................. 27 9.5. SPLC780D - 11 .................................................................................................................................................................................. 27 © Sunplus Technology Co., Ltd. Proprietary & Confidential 2 NOV. 04, 2004 Version: 1.2 id se f nU o C ER sN lu I pM nT uR SA P r o F n e ti l a O ly n SPLC780D 9.6. SPLC780D - 12 .................................................................................................................................................................................. 27 9.7. SPLC780D - 13 .................................................................................................................................................................................. 27 9.8. SPLC780D - 14 .................................................................................................................................................................................. 27 9.9. SPLC780D - 15 .................................................................................................................................................................................. 27 9.10. SPLC780D - 17 ............................................................................................................................................................................... 27 9.11. SPLC780D - 18 ............................................................................................................................................................................... 27 9.12. SPLC780D - 19 ............................................................................................................................................................................... 27 9.13. SPLC780D - 54 ............................................................................................................................................................................... 27 10. PACKAGE/PAD LOCATIONS ................................................................................................................................................................... 27 10.1. PAD ASSIGNMENT AND LOCATIONS ................................................................................................................................................... 27 10.2. PACKAGE CONFIGURATION ................................................................................................................................................................ 27 10.3. PACKAGE INFORMATION..................................................................................................................................................................... 27 10.4. ORDERING INFORMATION................................................................................................................................................................... 27 11. DISCLAIMER............................................................................................................................................................................................. 27 12. REVISION HISTORY ................................................................................................................................................................................. 27 id se f nU o C ER sN lu I pM nT uR SA P r o F n e ti l a O ly n © Sunplus Technology Co., Ltd. Proprietary & Confidential 3 NOV. 04, 2004 Version: 1.2 SPLC780D 16COM/40SEG CONTROLLER/DRIVER 1. GENERAL DESCRIPTION The SPLC780D, a dot-matrix LCD controller and driver from SUNPLUS, is a unique design for displaying alpha-numeric, Japanese-Kana characters and symbols. The SPLC780D provides two types of interfaces to MPU: 4-bit and 8-bit interfaces. The transferring speed of 8-bit is twice faster than 4-bit. A single SPLC780D is able to display up to two 8-character lines. be extended. rank. By cascading with SPLC100 or SPLC063, the display capability can The CMOS technology ensures the power saves in the most efficient way and the performance keeps in the highest 2. FEATURES  Character generator ROM: 10880 bits ─ Character font 5 x 8 dots: 192 characters ─ Character font 5 x 10 dots: 64 characters  Character generator RAM: 512 bits ─ Character font 5 x 8 dots: 8 characters ─ Character font 5 x 10 dots: 4 characters  4-bit or 8-bit MPU interfaces  Direct driver for LCD: 16 COMs x 40 SEGs  Duty factor (selected by program): ─ 1/8 duty: 1 line of 5 x 8 dots ─ 1/11 duty: 1 line of 5 x 10 dots 3. BLOCK DIAGRAM OSC1 OSC2 VDD VSS DB0-DB3 DB4-DB7 RS R/W E Power Supply for LCD Drive : (V1-V5) id se f nU o C ER sN lu I pM nT uR SA P r o F ─ 1/16 duty: 2 lines of 5 x 8 dots / line  Built-in power on automatic reset circuit  Support external clock operation  Low Power Consumption n e ti l a O ly n  Built-in oscillator circuit (with external resistor)  Package form: 80 QFP or bare chip available Timing Generation Circuit CL1,CL2 M Parallel to Serial Data Conversion Circuit 5 5 Character Generator ROM 8 Character Generator RAM 8 Busy Flag Cursor Blink Control Circuit 8 40-bit Shift Register 40 D 8 I/O Data Register Latch Circuit 40 7 Buffer 7 8 Instruction Register 8 Instruction Decorder 7 Display Data RAM 80 Bytes 16-bit 16 Shift Register 40 Segments x 16 Commons LCD Driver COM1COM16 7 SEG1SEG40 Address Counter © Sunplus Technology Co., Ltd. Proprietary & Confidential 4 NOV. 04, 2004 Version: 1.2 SPLC780D 4. SIGNAL DESCRIPTIONS Mnemonic VDD VSS OSC1 OSC2 V1 - V5 E R/W RS PIN No. 33 23 24 25 26 - 30 38 37 36 I I I I Type I I Power input Ground Both OSC1 and OSC2 are connected to resistor for internal oscillator circuit. For external clock operation, the clock is input to OSC1. Supply voltage for LCD driving. A start signal for reading or writing data. A signal for selecting read or write actions. 1: Read, 0: Write. A signal for selecting registers. 1: Data Register (for read and write) 0: Instruction Register (for write), DB0 - DB3 DB4 - DB7 CL1 CL2 M D SEG1 - SEG22 39 - 42 43 - 46 31 32 I/O I/O O O Low 4-bit data Description SEG23 - SEG40 COM1 - COM16 5. COMPARISON OF SPLC780D AND SPLC780C SPLC780D Chip size PAD Size Min. PAD Pitch VIH@5V Note: SPLC780D is very similar to SPLC780C. Because they are fabricated on the same foundry and user the same rule, they have the same DC/AC characteristic and they are fully function compatible. id se f nU o C ER sN lu I pM nT uR SA P r o F High 4-bit data Clock to latch serial data D. Clock to shift serial data D. 34 35 O O Switch signal to convert LCD waveform to AC. 1: Selection, 0: Non-selection. Segment signals for LCD. 22 - 1 O O 80 - 63 47 - 62 Common signals for LCD. SPLC780C 2860u*2450u 90u * 90u 110u 2.5V 3140u*2690u 94u * 94u 120u 2.2V Busy flag - Address Counter (for read). n e ti l a O ly n Sends character pattern data corresponding to each common signal serially. Memo Passivation Opening Window © Sunplus Technology Co., Ltd. Proprietary & Confidential 5 NOV. 04, 2004 Version: 1.2 SPLC780D 6. FUNCTIONAL DESCRIPTIONS 6.1. Oscillator SPLC780D oscillator supports not only the internal oscillator operation, but also the external clock operation. S=1 S=1 I/D=1 I/D=0 It shifts the display to the left It shifts the display to the right 6.2. Control and Display Instructions Control and display instructions are described in details as follows: 6.2.4. Display ON/OFF control RS Code 0 R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 6.2.1. Clear display RS Code 0 R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 0 0 0 0 1 D = 1: Display on, D = 0: Display off C = 1: Cursor on, C = 0: Cursor off It clears the entire display and sets Display Data RAM Address 0 in Address Counter. B = 1: Blinks on, B= 0: Blinks off 6.2.2. Return home RS Code 0 R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 0 0 0 1 X X: Do not care (0 or 1) It sets Display Data RAM Address 0 in Address Counter and the display returns to its original position. The cursor or blink goes to the most-left side of the display (to the 1st line if 2 lines are displayed). change. The contents of the Display Data RAM do not 6.2.3. Entry mode set and shifts the display. RS Code 0 During writing and reading data, it defines cursor moving direction R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 0 0 1 I/D S id se f nU o C ER sN lu I pM nT uR SA P r o F 5 x 8 dot character font 8th line Cursor n e ti l a 0 1 D O ly n C B 5 x 10 dot character font 11th line 6.2.5. Cursor or display shift display. Without changing DD RAM data, it moves cursor and shifts RS 0 R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 1 S/C R/L X X Code Blink display alternately I / D = 1: Increment, I / D = 0: Decrement. S = 1: The display shift, S = 0: The display does not shift. S/C 0 0 1 1 R/L 0 1 0 1 Shift cursor to the left Shift cursor to the right Shift display to the left. Description Address Counter AC = AC - 1 AC = AC + 1 Cursor follows the display shift AC = AC AC = AC Shift display to the right. Cursor follows the display shift © Sunplus Technology Co., Ltd. Proprietary & Confidential 6 NOV. 04, 2004 Version: 1.2 SPLC780D 6.2.6. Function set Display data RAM can be read or written after this setting. RS Code 0 R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 1 DL N F X X In one-line display (N = 0), (aaaaaaa)2: (00)16 - (4F)16. X: Do not care (0 or 1) DL: It sets interface data length. DL = 1: Data transferred with 8-bit length (DB7 - 0). DL = 0: Data transferred with 4-bit length (DB7 - 4). It requires two times to accomplish data transferring. N: It sets the number of the display line. N = 0: One-line display. N = 1: Two-line display. F: It sets the character font. F = 0: 5 x 8 dots character font. F = 1: 5 x 10 dots character font. In two-line display (N = 1), (aaaaaaa)2: (00)16 - (27)16 for the first line, (aaaaaaa)2: (40)16 - (67)16 for the second line. 6.2.9. Read busy flag and address RS Code 0 R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 1 BF a a a a N 0 0 1 F 0 1 X No. of Display Lines 1 1 2 It cannot display two lines with 5 x 10 dots character font. 6.2.7. Set character generator RAM address RS Code 0 R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 1 a a a a a a It sets Character Generator RAM Address (aaaaaa)2 to the Address Counter. Character Generator RAM data can be read or written after this setting. 6.2.8. Set display data RAM address RS Code 0 id se f nU o C ER sN lu I pM nT uR SA P r o F Character Font Duty Factor 5 x 8 dots 1/8 5 x 10 dots 5 x 8 dots 1 / 11 1 / 16 When BF = 1, it indicates the system is busy now and it will not accept any instruction until not busy (BF = 0). At the same time, the content of Address Counter (aaaaaaa)2 is read. n e d d ti l a O a d ly n a a 6.2.10. Write data to character generator RAM or display data RAM RS 1 R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 d d d d d Code It writes data (dddddddd)2 to character generator RAM or display data RAM. 6.2.11. Read data from character generator RAM or display data RAM RS 1 R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 1 d d d d d d d d Code It reads data (dddddddd)2 from character generator RAM or display data RAM. R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 1 a a a a a a a To read data correctly, do the following: 1). The address of the Character Generator RAM or Display Data RAM or shift the cursor instruction. It sets Display Data RAM Address (aaaaaaa)2 to the Address Counter. 2). The “ Read ” instruction. © Sunplus Technology Co., Ltd. Proprietary & Confidential 7 NOV. 04, 2004 Version: 1.2 SPLC780D 6.3. Instruction Table Instruction Code Instruction RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Write "20H" to DDRAM Clear Display 0 0 0 0 0 0 0 0 0 1 and set DDRAM address to "00H" from AC Set DDRAM address to "00H" Return Home 0 0 0 0 0 0 0 0 1 return from cursor AC to and 2.16ms 1.52ms 1.18ms Description Execution time (Temp = 25℃) Fosc= 190KHz Fosc= 270KHz Fosc= 350KHz original position if shifted. The contents of DDRAM are not changed. Assign cursor Entry Mode Set 0 0 0 0 0 0 0 1 I/D S direction and enable the shift of entire display Set display Display ON/ OFF Control Cursor or Display Shift Function Set Set CGRAM Address Set DDRAM Address nU o C ER sN lu I pM nT uR SA P r o F 0 0 0 0 0 0 1 D C B bit. 0 0 0 0 0 1 S/C R/L changing data. of 0 0 0 0 1 DL N F of display line font type dots/5x8 dots) 0 0 0 0 0 1 1 AC5 AC4 AC3 AC2 AC1 AC0 address counter. address counter AC6 AC5 AC4 AC3 AC2 AC1 AC0 0 1 BF AC6 AC5 AC4 AC3 AC2 AC1 AC0 counter read. can also 1 1 0 1 D7 D7 D6 D6 D5 D5 D4 D4 D3 D3 D2 D2 D1 D1 D0 D0 cursor(C), and blinking of id f n e ti its l a 53s 53s 2.16ms 1.52ms moving (D), e s 53s O 38s 38s 38s ly n 1.18ms 29s 29s cursor(B) on/off control Set cursor moving and display shift control bit, and the direction, without DDRAM 29s Set interface data length (DL: 8-bit/4-bit), numbers (N: 2-line/1-line) and, display (F:5x10 53s 38s 29s Set CGRAM address in Set DDRAM address in Whether during internal operation or not can be known by reading BF. The contents of address be 53s 53s 38s 38s 29s 29s Read Busy Flag and Address Counter Write Data to RAM Read Data from RAM Write data into internal RAM (DDRAM/CGRAM). Read data from internal RAM (DDRAM/CGRAM). 53s 53s 38s 38s 29s 29s Note1: “--“: don’t care Note2: In the operation condition under -20℃ ~ 75℃, the maximum execution time for majority of instruction sets is 100us, except two instructions, “Clear Display” and “Return Home”, in which maximum execution time can take up to 4.1ms. © Sunplus Technology Co., Ltd. Proprietary & Confidential 8 NOV. 04, 2004 Version: 1.2 SPLC780D 6.4. 8-Bit Operation and 8-Digit 1-Line Display (Using Internal Reset) No. 1 2 Instruction Power on. (SPLC780D starts initializing) Function set RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 1 1 0 0 X X Display Power on reset. No display. Operation Set to 8-bit operation and select 1-line display line and character font. 3 Display on / off control 0 0 0 0 0 0 1 1 1 0 _ Display on. Cursor appear. Increase address by one. 4 Entry mode set 0 0 0 0 0 0 0 1 1 0 _ It will shift the cursor to the right when writing to the DD RAM/CG RAM. Now the display has no shift. Write " W ". 5 Write data to CG RAM / DD RAM 1 0 0 1 0 1 0 1 1 1 W_ The cursor is incremented by one and shifted to the right. Write " E ". 6 Write data to CG RAM / DD RAM 1 0 0 1 0 0 0 1 7 8 1 0 0 Write data to CG RAM / DD RAM 1 0 0 0 1 9 Entry mode set 0 0 0 0 10 Write data to CG RAM / DD RAM 1 0 0 0 1 0 0 0 11 Write data to CG RAM / DD RAM 1 0 0 1 0 0 0 0 12 13 1 0 0 Write data to CG RAM / DD RAM 1 0 1 1 0 14 Cursor or display shift 0 0 0 0 0 15 Cursor or display shift 0 0 0 0 0 16 Write data to CG RAM / DD RAM 1 0 0 1 0 0 1 1 17 Cursor or display shift 0 0 0 0 0 id se f nU o C ER sN lu I pM nT uR SA P r o F 0 1 W E_ The cursor is incremented by one and shifted to the right. n e ti l a O ly n : : 0 1 W ELCOME_ Write " E ". The cursor is incremented by one and shifted to the right. Set mode for display shift when writing 0 0 0 1 1 1 W ELCOME_ 0 0 ELCOME _ Write " "(space). The cursor is incremented by one and shifted to the right. Write " C ". 1 1 LCOME C_ The cursor is incremented by one and shifted to the right. : : 0 1 COMPAMY_ Write " Y ". The cursor is incremented by one and shifted to the right. Only shift the cursor's position to the left (Y). 1 0 0 X X COMPAMY_ 1 0 0 X X COMPAMY_ Only shift the cursor's position to the left (M). OMPANY_ Write " N ". 1 0 The display moves to the left. 1 1 1 X X COMPAMY_ Shift the display and the cursor's position to the right. 18 Cursor or display shift 0 0 0 0 0 1 0 1 X X OMPANY_ Shift the display and the cursor's position to the right. 19 Write data to CG RAM / DD RAM 1 0 0 1 0 0 0 0 0 0 COMPAMY_ Write " " (space). The cursor is incremented by one and shifted to the right. 20 21 Return home 0 0 0 0 0 : 0 0 0 1 0 : WELCOME_ : Both the display and the cursor return to the original position (address 0). © Sunplus Technology Co., Ltd. Proprietary & Confidential 9 NOV. 04, 2004 Version: 1.2 SPLC780D 6.5. 4-Bit Operation and 8-Digit 1-Line Display (Using Internal Reset) No. 1 2 Power on. (SPLC780D starts initializing) Function set RS R/W DB7 DB6 DB5 DB4 0 0 0 0 0 0 Instruction Display Power on reset. No display. Set to 4-bit operation. Operation 0 0 0 0 1 0 0 0 0 1 1 1 X 0 1 0 0 X 0 3 0 0 Set to 4-bit operation and select 1-line display line and character font. 4 0 0 _ 0 Display on. Cursor appears. Increase address by one. 5 0 0 0 0 0 0 0 1 0 1 0 0 _ It will shift the cursor to the right when writing to the DD RAM / CG RAM. Now the display has no shift. Write " W ". 6 1 1 0 0 0 0 6.6. 8-Bit Operation and 8-Digit 2-Line Display (Using Internal Reset) No. 1 2 Power on. Function set 0 0 0 (SPLC780D starts initializing) RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 1 1 1 0 X X 3 Display on / off control 0 0 0 0 0 4 Entry mode set 0 0 0 5 Write data to CG RAM / DD RAM 1 0 0 1 0 1 0 1 6 7 Write data to CG RAM / DD RAM 1 0 0 1 0 0 0 1 id se f nU o C ER sN lu I pM nT uR SA P r o F 1 1 0 1 1 1 n e ti l a O ly n W_ The cursor is incremented by one and shifted to the right. Instruction Display Operation Power on reset. No display. Set to 8-bit operation and select 2-line display line and 5 x 8 dot character font. _ Display on. 0 1 1 1 0 Cursor appear. Increase address by one. CG RAM. 0 0 0 0 1 1 0 _ It will shift the cursor to the right when writing to the DD RAM / Now the display has no shift. Write " W ". W_ 1 1 The cursor is incremented by one and shifted to the right. : : : W ELCOME_ Write " E ". 0 1 The cursor is incremented by one and shifted to the right. W ELCOME _ 8 Set DD RAM address 0 0 1 1 0 0 0 0 0 0 It sets DD RAM's address. The cursor is moved to the beginning position of the 2nd line. Write " T ". The cursor is incremented by one and shifted to the right. : Write " T ". The cursor is incremented by one and shifted to the right. 9 Write data to CG RAM / DD RAM 1 0 0 1 0 1 0 1 0 0 W ELCOME T_ 10 11 : Write data to CG RAM / DD RAM 1 0 0 1 0 1 0 1 0 0 : W ELCOME TO PART_ © Sunplus Technology Co., Ltd. Proprietary & Confidential 10 NOV. 04, 2004 Version: 1.2 SPLC780D No. 12 Entry mode set 0 0 0 0 0 0 0 1 1 1 Instruction Display W ELCOME TO PART_ Operation When writing, it sets mode for the display shift. 13 Write data to CG RAM / DD RAM 1 0 0 1 0 1 1 0 0 1 ELCOME O PARTY_ Write " Y ". The cursor is incremented by one and shifted to the right. : Both the display and the cursor return to the original position (address 0). 14 15 Return home 0 0 0 0 0 : : W ELCOME TO PARTY 0 0 0 1 0 6.7. Reset Function At power on, SPLC780D starts the internal auto-reset circuit and executes the initial instructions. follows: RS R/W DB7 DB6 DB5 DB4 DB3 DB3 DB1 DB0 00 0 0 1 1 X X X X RS R/W DB7 DB6 DB5 DB4 DB3 DB3 DB1 DB0 00 0 0 1 1 X X X X RS R/W DB7 DB6 DB5 DB4 DB3 DB3 DB1 DB0 00 0 0 1 1 X X X X id se f nU o C ER sN lu I pM nT uR SA P r o F [ 8-Bit Interface ] P ower On W ait time > 15 ms after VDD > 4.5V W ait time > 40ms After VDD > 2.7V n e The initial procedures are shown as ti l a O ly n BF cannot be checked before this instruction . Function set ( Interface is 8 bits length . ) W ait time > 4.1 ms BF cannot be checked before this instruction . Function set ( Interface is 8 bits length . ) W ait time > 100 us BF cannot be checked before this instruction . Function set ( Interface is 8 bits length . ) BF can be checked after the following instructions . RS R/W DB7 DB6 DB5 DB4 DB3 DB3 DB1 DB0 0 0 0 0 1 1 N F X X 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 I/D 0 1 S Function set ( Interface is 8 bits length . Specify the number of display lines and character font . ) The number of display lines and character font cannot be changed afterwards . Display off Display clear Initialization Ends Entry mode set © Sunplus Technology Co., Ltd. Proprietary & Confidential 11 NOV. 04, 2004 Version: 1.2 SPLC780D [ 4-Bit Interface ] P ower On W ait time > 15 ms after VDD > 4.5V W ait time > 40ms After VDD > 2.7V RS R/W DB7 DB6 DB5 DB4 0 0 0 0 1 1 BF cannot be checked before this instruction . Function set ( Interface is 8 bits length . ) W ait time > 4.1 ms RS R/W DB7 DB6 DB5 DB4 0 0 0 0 1 1 BF cannot be checked before this instruction . Function set ( Interface is 8 bits length . ) RS R/W DB7 DB6 DB5 DB4 0 0 0 0 1 1 RS R/W DB7 DB6 DB5 DB4 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 N 1 F X 0 0 X 0 id se f nU o C ER sN lu I pM nT uR SA P r o F W ait time > 100 us Function set ( Interface is 8 bits length . ) BF can be checked after the following instructions . 0 0 Function set ( Interface is 4 bits length . Specify the number of the display lines and character font . ) 0 0 0 0 0 1 0 0 0 Display off 0 0 1 I/D S Display clear Initialization Ends Entry mode set n e ti l a O ly n BF cannot be checked before this instruction . Function set ( Set interface to be 4 bits length) Interface is 8 bits length . The number of display lines and character font cannot be changed afterwards . © Sunplus Technology Co., Ltd. Proprietary & Confidential 12 NOV. 04, 2004 Version: 1.2 SPLC780D 6.8. Display Data RAM (DD RAM) The 80-bit DD RAM is normally used for storing display data. Those DD RAM not used for display data can be used as general data RAM. Its address is configured in the Address Counter. The relationships between Display Data RAM Address and LCD s position are depicted as follows. 1-line display , 80 display characters 1 2 3 4 5 6 00 01 02 03 04 05 79 4E 80 4F Display position ( Example ) 1-line display , 8 display characters 1 2 3 4 5 6 7 8 00 01 02 03 04 05 06 07 Display position Display data RAM address When the display shift operation is performed , the display data RAM's address moves as : ( i ) Left shift 01 ( ii ) Right shift 4F 00 02 6.9. Timing Generation Circuit the internal circuits. The timing generating circuit is able to generate timing signals to interface, the MPU access timing and the RAM access timing are generated independently. 6.10. LCD Driver Circuit Total of 16 commons and 40 segments signal drivers are valid in the LCD driver circuit. When a program specifies the character drive-waveforms and the others still output unselected waveforms. fonts and line numbers, the corresponding common signals output id se f nU o C ER sN lu I pM nT uR SA P r o F 03 04 05 06 06 07 08 01 02 03 In order to prevent the internal timing dots character patterns. n e ti l a Display data RAM address O 04 ly n 06 05 6.11. Character Generator ROM (CG ROM) Using 8-bit character code, the character generator ROM generates 5 x 8 dots or 5 x 10 dots character patterns. It also can generate 192’s 5 x 8 dots character patterns and 64’s 5 x 10 6.12. Character Generator RAM (CG RAM) Users can easily change the character patterns in the character generator RAM through program. It can be written to 5 x 8 dots, 8-character patterns or 5 x 10 dots for 4-character patterns. © Sunplus Technology Co., Ltd. Proprietary & Confidential 13 NOV. 04, 2004 Version: 1.2 SPLC780D The following diagram shows the SPLC780D character patterns: Correspondence between Character Codes and Character Patterns. Higher 4-bit (D4 to D7) of Character Code (Hexadecimal) 0 CG RAM (1) 1 2 3 4 5 6 7 8 9 A B C D E F 0 1 CG RAM (2) CG RAM (3) CG RAM (4) CG RAM (5) CG RAM (6) CG RAM (7) CG RAM (8) CG RAM (1) CG RAM (2) CG RAM (3) CG RAM (4) CG RAM (5) CG RAM (6) CG RAM (7) CG RAM (8) 2 3 4 5 Lower 4-bit (D0 to D3) of Character Code (Hexadecimal) 6 7 8 9 A B C D id se f nU o C ER sN lu I pM nT uR SA P r o F n e ti l a O ly n E F © Sunplus Technology Co., Ltd. Proprietary & Confidential 14 NOV. 04, 2004 Version: 1.2 SPLC780D The relationships between Character Generator RAM Addresses, Character Generator RAM Data (character patterns), and Character Codes are depicted as follows: 6.12.1. 5 x 8 dot character patterns Character Code ( DD RAM Data ) b7 b6 b5 b4 b3 b2 b1 b0 CG RAM Address b5 b4 b3 b2 b1 b0 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 X Character Patterns ( CG RAM Data ) b7 b6 b5 b4 b3 b2 b1 b0 1 0 0 X X 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 X 0 0 0 0 0 0 0 0 0 Note1: Note2: It means that the bit0~2 of the character code correspond to the bit3~5 of the CG RAM address. These areas are not used for display, but can be used for the general data RAM. Note3: When all of the bit4-7 of the character code are 0, CG RAM character patterns are selected. Note4: " 1 ": Selected, " 0 " : No selected , " X " : Do not care (0 or 1). display “ T ” character. with the cursor. Note5: For example (1), set character code (b2 = b1 = b0 = 0, b3 = 0 or 1, b7-b4 = 0) to display “ T ”. Note6: The bits 0-2 of the character code RAM is the character pattern line position. nU o C ER sN lu I pM nT uR SA P r o F 0 X 0 0 1 0 0 1 X X X id f n e ti l a Character Pattern Example (1) e s O ly n Cursor Position Character Pattern Example (2) That means character code (00) 16,and (08) 16 can The 8th line is the cursor position and display is formed by logical OR © Sunplus Technology Co., Ltd. Proprietary & Confidential 15 NOV. 04, 2004 Version: 1.2 SPLC780D 6.12.2. 5 X 10 dot character patterns Character Code ( DD RAM Data ) b7 b6 b5 b4 b3 b2 b1 b0 CG RAM Address b5 b4 b3 b2 b1 b0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 X Character Patterns ( CG RAM Data ) b7 b6 b5 b4 b3 b2 b1 b0 1 1 1 1 1 X X 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 1 1 1 1 1 1 1 1 1 1 0 Character Pattern Example (1) 0 0 0 0 X 0 0 X 0 0 0 0 0 1 1 1 1 1 1 1 1 Note1: Note2: It means that the bit1~2 of the character code correspond to the bit4~5 of the CG RAM address. These areas are not used for display, but can be used for the general data RAM. Note3: When all of the bit4-7 of the character code are 0, CG RAM character patterns are selected. Note4: " 1 “: Selected, " 0 “: No selected, " X “: Do not care (0 or 1). (08) 16,and (09) 16 can display “ U ” character. with the cursor. Note5: For example (1), set character code (b2 = b1 = 0, b3 = b0 = 0 or 1, b7-b4 = 0) to display “ U ”. Note6: The bits 0-3 of the character code RAM is the character pattern line position. id se f nU o C ER sN lu I pM nT uR SA P r o F X X X X X X X X n e ti l a O ly n Cursor Position That means all of the character codes (00) 16, (01) 16, The 11th line is the cursor position and display is formed by logical OR © Sunplus Technology Co., Ltd. Proprietary & Confidential 16 NOV. 04, 2004 Version: 1.2 SPLC780D 6.13. Cursor/Blink Control Circuit This circuit generates the cursor or blink in the cursor / blink control circuit. The cursor or the blink appears in the digit at the Display Data RAM Address defined in the Address Counter. When the Address Counter is (07) 16, the cursor position is shown as belows: b6 AC 0 b5 0 b4 0 b3 0 b2 1 b1 1 b0 1 In a 1-line display digit 1 00 2 01 3 02 4 03 5 04 6 05 7 06 8 07 9 08 10 09 Display position In a 2-line display digit 1st line 2nd line id se f nU o C ER sN lu I pM nT uR SA P r o F the cursor position 1 2 3 4 5 6 7 8 9 10 Display position 00 40 01 41 02 42 03 43 04 44 05 45 06 46 07 47 08 48 09 49 ( Hexadecimal ) the cursor position n e Display data RAM address ( Hexadecimal ) ti l a O ly n Display data RAM address © Sunplus Technology Co., Ltd. Proprietary & Confidential 17 NOV. 04, 2004 Version: 1.2 SPLC780D 6.14. Interfacing to MPU There are two types of data operations: 4-bit and 8-bit operations. Using 4-bit MPU, the interfacing 4-bit data is transferred by 4-busline (DB4 to DB7). Thus, DB0 to DB3 bus lines are not used. Using 4-bit MPU to interface 8-bit data requires two times transferring. First, the higher 4-bit data is transferred by 4-busline (for 8-bit operation, DB7 to DB4). Secondly, the lower 4-bit data is transferred by 4-busline (for 8-bit operation, DB3 to DB0). For 8-bit MPU, the 8-bit data is transferred by 8-buslines (DB0 to DB7). RS R/W E Internal operation DB7 DB6 DB5 DB4 id se f nU o C ER sN lu I pM nT uR SA P r o F Functioning IR7 IR3 Busy AC3 Not busy AC3 D7 IR6 IR2 AC6 AC2 AC6 AC2 D6 IR5 IR1 AC5 AC1 AC5 AC1 D5 IR4 IR0 AC4 AC0 AC4 AC0 D4 Instruction Write Busy flag check Busy flag check Example of 4-bit Data Transfer Timing Sequence n e ti l a O D3 D2 ly n D1 D0 Data Write © Sunplus Technology Co., Ltd. Proprietary & Confidential 18 NOV. 04, 2004 Version: 1.2 SPLC780D RS R/W E Internal operation Functioning DB7 IR7 Busy Busy Not Busy DB6 IR6 AC6 AC6 DB5 IR5 AC5 AC5 DB4 IR4 AC4 AC4 DB3 DB2 DB1 DB0 6.15. Supply Voltage for LCD Drive Different voltages can be supplied to SPLC780D’s pins (V5 - 1) for obtaining LCD drive-waveform. The relationships between bias, duty factor and supply voltages are shown as belows: Supply Voltage nU o C ER sN lu I pM nT uR SA P r o F IR3 AC3 AC3 AC3 IR2 AC2 AC2 AC2 IR1 AC1 AC1 AC1 IR0 AC0 AC0 AC0 Instruction Write Busy flag check Busy flag check Busy flag check id f n e AC5 AC4 AC6 ti l a D7 D6 e s O D5 D4 D3 D2 D1 D0 ly n Data Write Example of 8-bit Data Transfer Timing Sequence Duty Factor 1/8, 1/11 1/4 1/16 1/5 VDD – 1/5 VLCD VDD – 2/5 VLCD VDD – 3/5 VLCD VDD – 4/5 VLCD VDD – VLCD V1 V2 V3 V4 V5 VDD – 1/4 VLCD VDD – 1/2 VLCD VDD – 1/2 VLCD VDD – 3/4 VLCD VDD – VLCD © Sunplus Technology Co., Ltd. Proprietary & Confidential 19 NOV. 04, 2004 Version: 1.2 SPLC780D 6.15.1. The power connections for LCD (1/4 Bias, 1/5 Bias) are shown belows: VDD ( +5.0V ) VDD R V1 V2 V3 V4 R V5 V5 R V LCD R V3 V4 V1 V2 R VDD ( +5.0V ) VDD R The bypass-capacitor improves the LCD display quality. id se f nU o C ER sN lu I pM nT uR SA P r o F VR VR 1 / 4 Bias 1 / 5 Bias (1/8,1/11 Duty) -V or Gnd (1/16 Duty) -V or Gnd n e ti R l a VLCD R O ly n VDD( +5.0V ) VDD( +5.0V ) VDD VDD R C R C V1 V1 V2 V3 R R C V2 C R R V3 C C R V4 C V4 R C R V5 C V5 VR 1 / 5 Bias (1/16 Duty) -V or Gnd VR -V or Gnd 1 / 4 Bias (1/8,1/11 Duty) The bias voltage must have the following relations: VDD  V1  V2 ≧ V3  V4  V5. © Sunplus Technology Co., Ltd. Proprietary & Confidential 20 NOV. 04, 2004 Version: 1.2 SPLC780D 6.15.2. The relationship between LCD frames frequency and oscillators frequency. (Assume the oscillation frequency is 250KHz, 1 clock cycle time = 4.0s) 6.15.2.1. 1/8 Duty, TYPE-B waveform 400 clocks 12 VPP V1 COM1 V2(V3) V4 VSS 1 Frame 1 Frame 7812 7812 7812 78 6.15.2.2. 1/11 Duty, TYPE-B waveform 6.15.2.3. 1/16 Duty, TYPE-B waveform id se f nU o C ER sN lu I pM nT uR SA P r o F 400 clocks 12 10 11 1 2 10 11 1 2 VPP V1 COM1 V2(V3) V4 VSS 1 Frame 1 Frame 1 frame = 4(s) x 400 x 11 = 17600(s) = 17.6ms Frame frequency  1 17.6(ms)  5 6 .8(Hz) 1 frame = 4(s) x 400 x 8 = 12800(s) = 12.8ms 1 Frame frequency   78.1(Hz) 12.8(ms) n e ti l a O ly n 200 clocks 12 15 16 1 2 15 16 1 2 VPP V1 COM1 V2 V3 V4 VSS 1 Frame 1 frame = 4(s) x 200 x 16 = 12800(s) = 12.8ms 1 Frame frequency   78.1(Hz) 12.8(ms) 1 Frame © Sunplus Technology Co., Ltd. Proprietary & Confidential 21 NOV. 04, 2004 Version: 1.2 SPLC780D 6.16. REGISTER --- IR (Instruction Register) and DR (Data Register) SPLC780D contains two 8-bit registers: Instruction Register (IR) and Data Register (DR). Using combinations of the RS pin and the R/W pin selects the IR and DR, see below: VDD 6.19. I/O Port Configuration 6.19.1. Input port: E PMOS RS 0 0 1 1 R/W 0 1 0 1 Operation IR write (Display clear, etc.) Read busy flag (DB7) and Address Counter (DB0 - DB6) DR write (DR to Display data RAM or Character generator RAM) DR read (Display data RAM or Character generator RAM to DR) sch NMOS 6.19.2. Input port: R/W, RS The IR can be written by MPU, but it cannot be read by MPU. 6.17. Busy Flag (BF) When RS = 0 and R/W = 1, the busy flag is output to DB7. As the busy flag =1, SPLC780D is in busy state and does not accept any instruction until the busy flag = 0. 6.18. Address Counter (AC) The Address Counter assigns addresses to Display Data RAM and Character Generator RAM. When an instruction for address is written in IR, the address information is sent from IR to AC. After writing to/reading from Display Data RAM or Character Generator RAM, AC is automatically incremented by one (or decremented by one). The contents of AC are output to DB0 DB6 when RS = 0 and R/W = 1. 6.19.4. Input / Output port: DB7 - DB0 id se f nU o C ER sN lu I pM nT uR SA P r o F sch n e VDD ti l a O VDD PMOS ly n PMOS NMOS 6.19.3. Output port: CL1, CL2, M, D VDD PMOS NMOS VDD VDD VDD Enable PMOS PMOS sch NMOS Data © Sunplus Technology Co., Ltd. Proprietary & Confidential 22 NOV. 04, 2004 Version: 1.2 SPLC780D 7. ELECTRICAL SPECIFICATIONS 7.1. Absolute Maximum Ratings Characteristics Operating Voltage Driver Supply Voltage Input Voltage Range Operating Temperature Storage Temperature conditions see AC/DC Electrical Characteristics. Symbol VDD VLCD VIN TA TSTO Ratings -0.3V to +7.0V VDD - 12V to VDD + 0.3V -0.3V to VDD + 0.3V -30℃ to +80℃ -55℃ to +125℃ Note: Stresses beyond those given in the Absolute Maximum Rating table may cause operational errors or damage to the device. 7.2. DC Characteristics (VDD = 2.7V to 4.5V, TA = 25℃) Characteristics Operating Current Symbol IDD Limit Min. Typ. 0.2 Max. 0.4 Input High Voltage Input Low Voltage Input High Voltage Input Low Voltage Input High Current Input Low Current Output High Voltage (TTL) Output Low Voltage (TTL) Output High Output Low Voltage (CMOS) Voltage (CMOS) (COM) (SEG) LCD Voltage Driver ON Resistance Driver ON Resistance Note: FOSC = 250KHz, VDD = 3.0V, pin E = “L”, RS, R/W, DB 0 - DB7 are open, all outputs are no loads. id se f nU o C ER sN lu I pM nT uR SA P r o F mA V VIH1 VIL1 0.7VDD -0.3 VDD 0.55 V VIH2 VIL2 IIH IIL 0.7VDD -0.2 VDD V 0.2VDD 1.0 V Pin OSC1 -1.0 A -10.0 -50 -120 A V VDD = 3.0V VOH1 VOL1 0.75VDD IOH = - 0.1mA IOL = 0.1mA 0.2VDD V VOH2 VOL2 0.8VDD V IOH = - 40A, 0.2VDD 20 V RCOM RSEG VLCD K 30 K V 3.0 9.0 Unit n e ti l a For normal operational Test Condition External clock (Note) O ly n Pins:(E, RS, R/W, DB0 - DB7) Pins: (RS, R/W, DB0 - DB7) Pins: DB0 - DB7 Pins: DB0 - DB7 Pins: CL1, CL2, M, D CL1, CL2, M, D IOL = 40A, Pins: IO = ±50A, VLCD = 4.0V Pins: COM1 - COM16 Pins: SEG1 - SEG40 IO = ±50A, VLCD = 4.0V VDD-V5, 1/4 bias or 1/5 bias © Sunplus Technology Co., Ltd. Proprietary & Confidential 23 NOV. 04, 2004 Version: 1.2 SPLC780D 7.3. AC Characteristics (VDD = 2.7V to 4.5V, TA = 25℃) 7.3.1. Internal clock operation Characteristics OSC Frequency Symbol FOSC1 Limit Min. 190 Typ. 270 Max. 350 Unit KHz Test Condition VDD = 3.0V, Rf = 75K±2% 7.3.2. External clock operation Characteristics External Frequency Duty Cycle Rise/Fall Time t r, t f Symbol FOSC2 Limit Min. 125 45 Typ. 250 50 Max. 350 55 0.2 Unit KHz % s 7.3.3. Write mode (Writing data from MPU to SPLC780D) Characteristics E Cycle Time Symbol tC E Pulse Width E Rise/Fall Time Address Setup Time Address Hold Time Data Setup Time Data Hold Time 7.3.4. Read mode (Reading data from SPLC780D to MPU) Characteristics E Cycle Time E Pulse Width Symbol tC E Rise/Fall Time Address Setup Time Address Hold Time Data Output Delay Time Data hold time id se f nU o C ER sN lu I pM nT uR SA P r o F Limit Typ. Min. Max. Unit ns ns 1000 450 Pin E Pin E tPW tR , t F tSP1 25 ns Pin E 60 ns tHD1 tSP2 20 ns 195 10 ns tHD2 ns Limit Typ. Min. Max. Unit ns 1000 450 Pin E tW ns Pin E Pin E tR , t F tSP1 25 ns 60 ns tHD1 tD 20 ns 360 ns tHD2 5.0 ns n e ti l a Test Condition O ly n Test Condition Pins: RS, R/W, E Pins: RS, R/W, E Pins: DB0 - DB7 Pins: DB0 - DB7 Test Condition Pins: RS, R/W, E Pins: RS, R/W, E Pins: DB0 - DB7 Pin DB0 - DB7 © Sunplus Technology Co., Ltd. Proprietary & Confidential 24 NOV. 04, 2004 Version: 1.2 SPLC780D 7.4. DC Characteristics (VDD = 4.5V to 5.5V, TA = 25℃) Characteristics Operating Current Input High Voltage Input Low Voltage Input High Voltage Input Low Voltage Input High Current Input Low Current Output High Voltage (TTL) Output Low Voltage (TTL) Output High Output Low Symbol IDD VIH1 VIL1 VIH2 VIL2 IIH IIL VOH1 VOL1 Limit Min. 2.5 -0.3 VDD-1 -0.2 -2.0 -20 2.4 Typ. 0.55 -125 Max. 0.8 VDD 0.6 VDD 1.0 2.0 -250 VDD 0.4 Unit mA V V V V A A V Test Condition External clock (Note) Pins:(E, RS, R/W, DB0 - DB7) VDD=5V Pin OSC1 Pin OSC1 Pins: (RS, R/W, DB0 - DB7) VDD = 5.0V Voltage (CMOS) Voltage (CMOS) (COM) (SEG) LCD Voltage Driver ON Resistance Driver ON Resistance Note: FOSC = 250KHz, VDD = 5.0V, pin E = “L”, RS, R/W, DB 0 - DB7 are open, all outputs are no loads. 7.5. AC Characteristics (VDD = 4.5V to 5.5V, TA = 25℃) 7.5.1. Internal clock operation Characteristics OSC Frequency 7.5.2. External clock operation Characteristics External Frequency Duty Cycle Rise/Fall Time id se f nU o C ER sN lu I pM nT uR SA P r o F VOH2 VOL2 0.9VDD VDD V IOH = - 40A, 0.1VDD 20 V RCOM RSEG VLCD K 30 11 K V 3.0 Symbol FOSC1 Limit Typ. 270 Min. 190 Max. 350 Unit KHz Symbol FOSC2 Limit Typ. 250 50 Min. 125 45 t r, t f Max. 350 55 0.2 Unit KHz % s V n e IOH = - 0.1mA IOL = 0.1mA Pins: DB0 - DB7 Pins: DB0 - DB7 ti l a O ly n Pins: CL1, CL2, M, D IOL = 40A, Pins: CL1, CL2, M, D IO = ±50A, VLCD = 4.0V Pins: COM1 - COM16 Pins: SEG1 - SEG40 IO = ±50A, VLCD = 4.0V VDD-V5, 1/4 bias or 1/5 bias Test Condition VDD = 5.0V, Rf = 91K±2% Test Condition © Sunplus Technology Co., Ltd. Proprietary & Confidential 25 NOV. 04, 2004 Version: 1.2 SPLC780D 7.5.3. Write mode (Writing Data from MPU to SPLC780D) Characteristics E Cycle Time E Pulse Width E Rise/Fall Time Address Setup Time Address Hold Time Data Setup Time Data Hold Time Symbol tC tPW tR , t F tSP1 tHD1 tSP2 tHD2 Limit Min. 500 230 40 10 80 10 Typ. Max. 20 Unit ns ns ns ns ns ns ns Pin E Pin E Pin E Pins: RS, R/W, E Pins: RS, R/W, E Pins: DB0 - DB7 Pins: DB0 - DB7 Test Condition 7.5.4. Read mode (Reading Data from SPLC780D to MPU) Characteristics E Cycle Time E Pulse Width Symbol tC Limit Typ. - E Rise/Fall Time Address Setup Time Address Hold Time Data Output Delay Time Data hold time 7.5.5. Interface mode with LCD Driver (SPLC100A1) Characteristics Symbol tPWH tPWL tCSP Clock pulse width high Clock pulse width low Clock setup time Data setup time Data hold time M delay time id se f nU o C ER sN lu I pM nT uR SA P r o F Min. 500 230 Max. ns ns Pin E Pin E tW tR , t F tSP1 20 ns Pin E 40 ns tHD1 tD 10 ns ns ns 120 tHD2 5.0 Limit Typ. Min. 800 Max. Unit ns ns 800 500 ns tDSP tHD tD 300 ns Pins: D 300 ns ns Pins: D -1000 1000 Pins: M Unit n e ti l a Test Condition O ly n Pins: RS, R/W, E Pins: RS, R/W, E Pins: DB0 - DB7 Pin DB0 - DB7 Test Condition Pins: CL1, CL2 Pins: CL1, CL2 Pins: CL1, CL2 © Sunplus Technology Co., Ltd. Proprietary & Confidential 26 NOV. 04, 2004 Version: 1.2 SPLC780D 7.5.6. Write mode timing diagram (Writing Data from MPU to SPLC780D) RS V IH1 V IL1 tSP1 V IL1 tPW V IH1 V IL1 tR V IH1 V IL1 V IH1 V IL1 tSP2 V IH1 V IL1 tHD1 V IL1 tF tHD1 R/W E tHD2 DB7 - 0 Valid Data tC V IH1 V IL1 7.5.7. Read mode timing diagram (Reading Data from SPLC780D to MPU) R/W DB0 - DB7 7.5.8. Interface mode with SPLC100A1 timing diagram CL1 0.9VDD id se f nU o C ER sN lu I pM nT uR SA P r o F RS n e ti l a V IL1 O ly n V IH1 V IL1 tSP1 V IH1 V IL1 tHD1 V IH1 V IH1 tPW E V IH1 V IL1 V IH1 V IL1 tF tHD1 V IL1 tR tD V IH1 V IL1 tHD2 Valid Data tC V IH1 V IL1 tPWH 0.9VDD tPWH CL2 tCSP 0.9VDD 0.1VDD 0.1VDD tCSP D 0.9VDD 0.1VDD tPWL 0.9VDD 0.1VDD tDSP M 0.1VDD tHD tD © Sunplus Technology Co., Ltd. Proprietary & Confidential 27 NOV. 04, 2004 Version: 1.2 SPLC780D 8. APPLICATION CIRCUITS 8.1. R-Oscillator The oscillation resistor Rf is used only for the internal oscillator operation mode. OSC1 Rf : 75.0K±2% ( when VDD = 3.0V) Rf : 91K± 2% ( when VDD = 5.0V) Since the oscillation frequency varies depending on the OSC1 and OSC2 pin capacitance, the wiring length to these pins should be minimized. OSC2 400 Fosc ( KHz ) 600 Fosc ( KHz ) 270 200 400 270 200 8.2. Interface to MPU 8.2.1. Interface to 8-bit MPU (6805) 8.2.2. Interface to 8-bit MPU (Z80) id se f nU o C ER sN lu I pM nT uR SA P r o F 0 0 75 100 200 300 400 0 Rosc ( Kohms ) 0 91 100 200 300 Rosc ( Kohms ) n e ti l a O 400 ly n VDD = 3.0V VDD = 5.0V P A0 | PA7 8 DB0 | DB7 COM1 | COM16 16 LCD PANEL 6805 SPLC780D 16 COMMONS X PB0 E PB1 PB2 RS R/W SEG1 | SEG40 40 40 SEGMENTS D0 | D7 A1 | A7 8 7 DB0 | DB7 Z80 COM1 | COM16 16 LCD PANEL 16 COMMONS X E RS SPLC780D SEG1 | SEG40 40 A0 IORQ WR 40 SEGMENTS R/W © Sunplus Technology Co., Ltd. Proprietary & Confidential 28 NOV. 04, 2004 Version: 1.2 SPLC780D 8.3. SPLC780D Application Circuit DOT MATRIX LCD PANEL 16 (8) COM16 (COM8) | COM1 40 SEG40 | SEG1 40 Y1-Y40 DL1 VDD FCS SHL1 SHL2 GND VEE SPLC100A1 DR2 DL2 DR1 CL1 CL2 M DL1 VDD FCS SHL1 SHL2 GND VEE 40 SPLC100A1 DR2 DL2 DR1 CL1 CL2 M 40 SPLC100A1 Y1-Y40 Y1-Y40 DL1 DR2 VDD DL2 FCS DR1 SHL1 CL1 SHL2 CL2 GND M VEE V1V2V3V4V5V6 VDD GND CL1 CL2 M V1 V2 V3 V4 V5 V1V2V3V4V5V6 SPLC780D id se f nU o C ER sN lu I pM nT uR SA P r o F R R R R R VR VDD ( +5V ) C C C C C -V or Gnd n e V1V2V3V4V5V6 ti l a O ly n © Sunplus Technology Co., Ltd. Proprietary & Confidential 29 NOV. 04, 2004 Version: 1.2 SPLC780D 8.4. Applications for LCD SPLC780D COM1 LCD Panel COM8 SEG1 8 characters x 1 line SEG40 ( Example 1 ) : 5 x 8 dots , 8 characters x 1 line [ 1 / 4 Bias , 1 / 8 Duty ] SPLC780D COM1 COM11 SEG1 SEG40 SPLC780D COM1 COM8 COM9 COM16 SEG1 id se f nU o C ER sN lu I pM nT uR SA P r o F LCD Panel ( Example 2 ) : 5 x 10 dots , 8 characters x 1 line [ 1 / 4 Bias , 1 / 11 Duty ] LCD Panel ( Example 3 ) : 5 x 8 dots , 8 characters x 2 lines [ 1 / 5 Bias , 1 / 16 Duty ] n e ti l a O ly n 8 characters x 1 line 8 characters x 2 lines SEG40 © Sunplus Technology Co., Ltd. Proprietary & Confidential 30 NOV. 04, 2004 Version: 1.2 SPLC780D SPLC780D COM1 COM8 SEG1 SEG40 COM9 COM16 ( Example 4 ) : 5 x 8 dots , 16 characters x 1 line [ 1 / 5 Bias , 1 / 16 Duty ] SPLC780D SEG1 SEG20 COM1 COM8 SEG21 SEG40 id se f nU o C ER sN lu I pM nT uR SA P r o F LCD Panel n e ti l a O ly n 4 characters x 2 lines ( Example 5 ) : 5 x 8 dots , 4 characters x 2 lines [ 1 / 4 Bias , 1 / 8 Duty ] © Sunplus Technology Co., Ltd. Proprietary & Confidential 31 NOV. 04, 2004 Version: 1.2 SPLC780D 9. CHARACTER GENERATOR ROM 9.1. SPLC780D - 01 id se f nU o C ER sN lu I pM nT uR SA P r o F n e ti l a O ly n © Sunplus Technology Co., Ltd. Proprietary & Confidential 32 NOV. 04, 2004 Version: 1.2 SPLC780D 9.2. SPLC780D - 02 id se f nU o C ER sN lu I pM nT uR SA P r o F n e ti l a O ly n © Sunplus Technology Co., Ltd. Proprietary & Confidential 33 NOV. 04, 2004 Version: 1.2 SPLC780D 9.3. SPLC780D - 03 id se f nU o C ER sN lu I pM nT uR SA P r o F n e ti l a O ly n © Sunplus Technology Co., Ltd. Proprietary & Confidential 34 NOV. 04, 2004 Version: 1.2 SPLC780D 9.4. SPLC780D - 08 id se f nU o C ER sN lu I pM nT uR SA P r o F n e ti l a O ly n © Sunplus Technology Co., Ltd. Proprietary & Confidential 35 NOV. 04, 2004 Version: 1.2 SPLC780D 9.5. SPLC780D - 11 id se f nU o C ER sN lu I pM nT uR SA P r o F n e ti l a O ly n © Sunplus Technology Co., Ltd. Proprietary & Confidential 36 NOV. 04, 2004 Version: 1.2 SPLC780D 9.6. SPLC780D - 12 id se f nU o C ER sN lu I pM nT uR SA P r o F n e ti l a O ly n © Sunplus Technology Co., Ltd. Proprietary & Confidential 37 NOV. 04, 2004 Version: 1.2 SPLC780D 9.7. SPLC780D - 13 id se f nU o C ER sN lu I pM nT uR SA P r o F n e ti l a O ly n © Sunplus Technology Co., Ltd. Proprietary & Confidential 38 NOV. 04, 2004 Version: 1.2 SPLC780D 9.8. SPLC780D - 14 id se f nU o C ER sN lu I pM nT uR SA P r o F n e ti l a O ly n © Sunplus Technology Co., Ltd. Proprietary & Confidential 39 NOV. 04, 2004 Version: 1.2 SPLC780D 9.9. SPLC780D - 15 id se f nU o C ER sN lu I pM nT uR SA P r o F n e ti l a O ly n © Sunplus Technology Co., Ltd. Proprietary & Confidential 40 NOV. 04, 2004 Version: 1.2 SPLC780D 9.10. SPLC780D - 17 id se f nU o C ER sN lu I pM nT uR SA P r o F n e ti l a O ly n © Sunplus Technology Co., Ltd. Proprietary & Confidential 41 NOV. 04, 2004 Version: 1.2 SPLC780D 9.11. SPLC780D - 18 id se f nU o C ER sN lu I pM nT uR SA P r o F n e ti l a O ly n © Sunplus Technology Co., Ltd. Proprietary & Confidential 42 NOV. 04, 2004 Version: 1.2 SPLC780D 9.12. SPLC780D - 19 id se f nU o C ER sN lu I pM nT uR SA P r o F n e ti l a O ly n © Sunplus Technology Co., Ltd. Proprietary & Confidential 43 NOV. 04, 2004 Version: 1.2 SPLC780D 9.13. SPLC780D - 54 id se f nU o C ER sN lu I pM nT uR SA P r o F n e ti l a O ly n © Sunplus Technology Co., Ltd. Proprietary & Confidential 44 NOV. 04, 2004 Version: 1.2 SPLC780D 10. PACKAGE/PAD LOCATIONS 10.1. PAD Assignment and Locations Please contact Sunplus sales representatives for more information. 10.2. Package Configuration QFP 80L Top View 80 SEG23 79 SEG24 78 SEG25 77 SEG26 76 SEG27 75 SEG28 74 SEG29 73 SEG30 72 SEG31 71 SEG32 70 SEG33 69 SEG34 68 SEG35 67 SEG36 66 SEG37 65 SEG38 SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG09 SEG08 SEG07 SEG06 SEG05 SEG04 SEG03 SEG02 SEG01 VSS OSC1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 id se f nU o C ER sN lu I pSPLC780DM n TXXX uR SA P r o F 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 OSC2 VDD R/W DB0 DB1 CL1 CL2 RS V1 V2 V3 V4 V5 40 n e ti l a O 64 63 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 ly n SEG39 SEG40 62 COM16 61 COM15 60 COM14 59 COM13 58 COM12 57 COM11 56 COM10 COM9 COM8 COM7 COM6 COM5 COM4 COM3 COM2 COM1 DB7 DB6 DB5 DB4 DB3 DB2 M D © Sunplus Technology Co., Ltd. Proprietary & Confidential 45 E NOV. 04, 2004 Version: 1.2 SPLC780D 10.3. Package Information QFP 80L Outline Dimensions Unit: Millimeter D D1 E E1 Symbol D D1 E E1 e b A A1 A2 c L1 id se f nU o C ER sN lu I pM nT uR SA P r o F c L1 SUNPLUS SPLC780D YYWW n e ti l a O e A2 A1 ly n b A Min. Nom. Max. Unit Millimeter Millimeter Millimeter Millimeter Millimeter Millimeter Millimeter Millimeter Millimeter Millimeter Millimeter 23.20 REF 20.00 REF 17.20 REF 14.00 REF 0.80 REF 0.35 - 0.30 - 0.45 3.40 - 0.25 2.50 0.11 2.72 0.15 1.60 REF 2.90 0.23 10.4. Ordering Information Product Number SPLC780D-NnnV-C SPLC780D-NnnV-PQ05 Note1: Code number is assigned for customer. Note2: Code number (N = A - Z or 0 - 9, nn = 00 - 99); version (V = A - Z). Package Type Chip form Package form - QFP 80L © Sunplus Technology Co., Ltd. Proprietary & Confidential 46 NOV. 04, 2004 Version: 1.2 SPLC780D 11. DISCLAIMER The information appearing in this publication is believed to be accurate. Integrated circuits sold by Sunplus Technology are covered by the warranty and patent indemnification provisions stipulated in the terms of sale only. SUNPLUS makes no warranty, express, statutory implied or by description regarding the information in this publication or regarding the freedom of the described chip(s) from patent infringement. prices at any time without notice. FURTHER, SUNPLUS MAKES NO WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PURPOSE. SUNPLUS reserves the right to halt production or alter the specifications and Accordingly, the reader is cautioned to verify that the data sheets and other information in this Products described herein are intended for use in normal commercial applications. publication are current before placing orders. Applications involving unusual environmental or reliability requirements, e.g. military equipment or medical life support equipment, are specifically not recommended without additional processing by SUNPLUS for such applications. Please note that application circuits illustrated in this document are for reference purposes only. id se f nU o C ER sN lu I pM nT uR SA P r o F n e ti l a O ly n © Sunplus Technology Co., Ltd. Proprietary & Confidential 47 NOV. 04, 2004 Version: 1.2 SPLC780D 12. REVISION HISTORY Date NOV. 04, 2004 Revision # 1.2 1. VIH=2.5V@5V 2. Add “COMPARISON OF SPLC780D AND SPLC780C” 3. Modify IIL Min/Max JUN. 16, 2004 APR. 23, 2004 1.1 1.0 Add ROM code 1. Remove “Preliminary” 2. Modify description: “Execution time” to “Execution time (Temp = 25℃)” 3. Add Note2 APR. 01, 2004 0.2 1. Add min. and max. value in Instruction Table 2. Add 8-bit/4-bit data transfer timing sequence example AUG. 06, 2003 0.1 Original 32 - 44 Description Page id se f nU o C ER sN lu I pM nT uR SA P r o F n e ti l a O ly n 7 7 17 - 18 33 7 © Sunplus Technology Co., Ltd. Proprietary & Confidential 48 NOV. 04, 2004 Version: 1.2