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2ED020I12-F

2ED020I12-F

  • 厂商:

    EUPEC(英飞凌)

  • 封装:

    SOIC18

  • 描述:

    HALF-BRIDGE PERIPHERAL DRIVER

  • 数据手册
  • 价格&库存
2ED020I12-F 数据手册
IGBT/MOSFET Applications based on Coreless Transformer Driver IC 2ED020I12-F A. Volke1, M. Hornkamp 1, B. Strzalkowski2 1 eupec GmbH, Max-Planck-Str. 5, D-59581 Warstein, Germany, info@eupec.com, Tel.: +49-(0)2902-764-0 2 Infineon Technologies AG, Balanstr. 59, D-81609 Munich, Germany Driver IC’s either for IGBT’s or MOSFET’s are commonly used in several power electronics applications. Here the problem of isolating the high and low side driver stages occurs. Currently almost all of these applications are based on optocouplers, discrete transformers or level-shifters for either safety or functional isolation. This paper presents a new approach based on the coreless transformer driver IC 2ED020I12-F and, furthermore, gives a n outlook on upcoming developments. Coreless Transformer Technology (CLT) Nowadays the common solution to realize either functional or safety isolation for low and medium power applications is the usage of optocouplers, discrete transformers, or monolithic level-shifters. All of them have their typical advantages and disadvantages which are well known. The primary goal of the coreless transformer technology is to combine these advantages by avoiding at the same time the disadvantages. This means in detail a high insulation capability, no ageing and therefore constant reliability over the projected lifetime, small package size, easy integration of additional logic functions, and cost effective production. The basic principle of the CLT is the implementation of a microplanar transformer embedded within the semiconductor process. The transformer provides the galvanic isolation and signal transmission between input and output stage. The 2ED020I12-F contains two drivers for an IGBT or MOSFET half-bridge, whereby the high side is galvanically isolated from the low side part through a coreless transformer system as described before. The main features of the IC are: • Fully operational up to 1200V DC • Drive supply range from 0V to +18V • Drive peak output current of +1A / -2A Due to the used CLT and SPT5 technology short propagation delays of 50ns and a delay mismatch of ±10ns can be achieved. As an additional feature a general purpose operational amplifier and a comparator with open collector output are implemented. Half-bridge driver 2ED020I12-F The development of the driver IC 2ED020I12-F was driven by the idea to improve today’s driver solutions based on integrated circuits like monolithic level shifters or multiple component scenarios of separate driver IC’s and optocouplers or discrete transformers. Figure 2: Block diagram of 2ED020I12-F Figure 1: Simplified schematic of 2ED020I12-F Driver EMI ruggedness Besides the insulation capability, a further key point necessary for the usage as a driver in an industrial environment is important: The ruggedness against high dV/dt disturbance and an overall immunity against the change of external magnetic fields. Concerning the 2ED020I12-F the critical component in terms of EMI seems to be the coreless transformer and associated receiver circuitry. Tests conducted have proved that the 2ED020I12-F is immune against dV/dt of at least 50kV/µs as well as dH/dt A greater than 100 . Among other things this m ⋅ ns is attained by a small coupling capacitance of less than 0.2pF, reduced internal parasitic capacitances and the magnetic shielding of the lead frame. +15V. This requires a closer look at how values like the gate resistor RG, turn-on losses Eon, turnoff losses Eoff, turn-on delay times td_on, and turnoff delay times td_off depend on the driving gate voltage. The gate resistor – as one of the main factors – in general determines the turn-off losses of an IGBT. To calculate the gate resistor for a specific turn-off loss at unipolar switching the following 1 rule of thumb applies: R0 / 15 ≈ R−15 / 15 . The 3 1 factor is derived from the relation 3 VMP − 0 V of and assumes that the MillerVMP − (− 15 V ) Plateau voltage VMP has a value between +8V and +10V depending on several factors like the IGBT chip and collector current. Figure 5 proves the rule to be sufficiently accurate by a measurement of the losses Eoff = f(RG) at different gate voltages for an IGBT. It can be seen that for the same losses of 1 Eoff ≈ 1,55mJ the factor of matches quite well 3 to R0 / 15 = 62 Ω and R−15 / 15 = 180 Ω. Figure 3: Immunity against dV/dt disturbance Figure 5: Comparison Eoff = f(RG) Considerations for unipolar driver stages In contrast to the turn-off losses there are no differences for the specific turn-on losses between a driver stage providing -15V to +15V or 0V to +15V. The reason for this is that the losses depend on the collector current CI of the IGBT. Hence, IC itself depends on the provided gate voltage, i.e. according to the transfer characteristic as shown in Figure 6 the collector current will only flow in case the gate voltage is above 0V. Therefore, it makes no difference whether that starting point of the driving gate voltage source is at -15V or 0V. Generally datasheets of IGBT modules refer to a gate drive voltage from -15V to +15V. However, the 2ED020I12-F provides a gate voltage 0V to The benefit of bipolar gate voltages is the suppression of transient EMI voltages during switched-off IGBT’s. This is a major concern in Figure 4: Immunity against dH/dt disturbance medium to high power applications, but negligible for low to medium power applications. Applications The 2ED020I12-F is a driver IC not only for IGBT’s, but due to the rated maximum switching frequency of up to 60kHz without degradation also suitable for MOSFET’s. This opens the way for applications like: • • 3-phase low and medium power converters for AC and BLDC drives H-Bridges for DC drives or SMPS Figure 6: Transfer characteristic Comparing the turn-on delay times with 0V to +15V and -15V to 15V switching the IGBT has in general lower delay times as shown in a measurement for several values of RG in Figure 7. Figure 9: 15kVA converter with 2ED020I12-F External circuitry A convenient solution for the power supply of the high side of the driver is realized by a bootstrap circuit. As an alternative a separate floating power supply provided by an SMPS might be used. The simple bootstrap circuit contains a suitable diode and capacitor. The selection of these devices is determined by several factors: • The blocking voltage of the diode must withstand the DC-Link voltage. Thus, for 800V systems a 1200V diode is the proper choice. • The voltage provided by the capacitor has to be maintained at a value greater than the UVLO threshold of the driver. The value of the bootstrap capacitor can be estimated with enough safety by the following rule of thumb: Figure 7: Comparison td_on = f(RG) On the other hand concerning the turn-off delay times with 0V to +15V gate voltage the IGBT has lager delay times than with a -15V to +15V driver stage as shown in Figure 8. 2Q G + C ≥ 30 Figure 8: Comparison td_off = f(RG) VDD Iq + IL fS − VF − VCE QG: Gate charge of driven IGBT or MOSFET Iq: Quiescent current of driver IC IL: Leakage current of capacitor (only relevant for electrolytic capacitors) fS : Switching frequency V DD: Supply voltage V F: Bootstrap diode forward voltage drop V CE: Collector-emitter voltage drop of low side IGBT (source-drain voltage for MOSFET) work as an additional common low side emitter or source resistor. Figure 10: Bootstrap circuit The low side driver is able to manage ground bounces of typical medium power inverters. Nevertheless, the ground pins GND and GNDL of the IC have to be connected externally in the shortest possible way (see Figure 11). In this way any voltage drop due to ground bounce is reduced. Thereby, the reference ground of the driver has to be defined in accordance with the applications. For instance: • In case no shunt resistor is used, the driver ground is equal to the low side IGBT emitter or MOSFET source respectively. • When using a shunt resistor the ground of the driver has to be connected either to the low side emitter or source. In this case the ground of the driver and for instance the µController are separated by the shunt resistor. This assures that the current through the shunt resistor does not contain any gate current. Figure 12: Ground reference at negative DC-Link For low and even several medium power applications it is basically sufficient to connect an IGBT or MOSFET with the 2ED020I12-F through a gate resistor, of which the value is determined ∆VGE by the formula R G(min) = . IG(max) RG(min): Minimum gate resistor value. Considering also any internal resistor values within the driver and IGBT/MOSFET itself. ∆V GE : Maximum voltage level. For 0V/15V driver stage is ∆V GE = 15V. Voltage drops at bootstrap circuits (like V F and VCE) decreasing the resulting maximum voltage accordingly. IG(max): Maximum allowable peak gate current. Some medium power applications might have the requirement for higher source and/or sink currents than +1A / -2A. In such applications an additional booster can be used as illustrated in Figure 13. Figure 13: Booster Figure 11: Ground reference at low side emitter • In another scenario the ground of the driver is on the same level as the µController and the shunt resistor will The integrated operational amplifier (OpAmp) and comparator are suitable to detect over- (OC) and/or short circuit current (SC). Figure 14 shows an example for open-emitter modules where in each half-bridge low-side a shunt resistor might be located. In case of a positive OC or SC the circuitry signals a fault if the threshold – set by R7 and R8 – of the comparator is reached. The benefit of this circuit is that one driver IC handles one half-bridge not only for switching the power semiconductors, but also for measurement tasks. No further discrete OpAmps or comparators are needed. safe handling of spikes without increasing the propagation delay time. Last but not least the 2ED020I12-F has a shutdown input, which enables or disables both the high and low side driver stages. This shutdown input could be controlled for instance by a fault timer circuitry as shown in Figure 16, which extents any trigger input signal to t = R 3 ⋅ C4 . The input signal for pin “/Trigger in“ could be provided, for example, from the circuitry shown in Figure 14 or Figure 15. Figure 14: Positive OC/SC detection Another, more complex possibility would be combining the OpAmps and comparators of several driver IC’s (for example in 3-phase converters with a shunt resistor placed in the negative DC-Link). Figure 15 shows an example where one comparator is detecting OC and the other SC events. The different assignment is basically defined by the time constants set by R6, C2 and R7, C3 respectively. Figure 16: Fault Timer circuitry with LMC555 External protective measures Additionally to the implemented protective measures also some external measures might be advisable for certain applications. These are for example: • A resistor RGE between gate and emitter avoids uncontrolled charging of the input capacitance Cies of the IGBT or MOSFET. • A transient suppressor Zener diode between gate and emitter limits the maximum gate-emitter voltage VGE. Figure 15: Positive/Negative OC/SC detection Integrated protective measures To avoid the simultaneous switching of the high and low side of a half-bridge either by erroneously generated input signals from the µController or EMI the 2ED020I12-F has an interlocking function at the primary side implemented that prevents any half-bridge short circuit. As another feature it houses an under-voltage lockout circuit (UVLO) which inhibits the high or low side to drive an IGBT or MOSFET with insufficient supply voltage, which prevents the power semiconductor from operating in a high dissipation mode. Furthermore, the driver IC contains low pass digital filters at the logic inputs. This allows the Figure 17: External protective measures Outlook Ongoing developments are focusing on single IGBT and MOSFET driver IC’s based on the coreless transformer technology which have an isolation of up to 1200V. Furthermore, the demand for the combination of safety isolation, high reliability, and low production costs for analog-to-digital converters (ADC) leads to the development of a sigma-delta ADC with coreless transformer. Target applications will be shunt current measurements for instance in individual phases of 3-phase converters, potential free measurement of PIM NTC resistors, and DC-link voltages. Figure 18 shows an application with six CLT single driver IC’s and six CLT ADC. All of them with safety isolation to drive and control a 3 phase motor. Figure 18: Application with ADC’s and driver IC’s of eupec EiceDRIVER™ family Conclusion The potential of the coreless transformer technology implemented in the driver IC 2ED020I12-F – and soon also in driver and analog-digital-converters with safety isolation – offers developers a convenient usage in a wide range of low and medium power applications due to its simple and reliable way of integration. References [1] Mark Münzer, eupec GmbH: Coreless transformer a new technology for half bridge driver IC’s, PCIM Nuremberg, 2003. [2] Michael Hornkamp, eupec GmbH: Current shunt resistors integrated in IGBT power modules for medium power drive application, PCIM China, 2004 [3] Bernhard Strzalkowski, Silesian University of Technology: Analysis of features, optimizing and model building of highly isolated planar transformer, integrated on chip and manufactured in BiCMOS semiconductor process, PhD Thesis, 2004 [4] eupec GmbH: EiceDRIVER™ 2ED020I12-F Datasheet and Application, http://www.eicedriver.com, 2003 [5] National Semiconductor: LMC555, http://www.national.com, 2002
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