AUIRFR4105TRL

AUTOMOTIVE GRADE AUIRFR4105   Features  Advanced Planar Technology  Low On-Resistance  Dynamic dV/dT Rating  175°C Operating Temperature  Fast Switching  Fully Avalanche Rated  Repetitive Avalanche Allowed up to Tjmax  Lead-Free, RoHS Compliant  Automotive Qualified * HEXFET® Power MOSFET D-Pak max. 45m ID (Silicon Limited) 27A ID (Package Limited) 20A D G S D-Pak AUIRFR4105 G Gate D Drain Standard Pack Form Quantity Tube 75 Tape and Reel Left 3000 Package Type AUIRFR4105 55V RDS(on) Description Specifically designed for Automotive applications, this cellular design of HEXFET® Power MOSFETs utilizes the latest processing techniques to achieve low on-resistance per silicon area. This benefit combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in Automotive and a wide variety of other applications. Base part number VDSS   S Source Orderable Part Number AUIRFR4105 AUIRFR4105TRL Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless otherwise specified. Symbol Parameter Max. ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 27 ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 19 ID @ TC = 25°C IDM PD @TC = 25°C Continuous Drain Current, VGS @ 10V (Package Limited) Pulsed Drain Current  Maximum Power Dissipation 20 100 68 VGS EAS EAS (Tested) IAR EAR TJ TSTG Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy (Thermally Limited)  Single Pulse Avalanche Energy Tested Value  Avalanche Current  Repetitive Avalanche Energy  Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case) Thermal Resistance   Symbol RJC RJA RJA Parameter Junction-to-Case  Junction-to-Ambient ( PCB Mount)  Junction-to-Ambient Units A W 0.45 ± 20 65 16 6.8 5.0 -55 to + 175 W/°C V   300   mJ A mJ °C  Typ. Max. Units ––– ––– ––– 2.2 50 110 °C/W HEXFET® is a registered trademark of Infineon. *Qualification standards can be found at www.infineon.com 1 2015-12-1 AUIRFR4105   Static @ TJ = 25°C (unless otherwise specified) V(BR)DSS V(BR)DSS/TJ RDS(on) VGS(th) gfs Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Trans conductance IDSS Drain-to-Source Leakage Current IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. Typ. Max. Units Conditions 55 ––– ––– V VGS = 0V, ID = 250µA ––– 0.052 ––– V/°C Reference to 25°C, ID = 1mA ––– ––– 45 m VGS = 10V, ID = 16A  2.0 ––– 4.0 V VDS = VGS, ID = 250µA 6.5 ––– ––– S VDS = 25V, ID = 16A  ––– ––– 25 VDS = 55V, VGS = 0V µA ––– ––– 250 VDS = 44V,VGS = 0V,TJ =150°C ––– ––– 100 VGS = 20V nA ––– ––– -100 VGS = -20V Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified) Qg Qgs Qgd td(on) tr td(off) tf Total Gate Charge Gate-to-Source Charge Gate-to-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– 7.0 49 31 40 34 6.8 14 ––– ––– ––– ––– LD Internal Drain Inductance ––– 4.5 ––– LS Internal Source Inductance ––– 7.5 ––– ––– ––– ––– 700 240 100 ––– ––– ––– Min. Typ. Max. Units ––– ––– 27 ––– ––– 100 ––– ––– ––– ––– 57 130 1.6 86 200 Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Diode Characteristics   Parameter Continuous Source Current IS (Body Diode) Pulsed Source Current ISM (Body Diode) VSD Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge ton Forward Turn-On Time ID = 16A nC   VDS = 44V VGS = 10V, See Fig. 6 &13  VDD = 28V ID = 16A ns RG = 18 RD = 1.8,See Fig. 10 Between lead, 6mm (0.25in.) nH   from package and center of die contact VGS = 0V pF   VDS = 25V ƒ = 1.0MHz, See Fig.5 Conditions MOSFET symbol showing the A integral reverse p-n junction diode. V TJ = 25°C,IS = 16A, VGS = 0V  ns TJ = 25°C ,IF = 16A nC di/dt = 100A/µs Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes:  Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11)  VDD = 25V, , starting TJ = 25°C, L = 410µH, RG = 25, IAS = 16A, VGS =10V. (See fig. 12)  ISD 16A, di/dt 420A/µs, VDD V(BR)DSS, TJ  175°C.  Pulse width 300µs; duty cycle  2%. Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 20A. Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance. R is measured at TJ approximately 90°C.  When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994 2 2015-12-1 AUIRFR4105   1000 1000 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V I , Drain-to-Source Current (A) D I , Drain-to-Source Current (A) D 100 10 4.5V 1 20µs PULSE WIDTH TC = 25°C 0.1 0.1 1 10 A 100 10 100 R DS(on) , Drain-to-Source On Resistance (Normalized) I D , Drain-to-Source Current (A) TJ = 25°C TJ = 175°C 10 VDS = 25V 20µs PULSE WIDTH 7 8 9 10 VGS , Gate-to-Source Voltage (V) Fig. 3 Typical Transfer Characteristics 3 10 A 100 Fig. 2 Typical Output Characteristics 2.4 6 1 VDS , Drain-to-Source Voltage (V) 100 5 20µs PULSE WIDTH TC = 175°C 0.1 0.1 Fig. 1 Typical Output Characteristics 1 4.5V 1 VDS , Drain-to-Source Voltage (V) 4 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP TOP I D = 26A 2.0 1.6 1.2 0.8 0.4 VGS = 10V 0.0 A -60 -40 -20 0 20 40 60 A 80 100 120 140 160 180 TJ , Junction Temperature (°C) Fig. 4 Normalized On-Resistance Vs. Temperature 2015-12-1 AUIRFR4105   1200 V GS , Gate-to-Source Voltage (V) 1000 C, Capacitance (pF) 20 V GS = 0V, f = 1MHz C iss = Cgs + C gd , Cds SHORTED C rss = C gd Ciss C oss = Cds + C gd 800 Coss 600 400 Crss 200 0 1 10 100 I D = 16A V DS = 44V V DS = 28V 16 12 8 4 FOR TEST CIRCUIT SEE FIGURE 13 0 A 0 20 30 A 40 Q G , Total Gate Charge (nC) VDS , Drain-to-Source Voltage (V) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 1000 1000 OPERATION IN THIS AREA LIMITED BY R DS(on) I D , Drain Current (A) ISD , Reverse Drain Current (A) 10 100 TJ = 175°C TJ = 25°C 10 100 10µs 100µs 10 1ms VGS = 0V 1 0.4   4 0.8 1.2 1.6 A 2.0 TC = 25°C TJ = 175°C Single Pulse 1 1 A 10 100 VSD , Source-to-Drain Voltage (V) VDS , Drain-to-Source Voltage (V) Fig. 7 Typical Source-to-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 2015-12-1 AUIRFR4105   30 LIMITED BY PACKAGE I D , Drain Current (A) 25 20 15 10 Fig 10a. Switching Time Test Circuit 5 0 25 50 75 100 125 150 175 TC , Case Temperature ( °C) Fig 9. Maximum Drain Current Vs. Case Temperature Fig 10b. Switching Time Waveforms Thermal Response (Z thJC) 10 1 D = 0.50 0.20 0.10 0.05 0.1 0.01 0.00001 0.02 0.01 PDM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 5 2015-12-1 AUIRFR4105   DRIVER L VDS D.U.T RG + V - DD IAS 20V 0.01 tp Fig 12a. Unclamped Inductive Test Circuit A E AS , Single Pulse Avalanche Energy (mJ) 140 15V TOP 120 BOTTOM ID 6.5A 11A 16A 100 80 60 40 20 0 VDD = 25V 25 50 75 100 125 150 A 175 Starting TJ , Junction Temperature (°C) V(BR)DSS tp Fig 12c. Maximum Avalanche Energy vs. Drain Current I AS Fig 12b. Unclamped Inductive Waveforms Id Vds Vgs Vgs(th) Qgs1 Qgs2 Qgd Qgodr Fig 13a. Gate Charge Waveform   6 Fig 13b. Gate Charge Test Circuit 2015-12-1 AUIRFR4105   Fig 14. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs   7 2015-12-1 AUIRFR4105   D-Pak (TO-252AA) Package Outline (Dimensions are shown in millimeters (inches)) D-Pak (TO-252AA) Part Marking Information Part Number AUFR4105 YWWA IR Logo XX  Date Code Y= Year WW= Work Week XX Lot Code Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 8 2015-12-1 AUIRFR4105   D-Pak (TO-252AA) Tape & Reel Information (Dimensions are shown in millimeters (inches)) TR TRR 16.3 ( .641 ) 15.7 ( .619 ) 12.1 ( .476 ) 11.9 ( .469 ) FEED DIRECTION TRL 16.3 ( .641 ) 15.7 ( .619 ) 8.1 ( .318 ) 7.9 ( .312 ) FEED DIRECTION NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541. 13 INCH 16 mm NOTES : 1. OUTLINE CONFORMS TO EIA-481. Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 9 2015-12-1 AUIRFR4105   Qualification Information Qualification Level Moisture Sensitivity Level   Machine Model ESD Human Body Model   Charged Device Model RoHS Compliant Automotive (per AEC-Q101) Comments: This part number(s) passed Automotive qualification. Infineon’s Industrial and Consumer qualification level is granted by extension of the higher Automotive level. D-Pak MSL1 Class M2 (+/- 200V)† AEC-Q101-002 Class H1B (+/- 900V) † AEC-Q101-001 Class C5 (+/- 1125V)† AEC-Q101-005 Yes † Highest passing voltage. Revision History Date 12/1/2015 Comments   Updated datasheet with corporate template Corrected ordering table on page 1. Published by Infineon Technologies AG 81726 München, Germany © Infineon Technologies AG 2015 All Rights Reserved. IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office (www.infineon.com). WARNINGS Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.   10 2015-12-1