ICE3B0365JGXUMA1

ICE3Bxx65JG Fixed-Frequency, 650V CoolSET™ in DS0-12 Package Product Highlights  Active Burst Mode to reach the lowest Standby Power Requirements < 100mW  Adjustable Blanking Window for High Load Jumps to increase Reliability PG-DSO-12  Frequency Jittering for Low EMI  Pb-free lead plating, RoHS compliant Features Applications  650V Avalanche Rugged CoolMOS™ with built in switchable  Adapter/Charger, Blue Ray/DVD player, Set-top Box, Digital Startup Cell Photo Frame  Active Burst Mode for lowest Standby Power  Auxiliary power supply of Server, PC, Printer, TV, Home @ light load controlled by Feedback Signal theater/Audio System, White Goods, etc  Fast Load Jump Response in Active Burst Mode Description  67 kHz fixed Switching Frequency The CoolSET™-F3 (Jitter version) meets the requirements for OffLine Battery Adapters and low cost SMPS for the lower power range. By use of a BiCMOS technology a wide VCC range up to 26 V is provided. This covers the changes in the auxiliary supply voltage if a CV/CC regulation is implemented on the secondary side. Furthermore an Active Burst Mode is integrated to fullfill the lowest Standby Power Requirements 4.5 V. Therefore the overvoltage detection can only be active during Soft Start Phase (VSoftS < 4.0V) and when FB signal is outside the operating range > 4.5 V. This means any small voltage overshoots of VVCC during normal operating cannot trigger the Auto Restart Mode I. In Order to ensure system reliability and prevent any false activation, a blanking time is implemented before the IC can enter into the Auto Restart Mode I. The output of the VCC overvoltage detection is fed into a spike blanking with a time constant of 8.0 μs. The other fault detection which can result in the Auto Restart Mode I and has this 8.0 μs blanking time is the Overtemperature detection. This block checks for a junction temperature of higher than 140°C for malfunction operation. Datasheet 15 of 26 V 2.2 2017-09-12 Fixed-Frequency, 650V CoolSET™ in DS0-12 Package Functional Description Once Auto Restart Mode is entered, the internal bias is switched off in order to reduce the current consumption of the IC as much as possible. In this mode, the average current consumption is only 300 μA as the only working blocks are the reference block and the Undervoltage Lockout (UVLO) which controls the Startup Cell by switching on/off at VVCCon/VVCCoff. As there is no longer a self supply by the auxiliary winding, VCC starts to drop. The UVLO switches on the integrated Startup Cell when VCC falls below 10.3 V. It will continue to charge VCC up to 18 V whereby it is switched off again and the IC enters into the Start Up Phase. As long as all fault conditions have been removed, the IC will automatically power up as usual with switching cycle at the GATE output after Soft Start duration. Thus it is called Auto Restart Mode. 3.6.3.2 Auto Restart Mode II Internal Bias SoftS C3 4.0V & 4.5V C4 G5 Auto Restart Mode FB Control Unit Figure 18 Auto Restart Mode II In case of Overload or Open Loop, FB exceeds 4.5 V which will be observed by C4. At this time, the external Soft Start capacitor can now be charged further by the integrated pull up resistor RSoftS via switch S3 (see Figure 14). If VSoftS exceeds 4.0 V which is observed by C3, Auto Restart Mode II is entered as both inputs of the gate G5 are high. This charging of the Soft Start capacitor from 3.2 V ~ 3.6 V to 4.0 V defines a blanking window which prevents the system from entering into Auto Restart Mode II unintentionally during large load jumps. In this event, FB will rise close to 5.0 V for a short duration before the loop regulates with FB less than 4.5 V. This is the same blanking time window as for the Active Burst Mode and can therefore be adjusted by the external CSoftS. In case of VCC undervoltage, i.e. VCC falls below 10.3 V, the IC will be turned off with the Startup Cell charging VCC as described earlier in this section. Once VCC is charged above 18 V, the IC will start a new startup cycle. The same procedure applies when the system is under Short Optocoupler fault condition, as it will lead to VCC undervoltage. Datasheet 16 of 26 V 2.2 2017-09-12 Fixed-Frequency, 650V CoolSET™ in DS0-12 Package Electrical Characteristics 4 Note: Electrical Characteristics All voltages are measured with respect to ground (Pin 12). The voltage levels are valid if other ratings are not violated. 4.1 Note: Absolute Maximum Ratings Absolute maximum ratings are defined as ratings, which when being exceeded may lead to destruction of the integrated circuit. For the same reason make sure, that any capacitor that will be connected to pin 11 (VCC) is discharged before assembling the application circuit. Ta=25°C unless otherwise specified. Table 3 Absolute Maximum Ratings Parameter Drain Source Voltage Symbol VDS Limit Values Unit Remarks Tj=110 °C min. max. - 650 V Pulse drain current, pulse width tp limited by Tj=150 °C ICE3B0365JG ID_Plus1 - 1.6 A ICE3B0565JG ID_Plus2 - 2.3 A Avalanche energy, repetitive tAR limited by max. Tj=150 °C1 ICE3B0365JG EAR1 - 0.005 mJ ICE3B0565JG EAR2 - 0.01 mJ Avalanche current, repetitive tAR limited by max. Tj=150 °C1 ICE3B0365JG IAR1 - 0.3 A ICE3B0565JG IAR2 - 0.5 A VCC Supply Voltage VVCC -0.3 27 V FB Voltage VFB -0.3 5.0 V SoftS Voltage VSoftS -0.3 5.0 V CS Voltage VCS -0.3 5.0 V Junction Temperature Tj -40 150 °C Storage Temperature TS -55 150 °C Thermal Resistance (Junction–Ambient) RthJA - 110 K/W PG-DSO-16/12 ESD Capability VESD - 2 kV Human body model2 Repetitive avalanche causes additional power losses that can be calculated as PAV=EAR*f According to EIA/JESD22-A114-B (discharging a 100 pF capacitor through a 1.5 kΩ series resistor) Datasheet 17 of 26 Controller & CoolMOS™ 1 2 V 2.2 2017-09-12 Fixed-Frequency, 650V CoolSET™ in DS0-12 Package Electrical Characteristics 4.2 Note: Table 4 Operating Range Within the operating range the IC operates as described in the functional description. Operating Range Parameter Symbol Limit Values min. max. Unit VCC Supply Voltage VVCC VVCCoff 26 V Junction Temperature of Controller TjCon -25 130 ° Junction Temperature of CoolMOS™ TjCoolMOS -25 150 ° 4.3 Characteristics 4.3.1 Supply Section Note: Table 5 Remarks Max value limited due to thermal shut down of controller C C The electrical characteristics involve the spread of values within the specified supply voltage and junction temperature range TJ from – 25 °C to 130 °C. Typical values represent the median values, which are related to 25°C. If not otherwise stated, a supply voltage of VVCC = 18 V is assumed. Supply Section Parameter Symbol Limit Values Unit Test Condition min. typ. max. - 300 450 µA VVCC =17 V Start Up Current IVCCstart VCC Charge Current IVCCcharge1 - - 5.0 mA VVCC = 0V IVCCcharge2 0.55 1.05 1.60 mA VVCC = 1 V IVCCcharge3 - 0.88 - mA VVCC =17 V Leakage Current of Start Up Cell and CoolMOS™ IStartLeak - 0.2 50 µA VDrain = 450 V at Tj=100 °C Supply Current with Inactive Gate IVCCsup_ng - 1.7 2.5 mA Soft Start pin is open Supply Current with Active Gate IVCCsup_g - 2.5 3.6 mA VSoftS = 3.0 V, IFB = 0 A Supply Current in Auto Restart Mode with Inactive Gate IVCCrestart - 300 - µA IFB = 0 A, ISoftS = 0 A Supply Current in Active Burst Mode with Inactive Gate IVCCburst1 - 500 950 µA VFB = 2.5 V, VSoftS = 3.0 V IVCCburst2 - 500 950 µA VVCC = 11.5 V,VFB = 2.5 V, VSoftS = 3.0 V Datasheet 18 of 26 V 2.2 2017-09-12 Fixed-Frequency, 650V CoolSET™ in DS0-12 Package Electrical Characteristics VCC Turn-On Threshold VCC Turn-Off Threshold VCC Turn-On/Off Hysteresis 4.3.2 Table 6 17.0 9.6 - 18.0 10.3 7.7 19.0 11.0 - V V V Internal Voltage Reference Internal Voltage Reference Parameter Symbol Limit Values Trimmed Reference Voltage 4.3.3 Table 7 VVCCon VVCCoff VVCChys VREF min. typ. max. 4.90 5.00 5.10 Unit Test Condition V measured at pin FB, IFB = 0 Unit Test Condition PWM Section PWM Section Parameter Symbol Limit Values min. typ. max. fOSC1 58 67 76 kHz fOSC2 62 67 74.5 kHz Tj = 25°C Frequency Jittering Range fdelta - ±2.7 - kHz Tj = 25°C Max. Duty Cycle Dmax 0.70 0.75 0.80 Min. Duty Cycle Dmin 0 - - PWM-OP Gain AV 3.0 3.2 3.4 Max. Level of Voltage Ramp Vmax- - 0.6 - V Fixed Oscillator Frequency VFB < 0.3 V Ramp VFB Operating Range Min Level VFBmin - 0.5 - V VFB Operating Range Max level VFBmax - - 4.3 V FB Pull-Up Resistor RFB 9 14 22 kΩ Soft_Start Pull-Up Resistor RSoftS 30 45 62 kΩ The parameter is not subjected to production test - verified by design/characterization Datasheet 19 of 26 CS=1 V, limited by Comparator C41 1 V 2.2 2017-09-12 Fixed-Frequency, 650V CoolSET™ in DS0-12 Package Electrical Characteristics 4.3.4 Control Unit Table 8 Control Unit Parameter Symbol Limit Values Unit Test Condition VFB = 5 V min. typ. max. 2.98 3.10 3.22 V VSoftSclmp_bm 2.88 3.0 3.12 V Deactivation Level for SoftS Comparator C7 by C2 Clamped VSoftS Voltage during Burst Mode Activation limit for Comparator C3 VSoftSC2 VSoftSC3 3.85 4.00 4.15 V VFB = 5 V SoftS Startup Current ISoftSstart - 0.9 - mA VSoftS = 0 V Over Load & Open Loop Detection Limit for Comparator C4 Active Burst Mode Level for Comparator C5 VFBC4 4.33 4.50 4.67 V VSoftS = 4.5 V VFBC5 1.23 1.35 1.43 V VSoftS = 4.5 V Active Burst Mode Level for Comparator C6a Active Burst Mode Level for Comparator C6b Overvoltage Detection Limit VFBC6a 3.48 3.61 3.76 V VFBC6b 2.88 3.00 3.12 V VVCCOVP 19.5 20.5 21.5 V After Active Burst Mode is entered After Active Burst Mode is entered VFB = 5 V, VSoftS = 3.0 V Thermal Shutdown1 TjSD 130 140 150 °C Spike Blanking tSpike - 8 - μs Note: 4.3.5 Table 9 The trend of all voltage levels in the Control Units is the same regarding the deviation except VVCCOVP Current Limiting Current Limiting Parameter Symbol Limit Values min. typ. max. Unit Test Condition dVsense / dt = 0.6 V/µs Peak Current Limitation (incl. Propagation Delay) (see Figure 12) Vcsth 1.02 1.07 1.12 V Peak Current Limitation during Active Burst Mode VCS2 0.27 0.32 0.37 V Leading Edge Blanking tLEB - 220 - ns VSoftS = 3 V CS Input Bias Current ICSbias -1.0 -0.2 0 µA VCS =0 V The parameter is not subjected to production test - verified by design/characterization. The thermal shutdown temperature refers to the junction temperature of the controller. Datasheet 20 of 26 1 V 2.2 2017-09-12 Fixed-Frequency, 650V CoolSET™ in DS0-12 Package Electrical Characteristics 4.3.6 CoolMOS™ Section Table 10 CoolMOS™ Section Parameter Symbol Limit Values Drain Source Breakdown Voltage V(BR)DSS Drain Source On-Resistance ICE3B0365JG RDSon ICE3B0565JG Effective output capacitance, energy related ICE3B0365JG min. typ. max. 600 650 - - Test Condition V Tj = 25 °C Tj = 110 °C Ω - 6.45 13.70 7.50 17.00 Tj = 25 °C Tj=125 °C1 - 4.70 10.00 5.44 12.50 Tj = 25 °C Tj=125 °C1 Co(er) ICE3B0565JG Unit pF - 3.65 - 4.75 VDS = 0 V to 480 V - Rise Time 2 trise - 30 - ns Fall Time 2 tfall - 30 - ns The parameter is not subjected to production test - verified by design/characterization Measured in a Typical Flyback Converter Application Datasheet 21 of 26 1 2 V 2.2 2017-09-12 Fixed-Frequency, 650V CoolSET™ in DS0-12 Package Outline Dimension 5 Figure 19 Datasheet Outline Dimension PG-DSO-12 (Pb-free lead plating Plastic Dual-in-Line Outline) 22 of 26 V 2.2 2017-09-12 Fixed-Frequency, 650V CoolSET™ in DS0-12 Package Marking 6 Marking Figure 20 Marking for ICE3B0365JG Figure 21 Marking for ICE3B0565JG Datasheet 23 of 26 V 2.2 2017-09-12 Fixed-Frequency, 650V CoolSET™ in DS0-12 Package Schematic for recommended PCB layout 7 Schematic for recommended PCB layout Figure 22 Schematic for recommended PCB layout General guideline for PCB layout design using F3 CoolSET™ (Figure 22): 1. “Star Ground “at bulk capacitor ground, C11: “Star Ground “means all primary DC grounds should be connected to the ground of bulk capacitor C11 separately in one point. It can reduce the switching noise going into the sensitive pins of the CoolSET™ device effectively. The primary DC grounds include the followings. a. DC ground of the primary auxiliary winding in power transformer, TR1, and ground of C16 and Z11. b. DC ground of the current sense resistor, R12 c. DC ground of the CoolSET™ device, GND pin of IC11; the signal grounds from C13, C14, C15 and collector of IC12 should be connected to the GND pin of IC11 and then “star “connect to the bulk capacitor ground. d. DC ground from bridge rectifier, BR1 e. DC ground from the bridging Y-capacitor, C4 2. High voltage traces clearance: High voltage traces should keep enough spacing to the nearby traces. Otherwise, arcing would incur. a. 400 V traces (positive rail of bulk capacitor C11) to nearby trace: > 2.0 mm b. 600 V traces (drain voltage of CoolSET™ IC11) to nearby trace: > 2.5 mm 3. Filter capacitor close to the controller ground: Filter capacitors, C13, C14 and C15 should be placed as close to the controller ground and the controller pin as possible so as to reduce the switching noise coupled into the controller. Guideline for PCB layout design when > 3 kV lightning surge test applied (Figure 22) 1. Add spark gap Datasheet 24 of 26 V 2.2 2017-09-12 Fixed-Frequency, 650V CoolSET™ in DS0-12 Package Schematic for recommended PCB layout Spark gap is a pair of saw-tooth like copper plate facing each other which can discharge the accumulated charge during surge test through the sharp point of the saw-tooth plate. a. Spark Gap 3 and Spark Gap 4, input common mode choke, L1: Gap separation is around 1.5 mm (no safety concern) b. Spark Gap 1 and Spark Gap 2, Live / Neutral to GROUND: These 2 Spark Gaps can be used when the lightning surge requirement is > 6 kV. 230 VAC input voltage application, the gap separation is around 5.5mm 115 VAC input voltage application, the gap separation is around 3mm 2. Add Y-capacitor (C2 and C3) in the Live and Neutral to ground even though it is a 2-pin input 3. Add negative pulse clamping diode, D11 to the Current sense resistor, R12: The negative pulse clamping diode can reduce the negative pulse going into the CS pin of the CoolSET™ and reduce the abnormal behavior of the CoolSET™. The diode can be a fast speed diode such as 1N4148. The principle behind is to drain the high surge voltage from Live/Neutral to Ground without passing through the sensitive components such as the primary controller, IC11. Revision history Major changes since the last revision Page or Reference 1, 23 Datasheet Description of change Revise wrong marking text 25 of 26 V 2.2 2017-09-12 Trademarks All referenced product or service names and trademarks are the property of their respective owners. Edition 2017-09-12 Published by Infineon Technologies AG 81726 München, Germany © 2017 Infineon Technologies AG. All Rights Reserved. Do you have a question about this document? Email: erratum@infineon.com Document reference IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”) . 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