ICL5102 Data Sheet
ICL5102 PFC + Resonant Half-Bridge Controller
for LED Drivers
2nd Generation
Datasheet
Rev1.1
Features
Integrated two stage combination controller allows for reduced number of external components, optimizes
Bill of Materials (BOM) and form factor.
PFC controller with Critical Conduction Mode (CrCM) + Discontinuous Conduction Mode (DCM)
Resonant Half-Bridge (HB) controller with fixed or variable switching frequency control
Maximum 500 KHz HB switching frequency and soft-start frequency up to 1.3 MHz
Resonant HB Active Burst Mode (ABM) ensures power limitation and low standby power < 300mW.
Supports universal AC input voltage (90 to 305 Vrms) nominal
Excellent system efficiency up to 94%
THD optimization ensures Low harmonic distortion (Total Harmonic Distortion (THD) < 5%) down to 30%
nominal load.
Integrated High Side MOSFET driver
Small DSO-16 package
Comprehensive set of protection features with auto-restart reaction:
Input brown-out protection
PFC bus over-voltage protection
PFC over-current protection
Output over-voltage protection (OVP)
Output over-current/short circuit protection (OCP)
Output over-power/over-load protection (OPP)
Capacitive mode protection
External over-temperature protection (OTP)
Potential applications
Offline LED Drivers for commercial and industrial lighting up to 350 W
High density AC/DC power supply
Product validation
Qualified for industrial applications according to the relevant tests of JEDEC47/20/22
Product Type
Package
ICL5102
PG-DSO-16
Datasheet
www.infineon.com
Please read the Important Notice and Warnings at the end of this document
page 1 of 34
V 1.1
2018-10-28
ICL5102 PFC + Resonant Half-Bridge Controller
2nd Generation
Description
ROVP_2
ROVP_1
OVP
LPFC
The ICL5102 is a highly integrated
multi-mode (CrCM and DCM) PFC and resonantCr1HBL4_3
combination controller.
The integration of PFC and HB into a single controller
enables reduction of external
Lm components and optimizes
PFCZCD
Cr3
V
+
VACIN
performance
by harmonized operation of the two stages.
Lr
OUT
HSGD
VOUT -
PFCGD
The two-stage approach divides the PFC responsibilities
from the output current regulations functions. This
HSGND
ensures low variation in the output voltage andPFCVS
current and allows for low THD, high
Cr2 power factor and a greater
BO1
DBO2
ability to Dwithstand
AC line perturbations. The
multi-mode
operation
of
PFC
converter provides excellent
LSGD
PFCCS
LSCS
efficiency over the whole load range.
OTP
BM
ICL5102
BO
RF
VCC
CV & CC Regulator
GND
L4_4
HSVCC
RBO1
Resonant HB converter
supports both LLC and LCC topologies with fixed or variable switching frequency
control for highest efficiency and the ABM enables the low standby power consumption.
RBM_DA
SFH617-A3
NTC
Rf_min
A comprehensive set of protection features
with auto-restart ensures the highest safety and reliability of the
CVCC
RBM
RBO2
components and overall system.
The following Figure shows a typical LED driver application using ICL5102 with PFC+LLC topology:
ROVP_2
ROVP_1
LPFC
Cr1
OVP
PFCZCD
VACIN
VOUT -
HSVCC
ICL5102
DBO2
VOUT +
L4_4
DBO1
PFCVS
Cr3
Lr
HSGD
PFCGD
L4_3
Lm
HSGND
Cr2
LSGD
PFCCS
OTP
BM
BO
RF
VCC
RBO1
Figure 1
CVCC
SFH617-A3
RBM
NTC
RBO2
Rf_min
RBM_DA
CV & CC Regulator
GND
LSCS
ICL5102 Typical Application with PFC+LLC Topology
Table of contents
Features ........................................................................................................................................ 1
Potential applications ..................................................................................................................... 1
Product validation .......................................................................................................................... 1
Qualified for industrial applications according to the relevant tests of JEDEC47/20/22 ........................... 1
Description .................................................................................................................................... 2
Table of contents ............................................................................................................................ 2
1
Pin Configuration and Description ........................................................................................... 4
2
Functional Block Diagram ....................................................................................................... 6
3
3.1
3.2
Functional Description............................................................................................................ 7
IC Power Up ............................................................................................................................................. 7
Multi-Mode PFC Controller ...................................................................................................................... 7
Datasheet
2 of 34
V 1.1
2018-10-28
ICL5102 PFC + Resonant Half-Bridge Controller
2nd Generation
3.2.1
3.2.1.1
3.2.1.2
3.2.1.3
3.2.2
3.2.3
3.2.4
3.2.5
3.2.5.1
3.2.5.2
3.2.5.3
3.2.5.4
3.2.5.5
3.2.5.6
3.3
3.3.1
3.3.1.1
3.3.1.2
3.3.1.3
3.3.1.4
3.3.2
3.3.3
3.3.3.1
3.3.3.2
3.3.3.3
3.3.3.4
3.4
3.4.1
4
Control Scheme .................................................................................................................................. 7
PFC Soft-start ................................................................................................................................ 8
PFC Multi-Mode Control ................................................................................................................ 8
PFC THD Correction .................................................................................................................... 10
PFC Bus voltage Sensing .................................................................................................................. 10
Input voltage sensing ....................................................................................................................... 11
PFC Inductor Peak Current limitation ............................................................................................. 11
PFC Protection features ................................................................................................................... 11
PFC Bus Under-voltage Protection............................................................................................. 12
PFC Bus Over-voltage Protection Level 1 ................................................................................... 12
PFC Bus Over-voltage Protection Level 2 ................................................................................... 12
PFC Open Control Loop Protection ............................................................................................ 12
PFC Inductor Over-current Protection ....................................................................................... 12
Input Brown-out Protection ....................................................................................................... 13
Resonant Half-Bridge Controller .......................................................................................................... 13
Control Scheme ................................................................................................................................ 13
HB Frequency Control via CCO ................................................................................................... 13
HB Controller Frequency Setting................................................................................................ 14
HB Soft-Start Control via TCO .................................................................................................... 15
HB Active Burst Mode operation ................................................................................................ 16
HB Self-Adaptive Dead Time ............................................................................................................ 17
HB Protection Features .................................................................................................................... 18
HB Over-Current Protection Level 1 (OCP1)............................................................................... 18
HB Over-Current Protection Level 2 (OCP2)............................................................................... 18
HB Output Over-Voltage Protection ........................................................................................... 19
HB Capacitive Mode Protection.................................................................................................. 19
Other Protection Features .................................................................................................................... 20
External Over-Temperature Protection (OTP) ................................................................................ 20
ICL5102 Operation Flow Chart ................................................................................................ 22
5
Electrical Characteristics ....................................................................................................... 23
5.1
Package Characteristics ........................................................................................................................ 23
5.2
Absolute Maximum Ratings .................................................................................................................. 23
5.3
Operating Conditions ............................................................................................................................ 24
5.4
DC Electrical Characteristics ................................................................................................................. 25
5.4.1
Power Supply Characteristics .......................................................................................................... 25
5.4.2
PFC Stage Characteristics ................................................................................................................ 26
5.4.3
HB Stage Characteristics.................................................................................................................. 28
6
Package Dimensions .............................................................................................................. 32
Revision history............................................................................................................................. 33
Datasheet
3 of 34
V 1.1
2018-10-28
ICL5102 PFC + Resonant Half-Bridge Controller
2nd Generation
Pin Configuration and Description
1
Pin Configuration and Description
ICL5102 pin assignments and basic pin description are shown below in the Figure 2 and Table 1.
1
16
HSGD
LSCS
2
15
HSVCC
VCC
3
14
HSGND
GND
4
13
OVP
PFCGD
5
12
BO
PFCCS
6
11
OTP
PFCZCD
7
10
BM
PFCVS
8
9
RF
ICL5102
LSGD
PG-DSO-16 (150mil)
Figure 2
Pinning of ICL5102
Table 1
Pin Definitions and Functions
Name
Pin
Type
Function
LSGD
1
O
HB low side gate driver
Output for directly driving the HB low side MOSFET via a resistor
LSCS
2
I
HB current sense
Connected to an external shunt resistor and the source of the HB low side
MOSFET
VCC
3
I
Positive power supply
IC power supply
GND
4
-
Ground
IC Ground
PFCGD
5
O
PFC gate driver
Output for directly driving the PFC MOSFET via a resistor
PFCCS
6
I
PFC current sense
Connected to an external shunt resistor and the source of the PFC MOSFET
PFCZCD
7
I
PFC zero-crossing detection
Connected to the PFC auxiliary winding via a resistor for PFC inductor current
zero-crossing detection
PFCVS
8
I
PFC bus voltage sense
Connected to a high impedance resistor divider from the PFC controller output
for bus voltage sensing
RF
9
I
HB minimum switching frequency setting
Connected via an external resistor to GND for HB minimum switching frequency
setting
BM
10
I
Active Burst Mode (ABM) enter/exit switching frequency setting
Connected to an opto-coupler and to the RF pin with an external resistor for
ABM enter/exit switching frequency setting
Datasheet
4 of 34
V 1.1
2018-10-28
ICL5102 PFC + Resonant Half-Bridge Controller
2nd Generation
Pin Configuration and Description
Name
Pin
Type
Function
OTP
11
I
Over Temperature Protection (OTP)
Connected to an external Negative Temperature Coefficient thermistor (NTC)
for external over temperature protection
BO
12
I
Brown in/out detection
Connected to the rectified input voltage via an external resistor for input brown
in/out detection
OVP
13
I
Output Over Voltage Protection (OVP)
Connected to the HB auxiliary winding via a resistor divider and diode for OVP of
the secondary output voltage
HSGND
14
-
High side ground
Ground for floating high side driver of HB
HSVCC
15
I
High side VCC power supply
Power supply of the high side floating driver of HB, supplied via bootstrap
circuit
HSGD
16
O
High side floating gate driver
Output for directly driving the HB floating high side MOSFET via a resistor.
The ICL5102 pin connection schematic is shown in the following Figure 3:
VBUS
HS MOSFET
VBUS
RHSGD
LS MOSFET
RLSGD
VBUS
RPFCCS
6 PFCCS
LPFCsec
RZCD
7 PFCZCD
BO 12
DBO_1
VAC
DBO_2
OTP 11
CBO
RBM_DA
RBM
8 PFCVS
ROVP_1
RBO_1
ϑNTC
BM 10
DVcc
Sec
RPFCVS_1
5 PFCGD
ICL5102
PFC MOSFET
OVP 13
RBO_2
RPFCGD
4 GND
RVcc
BR_OUT
HSGND 14
ROVP_2
VBUS
3 VCC
Vcc
RHSVcc
CHSVcc
CVcc
RVcc
HSVCC 15
LAUX
2 LSCS
RLSCS
LPFC DPFC
HSGD 16
LSGD
DHSVcc
RPL
RStartup
1
RF 9
RRF
RPFCVS_2
Figure 3
Datasheet
PG-DSO-16 (150mil)
ICL5102 Pin Connection
5 of 34
V 1.1
2018-10-28
ICL5102 PFC + Resonant Half-Bridge Controller
2nd Generation
Functional Block Diagram
2
Functional Block Diagram
Figure 4
ICL5102 Functional Block Diagram
Datasheet
6 of 34
V 1.1
2018-10-28
ICL5102 PFC + Resonant Half-Bridge Controller
2nd Generation
Functional Description
3
Functional Description
Functional description section provides an overview of the integrated functions. It includes:
ICL5102 power up
Multi-mode PFC controller
Resonant HB controller
The parameters and equations are based on typical values at TA = 25 °C. The correlated minimum and maximum
values are shown in the electrical characteristics in chapter 5.
3.1
IC Power Up
ICL5102 has four power supply pins: VCC, GND, HSVCC and HSGND:
Normal start-up operation of ICL5102 requires a positive voltage at pin VCC higher than the turn-on
threshold VCC_on. After the ICL5102 is active, the Vcc voltage should remain between the VCC_on and VCC_off. Once
the voltage drops below VCC_off, under-voltage lock out (UVLO) will occur and IC operation is disabled.
HSVCC and HSGND power pins are the power supply for the integrated floating high side driver, usually
derived using an external boot strap circuit. The high side driver is active after the voltage between pin
HSVCC and HSGND is higher than the turn-on threshold VHSVCC_on. Once this voltage drops below VHSVCC_off in
the normal operation, the high side driver is disabled.
3.2
Multi-Mode PFC Controller
The PFC controller ensures high power quality by maximizing the power factor (PF) and minimizing Total
Harmonic Distortion (THD). It is designed in a boost topology to provide a constant high DC voltage for the HB
controller.
3.2.1
Control Scheme
During normal to heavy load conditions, PFC bus voltage regulation is achieved using CrCM with a constant ontime control. The PFC MOSFET on-time is proportional to the PFC output power and determined by the PFC
choke inductance LPFC, the input voltage Vin_rms, the applied PFC load PO_PFC and the PFC converter efficiency ηPFC.
This is given by:
𝑡𝑜𝑛_𝑃𝐹𝐶 =
2 ∗ 𝑃𝑂_𝑃𝐹𝐶 ∗ 𝐿𝑃𝐹𝐶
2
𝑉𝑖𝑛_𝑟𝑚𝑠
∗ ɳ𝑃𝐹𝐶
ICL5102 PFC controller has an integrated PI compensator which calculates the PFC on-time according to the
error between the value at PFCVS pin and the reference value V PFC_ref = 2.5 V. A notch filter before the
compensator filters out the double AC line frequency ripple in the bus voltage and stabilizes the controller loop.
To support light load condition, DCM is implemented for efficient operation.
Datasheet
7 of 34
V 1.1
2018-10-28
ICL5102 PFC + Resonant Half-Bridge Controller
2nd Generation
Functional Description
3.2.1.1
PFC Soft-start
After the voltage at pin VCC is higher than the threshold VCC_on, PFC controller will initiate a soft-start to
minimize the stress on the input filer, PFC MOSFET, PFC choke and diode when the following conditions are
fulfilled:
Brown-in: the voltage at Brown-Out pin (BO) must be higher than VBO_in = 1.4 V
PFC open-loop not detected: the voltage at pin PFCVS must be higher than VPFCVSUV2 = 12.5%*VPFC_ref = 0.31 V
PFC output over-voltage not detected: the voltage at pin PFCVS must be lower than VPFCVSUV2 = 105%* VPFC_ref =
2.63 V
Other protections (e.g. OTP or OVP) not present
ICL5102 PFC soft-start is implemented by increasing PFC MOSFET on-time from tPFC_on_initial to tPFC_on_max = 22 us
every 280 us. The initial PFC on-time tPFC_on_initial is dependent on the input voltage sensed at the BO pin. Once
the voltage at pin PFCVS reaches the threshold VPFC_UV2 = 95%* VPFC_ref = 2.375V, soft-start is completed. At this
time normal operation on-time control takes place via the integrated PI compensator.
3.2.1.2
PFC Multi-Mode Control
During CrCM operation of the PFC, the PFC MOSFET is turned on with a constant on-time throughout the
complete AC half cycle and the off-time is varying depending on the instantaneous value of the input AC voltage
amplitude. Therefore, the switching frequency is changing within each AC half cycle with the lowest switching
frequency at the peak of the AC input voltage and the highest switching frequency near the zero-crossings. As
shown in the Figure 5, a new switching cycle starts with a tiny delay after the inductor current reaches zero.
Figure 5
Switching Cycle of ICL5102 Critical Conduction Mode PFC
PFC CrCM is ideal for full and heavy load conditions, where the constant on-time is large. As load decreases
and/or the input AC input peak voltage increases towards the magnitude of the PFC output bus voltage, ontimes reduces (switching frequency increases), and PFC switching losses increase. This results in poor
efficiency at light load and/or high AC line conditions.
To help minimize switching losses during this condition and to optimize light load efficiency, the ICL5102 PFC
controller switches from CrCM to DCM mode. This transition occurs once the PFC MOSFET on-time reduces
below 1 us. In DCM operation, the switching frequency can be further reduced by skipping switching cycles
once the PFC inductor current reaches zero. As shown in the Figure 6, the inserted delay is the switching time
(from PFC gate on until the PFC inductor current decreases to zero) multiplied with an internal factor. Once the
PFC on-time increases to 4 us in the DCM operation, ICL5102 will switch back to CrCM. The transferred power is
Datasheet
8 of 34
V 1.1
2018-10-28
ICL5102 PFC + Resonant Half-Bridge Controller
2nd Generation
Functional Description
regulated both in CrCM and DCM operation. The on-time hysteresis between the two modes (overlapped area)
ensures the smooth mode change as shown in the Figure 7.
Figure 6
ICL5102 PFC Mode Change from CrCM to DCM
Figure 7
ICL5102 Operating Frequency and On-Time in CrCM and DCM
Datasheet
9 of 34
V 1.1
2018-10-28
ICL5102 PFC + Resonant Half-Bridge Controller
2nd Generation
Functional Description
3.2.1.3
PFC THD Correction
The input AC current becomes most distorted in the area when zero-crossings of AC input voltage occurs. In
order to ensure the sinusoidal current waveform in this area, the ICL5102 extends the PFC on-time dynamically
up to two times of PFC maximum on-time according to the instantaneous value of the input voltage amplitude.
The detection of AC input voltage zero-crossings is realized through the PFC auxiliary winding. When the
voltage across the PFC auxiliary winding after PFC MOSFET turns-off reaches the maximum value, AC zerocrossings is detected. The concept of THD correction is shown in the following Figure 8.
Figure 8
PFC THD Correction
3.2.2
PFC Bus voltage Sensing
The PFC output bus voltage is scaled down using a resistor divider and sensed at the pin PFCVS pin as shown in
the Figure 9. A good quality ceramic filter capacitor should be placed as close as possible at the pin to filter any
high frequency switching noise. This filter capacitor ensures no false PFC bus voltage protections are triggered
due to noise perturbations.
Figure 9
Datasheet
ICL5102 PFC Bus Voltage Sensing
10 of 34
V 1.1
2018-10-28
ICL5102 PFC + Resonant Half-Bridge Controller
2nd Generation
Functional Description
3.2.3
Input voltage sensing
As shown in the Figure 10, the AC input voltage is sensed at the BO pin with a resistor divider which scales
down the full wave rectified AC line voltage. A smooth capacitor CBO with a high ohmic resistor RBO1 are strongly
recommended direct after the full wave rectifier diodes so that the peak value of AC input voltage is sensed. As
the peak value of AC input voltage is not distorted when the input current is near zero (e.g. in case of brownout) compared to the RMS value.
Figure 10
ICL5102 Input Voltage Sensing
The voltage at the BO pin which represents the peak voltage of the AC input has feed-forward control on the
PFC converter.
It decides the initial on-time of the initial PFC soft-start.
In the light load condition, the PFC on-time is dependent on the input voltage.
The brown-in and brown-out are implemented by sensing the voltage at BO pin. The conditions are defined as
following:
Brown-in: the voltage at pin BO is higher than VBO_in = 1.4 V.
Brown-out: the voltage at pin BO is lower than VBO_out = 1.2 V in the normal operation.
3.2.4
PFC Inductor Peak Current limitation
The PFC inductor peak current through the PFC MOSFET is monitored via the PFC shunt resistor RPFCCS to limit
the maximum power through the PFC inductor, MOSFET and the freewheeling diode. Once the voltage across
the shunt resistor exceeds the over-current threshold VPFC_OCP1 = 1.0 V for longer than the blanking time
(including propagation delay) tPFC_OCP1_blanking = 200 ns, the PFC MOSFET is turned off immediately. The next PFC
switching cycle will be initialized on either PFC ZCD or maximum period time out. This peak current limitation is
active in every switching cycle.
3.2.5
PFC Protection features
Protections features are triggered if fault conditions are present longer than the blanking time. The controller
may continue operation after exceeding protection threshold because of blanking time as shown in Figure 11.
Datasheet
11 of 34
V 1.1
2018-10-28
ICL5102 PFC + Resonant Half-Bridge Controller
2nd Generation
Functional Description
Figure 11
Excess of threshold due to Blanking Time
3.2.5.1
PFC Bus Under-voltage Protection
PFC bus under-voltage is monitored at the PFCVS pin.
In the normal operation, the PFCVS pin voltage is sensed and compared to the under-voltage threshold VPFC_UV1
= 75%* VPFC_ref = 1.88 V. Once the pin voltage is below this threshold for longer than the blanking time, PFC stops
switching and ICL5102 will enter auto-restart.
3.2.5.2
PFC Bus Over-voltage Protection Level 1
PFC bus over-voltage level 1 is monitored at the PFCVS pin.
The PFCVS pin voltage is sensed and compared to the over-voltage threshold VPFC_OV1 = 109%* VPFC_ref = 2.73 V.
Once the pin voltage is above this threshold, PFC will stop switching within 5 us. As long as the pin voltage
drops below VPFC_OV = 105%* VPFC_ref = 2.63 V, PFC resumes operation.
3.2.5.3
PFC Bus Over-voltage Protection Level 2
PFC bus over-voltage level 2 is monitored at the PFCVS pin.
The PFCVS pin voltage is sensed and compared to the over-voltage threshold VPFC_OV2 = 115%* VPFC_ref = 2.88 V.
Once the pin voltage is above this threshold for longer than the blanking time, both PFC and HB stop switching
and ICL5102 will enter auto-restart.
3.2.5.4
PFC Open Control Loop Protection
PFC control loop open is monitored at the PFCVS pin.
The PFCVS pin voltage is sensed and compared to the over-voltage threshold VPFC_UV2 = 12.5%* VPFC_ref = 0.31 V.
In the normal operation, once the pin voltage is below this threshold for longer than the blanking time, both
PFC and HB stop switching and ICL5102 will enter auto-restart.
In the IC power up phase, if the pin voltage is below this threshold, ICL5102 will not start-up.
3.2.5.5
PFC Inductor Over-current Protection
PFC inductor over-current is monitored at the PFCCS pin.
The voltage across the PFC current sense shunt resistor is sensed at the PFCCS pin and compared to the overcurrent threshold VPFC_OCP1 = 1.0 V. Once the pin voltage is above this threshold for longer than the blanking time
tPFC_OCP1_blanking = 200 ns, the PFC MOSFET is turned off in the current switching cycle.
Datasheet
12 of 34
V 1.1
2018-10-28
ICL5102 PFC + Resonant Half-Bridge Controller
2nd Generation
Functional Description
3.2.5.6
Input Brown-out Protection
Input brown-out is monitored at the BO pin.
The BO pin voltage is sensed and compared to the brown-out threshold VBO_out = 1.2V.
In the normal operation, once the pin voltage is below this threshold for longer than the blanking time
tblanking_BO = 50ms, both PFC and HB stop switching and ICL5102 will enter auto-restart. Once the pin voltage is
higher than VBO_in = 1.4V, normal operation starts (brown-in).
In the IC power up phase, if the pin voltage is below this threshold, ICL5102 will not start-up.
3.3
Resonant Half-Bridge Controller
Resonant Half-Bridge (HB) topologies reduce losses and switching noise in the converter compared to
traditional “Hard Switching” topologies. This is accomplished by soft commutation in a sinusoidal manner and
zero voltage switching (ZVS) of HB MOSFETs.
Soft commutation of the power devices allows for increased converter operating switching frequency and
smaller sizes of the passive components such as transformers and filters. ICL5102 provides the independent
control of resonant HB (e.g. LLC or LCC) for constant voltage (CV) or constant current (CC) output. It supports
both fixed and variable switching frequency control.
3.3.1
Control Scheme
The ICL5102 resonant HB control is realized through a TCO (Time Controlled Oscillator) in the soft-start phase
and a current controlled oscillator (CCO) in the regulated normal operation. During light load operation the
ICL5102 will enter Active Burst Mode (ABM) to maximize light-load efficiency. This is described as following:
HB switching frequency control via the Current Controlled Oscillator (CCO)
HB controller frequency setting
Soft-start control via a Time Controlled Oscillator (TCO)
HB Active Burst Mode (ABM) operation
3.3.1.1
HB Frequency Control via CCO
During normal operation, ICL5102 HB controller uses CCO to determine the switching frequency. The switching
frequency is determined by current IRF that flows out of the RF pin. The RF pin maintains a constant voltage of
VRF = 2.5 V. This voltage together with the voltage at pin VBM, resistors RBM and RRF, and the opto-coupler define
the current flowing out of the RF pin as shown in the following formula and Figure 12:
𝐼𝑅𝐹 = 𝐼1 + 𝐼2 = 𝐼𝐵𝑀 + 𝐼𝑂𝑃 +
Figure 12
Datasheet
𝑉𝑅𝐹
𝑅𝑅𝐹
ICL5102 RF Pin Current Definition
13 of 34
V 1.1
2018-10-28
ICL5102 PFC + Resonant Half-Bridge Controller
2nd Generation
Functional Description
The CCO of ICL5102 HB controller is defined linearly with the constant slew rate CFC as shown in Figure 13:
𝐶𝐹𝐶 = 400 𝐾𝐻𝑧/𝑚𝐴
Figure 13
CCO of ICL5102 in Normal Operation
3.3.1.2
HB Controller Frequency Setting
Both TCO and CCO of ICL5102HV operate based on the defined minimum and maximum HB operating
frequency.
Minimum HB operating frequency fHB_min:
It is defined in the HB resonant tank calculation to prevent HB operation in the capacitive region where
reverse gain occurs and HB MOSFETs ZVS is lost. ICL5102 HB controller operates with fHB_min if the minimum
current IRF_min flows out of the RF pin according to the CCO:
𝑓𝐻𝐵_𝑚𝑖𝑛 = 𝐶𝐹𝐶 ∗ 𝐼𝑅𝐹_𝑚𝑖𝑛
This minimum current occurs when the opto-coupler is off IOP = 0 and the voltage of the pin is clamped at
VBM_max = 2.25 V:
𝑉𝑅𝐹 𝑉𝑅𝐹 − 𝑉𝐵𝑀_𝑚𝑎𝑥
𝐼𝑅𝐹_𝑚𝑖𝑛 =
+
𝑅𝑅𝐹
𝑅𝐵𝑀
Maximum HB operating frequency fHB_max:
ICL5102 HB controller increases the HB operating frequency as the output load reduces. However above the
maximum operating frequency fHB_max the output power cannot be reduced furthermore and HB controller
enters ABM. According to the CCO, fHB_max is defined with the maximum current IFR_max:
𝑓𝐻𝐵_𝑚𝑎𝑥 = 𝐶𝐹𝐶 ∗ 𝐼𝑅𝐹_𝑚𝑎𝑥
ICL5102 enters ABM when the voltage at BM pin is VBM_entry = 0.75V:
𝑉𝑅𝐹 𝑉𝑅𝐹 − 𝑉𝐵𝑀_𝑒𝑛𝑡𝑟𝑦
𝐼𝑅𝐹_𝑚𝑎𝑥 =
+
𝑅𝑅𝐹
𝑅𝐵𝑀
The minimum and maximum HB operating frequencies must fulfill the following condition:
𝑓𝐻𝐵_𝑚𝑎𝑥 < 7 ∗ 𝑓𝐻𝐵_𝑚𝑖𝑛
Both minimum and maximum HB operating frequencies are set together by the external resistors RBM and RRF as
shown in the Figure 12.
Datasheet
14 of 34
V 1.1
2018-10-28
ICL5102 PFC + Resonant Half-Bridge Controller
2nd Generation
Functional Description
3.3.1.3
HB Soft-Start Control via TCO
ICL5102 HB controller initializes a soft-start at power up after the bus voltage reaches 75% of nominal value
(when the VSPFC pin reaches the VPFC_UV1 = 75%*VPFC_ref = 1.88 V). During soft-start, the HB switching frequency
reduces with respect to the elapsed time (time controlled oscillator), which is shown in Figure 14:
Figure 14
TCO for Half-Bridge Soft-start
The complete HB soft-start takes maximum 7 ms and is divided into three time phases in which the frequency
reduction has different slew rate:
Soft-start phase I
o
The maximum duration of soft-start phase I is tHB_SS1 = 624 us.
o
The HB soft-start phase I begins with the switching frequency fHB_ss0, which is defined as:
𝑓𝐻𝐵_𝑠𝑠0 = 4 ∗ (𝑓𝑚𝑎𝑥 − 𝑓𝑚𝑖𝑛 ) + 𝑓𝑚𝑖𝑛
o
The maximum possible soft-start start frequency is fHB_ss_start_max = 1300 KHz.
o
The HB soft-start phase I ends with the switching frequency fHB_ss1, which is defines as:
𝑓𝐻𝐵_𝑠𝑠1 = 2.6 ∗ (𝑓𝑚𝑎𝑥 − 𝑓𝑚𝑖𝑛 ) + 𝑓𝑚𝑖𝑛
Soft-start phase II
o
The maximum duration of soft-start phase II is tHB_SS2 = 2.5 ms.
o
The HB soft-start phase II begins with the switching frequency fHB_ss1.
o
The HB soft-start phase II ends with the maximum switching frequency fHB_max.
Soft-start phase III
o
The maximum duration of soft-start phase III is tHB_SS3 = 3.75 ms.
o
The HB soft-start phase III begins with the switching frequency fHB_max.
o
The HB soft-start phase III ends with the minimum switching frequency fHB_min.
The voltage at the BM pin is clamped to 0.75 V during soft-start phase I and phase II. Therefore the current
flowing out of the RF pin is constant and the HB switching frequency is only determined by the TCO.
In the soft-start phase III, the voltage at BM pin is ramped up from 0.75 V to 2.25 V and the current flowing out of
the RF pin reduces accordingly. In the meantime, as the secondary side output voltage approaches the target
value, the current flowing through the opto-coupler primary side begins to increase. Once the current through
Datasheet
15 of 34
V 1.1
2018-10-28
ICL5102 PFC + Resonant Half-Bridge Controller
2nd Generation
Functional Description
opto-coupler IOP is equal to the current I1 through the resistor RBM so that the current IBM = 0 (see Figure 12), the
soft-start is terminated and the CCO will takes over the control from the TCO.
During soft-start operation, if the voltage at the LSCS pin is greater than the threshold 0.8V, the HB controller
will stop reducing the switching frequency. The switching frequency reduction resumes once the voltage drops
below the threshold.
3.3.1.4
HB Active Burst Mode operation
ICL5102 HB controller will enter the ABM as the transferred power to output is greater than the output load
demands although the HB is operated at the maximum switching frequency fHB_max. Entering ABM allows
converter to increase light-load efficiency which ensures the lower standby input power.
Figure 15
HB ABM Control
As shown in the Figure 15, the ABM control is implemented by the sensing the voltage VBM at pin BM:
ABM entry:
During normal operation, once the BM pin voltage is lower than VHB_BM_Entry = 0.75V for longer than
VHB_BM_Entry_blanking = 10ms, ICL5102 will first initialize a soft-off by increasing the HB switching frequency from
fHB_max to fHB_BM. After fHB_BM is reached, both PFC and HB switching are stopped and ICL5102 is in sleep mode.
4
𝑓𝐻𝐵_𝐵𝑀 = ∗ (𝑓𝑚𝑎𝑥 − 𝑓𝑚𝑖𝑛 ) + 𝑓𝑚𝑖𝑛
3
ABM burst-on:
During sleep mode, the BM pin voltage VBM increases as the output voltage drops. ICL5102 will activate both
PFC and HB stages once VBM = 2.25V is reached.
The ICL5102 HB controller turns on with a switching frequency of fHB_BM and steadily decreases it to fHB_max to
initialize a soft-on. After soft-on, the switching frequency continues to decrease until the ABM power
limitation is active.
ABM power limitation:
Datasheet
16 of 34
V 1.1
2018-10-28
ICL5102 PFC + Resonant Half-Bridge Controller
2nd Generation
Functional Description
The ICL5102 activates power limitation in the ABM burst-on phase once the switching frequency fHB_PL is
reached. The transferred power in ABM can be adjusted through the resistor RPL from LSCS pin to the HB low
side MOSFET source as shown in the Figure 16. In the ABM power limitation phase, the HB switching
frequency is maintained around fHB_PL.
Figure 16
ICL5102 Burst Mode Power Limitation
ABM burst-off:
Once current flowing through the opto-coupler (as output voltage increasing) is equal to the current I1
through the resistor RBM which means IBM = 0 (see Figure 12), soft-off operation is initialized by increasing the
HB switching frequency to fHB_BM. After fHB_BM is reached, both PFC and HB stages stop switching and ICL5102
enter the sleep mode.
ABM exit:
ICL5102 will exit the ABM under 4 different conditions:
o
During ABM burst-off:
If a sudden output load-step increase occurs during the burst-off phase (sleep mode) the
voltage at BM pin will increase abruptly. If VBM increases from 2.0 V to 2.25 V within 400 us,
ICL5102 will exit the ABM.
o
During ABM burst-on when power limitation is active:
When the ICL5102 is in the burst-on phase and power limitation is active, the voltage at BM pin
is clamped, and cannot change quickly. Once the voltage change (increasing) ∆VBM = + 100 mV
within 8 HB switching cycles, an output load step is detected and ICL5102 will exit ABM.
o
During ABM burst-on when power limitation is active:
Once the ABM burst-on duration is longer than 10 ms, which means that a static load at output
consumes more power than the ABM power limitation level, ICL5102 will exit the ABM.
o
During ABM burst-on when power limitation is active:
Once the ABM burst-on duration is 2 times longer than the burst-off duration, which means a
higher load at output and the ABM is not efficient enough. ICL5102 will exit the ABM.
To disable the HB ABM operation, a resistor between the BM pin and the opto-coupler should be added to
prevent the voltage at BM pin to reduce below 0.75 V.
3.3.2
HB Self-Adaptive Dead Time
The dead time between ICL5102 HB low side (LS) and high side (HS) gate driver turn-on signals is self-adaptive.
The typical range of the dead time adjustment is between 250 and 750 ns. The dead time is measured after the
HS gate driver is turned off until the voltage at pin LSCS drops below -50 mV. This time is then used for the dead
time between LS and HS as shown in the Figure 17.
Datasheet
17 of 34
V 1.1
2018-10-28
ICL5102 PFC + Resonant Half-Bridge Controller
2nd Generation
Functional Description
Figure 17
HB Self-Adaptive Dead Time
3.3.3
HB Protection Features
3.3.3.1
HB Over-Current Protection Level 1 (OCP1)
HB over-current level 1 is monitored at the LSCS pin.
The voltage across the HB LSCS shunt resistor is sensed at the LSCS pin during the HB low side gate driver
turning-on and compared to the over-current threshold VHB_OCP1 = 0.8 V. Once the voltage exceeds this threshold,
the controller will increase the HB switching frequency cycle by cycle till the maximum switching frequency
fHB_maxis reached. If a HB over-current event occurs (HB OCP1) beyond the blanking time tHB_OCP1_blanking = 50ms,
ICL5102 will enter auto-restart.
Figure 18
HB Over-current Protection Level 1
3.3.3.2
HB Over-Current Protection Level 2 (OCP2)
HB over-current level 2 is monitored at the LSCS pin.
Datasheet
18 of 34
V 1.1
2018-10-28
ICL5102 PFC + Resonant Half-Bridge Controller
2nd Generation
Functional Description
The voltage across the HB low side current sense shunt resistor is sensed at the LSCS pin during the HB low side
gate driver turning-on and compared to the over-current threshold VHB_OCP2 = 1.6 V. Once the voltage exceeds
this threshold for longer than the blanking time tHB_OCP2_blanking = 500ns, both PFC and HB stop switching and
ICL5102 will enter auto-restart.
3.3.3.3
HB Output Over-Voltage Protection
HB output over-voltage is monitored at the OVP pin.
ICL5102 provides an independent OVP pin for the output-over voltage protection. This pin should be connected
to the auxiliary winding of the HB transformer as shown in the Figure 19 below:
Figure 19
HB Output OVP Detection Circuit
A resistor divider scales down the auxiliary winding voltage, allowing for auxiliary voltage sensing and OVP
protection. Once the voltage at OVP pin VOVP is higher than VOVP_ref = 2.5 V for longer than tHB_OVP_blank = 5 us, both
PFC and HB stages stop switching and ICL5102 enters auto-restart.
3.3.3.4
HB Capacitive Mode Protection
The designed impedance of the resonant network is inductive when the minimum HB switching frequency is
above the peak gain frequency. Once the HB switching frequency is below the peak gain frequency, the
impedance of the resonant network becomes capacitive and the HB converter enters capacitive mode.
Capacitive mode occurs most often due to low input voltage to the HB resonant converter, or during an
overload condition on the HB output (shorted or overloaded).
ICL5102 detects the capacitive mode operation by monitoring the LSCS pin:
Figure 20
Datasheet
HB Capacitive Mode Detection
19 of 34
V 1.1
2018-10-28
ICL5102 PFC + Resonant Half-Bridge Controller
2nd Generation
Functional Description
As shown in the Figure 20, once the voltage at the LSCS pin is greater than 1.6 V during turn-on of the HS gate
driver or drops below -50 mV in the second half of LSGD on-time or during the dead time between LS and HS,
capacitive mode operation is detected.
ICL5102 is able to provide the cycle by cycle frequency control for capacitive mode regulation. This is activated
if the LSCS pin voltage is higher than +50 mV within the first 7% of LSGD on-time. The HB controller will increase
the frequency cycle by cycle till the +50 mV crossing of the LSCS pin voltage shifts behind the 7% threshold as
shown in the Figure 21.
Figure 21
HB Capacitive Mode Regulation
If the capacitive mode operation is detected longer than 620 us despite the capacitive mode control, ICl5102
will enter auto-restart.
3.4
Other Protection Features
3.4.1
External Over-Temperature Protection (OTP)
External temperature is sensed at the OTP pin via an external NTC resistor from OTP pin to GND.
The source current out of the OTP pin is IOTP = 100 uA. The current generates a voltage drop on the connected
NTC. Once the voltage at the OTP pin decreases below VOTP_off = 625 mV longer than the blanking time tOTP_blanking
= 620 us in the normal operation, both PFC and HB stages stop switching and ICL5102 will enter auto-restart.
PFC and HB operations recover after the voltage at the OTP pin is higher than VOTP_start = 703 mV for longer than
tOTP_blanking. This is shown in the Figure 22.
It is recommended to place good quality ceramic capacitor close to the OTP pin to prevent noise from falsely
triggering OTP protection.
To disable the External OTP, a resistor can be added at the OTP pin instead of the NTC to hold the voltage
always higher than VOTP_start = 703 mV.
Datasheet
20 of 34
V 1.1
2018-10-28
ICL5102 PFC + Resonant Half-Bridge Controller
2nd Generation
Functional Description
Figure 22
Datasheet
External Over-Temperature Protection
21 of 34
V 1.1
2018-10-28
ICL5102 PFC + Resonant Half-Bridge Controller
2nd Generation
ICL5102 Operation Flow Chart
4
ICL5102 Operation Flow Chart
Operating FLOW Chart ICL5102
VCC Clamp OFF
UVLO
VCC < 9.0V
Vcc < 9.0V
Icc < 90µA
VCC Clamp ON when VCC > 16.3V
VCC < 16.3V
VBO < 1.4V
VBUS < 12,5%
VBUS > 105%
OTP / OVP
Monitoring
9.0V < Vcc < 16.3V
Icc < 100µA
Power-up
Gate Drives off
9.0V < VCC < 16.3V
Icc approx 4.0mA
VCC Clamp ON
VCC Clamp OFF
Start-up
VBUS < 75%
VBO < 1.2V
OVP / OTP
PFC Gate ON
Inverter Gates OFF
9.0V < Vcc < 16.3V
Fault
t = 500ms
Exempt BO
Softstart
Inverter Gates ON
9.0V < Vcc < 16.3V
fSoftStart = fSSx
Full Protection
16.3V> Vcc > 9.0V
Gate Drives off
POWER Down
AUTO RESTART
Run
9.0 V < Vcc < 16.3V
f = fRUN
Full Protection
VBM < 0.75V
t = 10ms
t > 620µs:
OTP / CapLoad
t > 5.0µs:
OVP
VLSCS > 1.6V
t > 1.0µs
VCC < 9.0V
BM
ENTRY
BM Sleep
BM EXIT 1 - 4
Full Protection:
t > 50ms:
VBO < 1.2V
VPFC > 115%
VLSCS > 0.8V
t > 620µs:
OTP / CapLoad
t > 5.0µs:
OVP
VLSCS > 1.6V
t > 1.0µs
VCC < 9.0V
OVP
VCC < 9.0V
0.25 < VBM < 2.2V
All Gates OFF
IBM = xxx µA
VBM = 2.2V
IBM = 0µA
BM Pulse
VBUS < 12.5%
VBUS > 109%
VBM < 2.2V
fBM = fRUN (stored)
Full Protection
EXIT 1 bis
EXIT 4
Figure 23
Datasheet
ICL5102 Operation Flow Chart
22 of 34
V 1.1
2018-10-28
ICL5102 PFC + Resonant Half-Bridge Controller
2nd Generation
Electrical Characteristics
5
Electrical Characteristics
Note:
All voltages except the high-side signals are measured with respect to GND (pin 4). The high-side
voltages are measured with respect to HSGND (pin 14). The voltage levels are valid if other ratings
are not violated.
5.1
Package Characteristics
Table 2
Package Characteristics
Parameter
Symbol
Limit Values
Min.
Max.
Unit
Remarks
PG-DSO-16 @ TA = 85°C &
PCB Area > 30x20mm
Thermal resistance for PGDSO-16
RthJA
—
119
K/W
Creepage distance HSGND
vs OVP pin
DCRHS
0.86
—
mm
5.2
Absolute Maximum Ratings
Note:
Absolute maximum ratings (Table 3) are defined as ratings which when being exceeded may lead
to destruction of the integrated circuit. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability. Maximum ratings are absolute ratings; exceeding
only one of these values may cause irreversible damage to the integrated circuit. These values are
not tested during production test.
Table 3
Absolute Maximum Ratings
Parameter
Symbol
Limit Values
Min.
Max.
Unit
Remarks
LSCS pin Voltage
VLSCS
-5
6
V
LSCS pin Current
ILSCS
-3
3
mA
LSGD pin Voltage
VLSGD
- 0.3
VCC+0.3
V
Internally clamped to 11V
LSGD pin peak source current
ILSGD_O_max
- 75
5
mA
< 500 ns
LSGD pin peak sink current
ILSGD_I_max
- 50
400
mA
< 100 ns
Voltage externally supplied to pin
VCC
VVcc
- 0.3
18.5
V
Vcc pin internal zener diode
clamp current
IVCC_clamp
-5
5
mA
PFCGD pin voltage
VPFCGD
- 0.3
VCC+0.3
V
Internally clamped to 11V
PFCGD pin peak source current
IPFCGD_O_max
- 150
5
mA
< 500 ns
PFCGD pin peak sink current
IPFCGD_I_max
- 100
700
mA
< 100 ns
PFCCS pin voltage
VPFCCS
-5
6
V
PFCCS pin current
IPFCCS
-3
3
mA
PFCZCD pin voltage
VPFCZCD
-3
6
V
Datasheet
23 of 34
V 1.1
2018-10-28
ICL5102 PFC + Resonant Half-Bridge Controller
2nd Generation
Electrical Characteristics
Parameter
Symbol
Limit Values
Min.
Max.
Unit
Remarks
PFCZCD pin current
IPFCZCD
-5
5
mA
PFCVS pin voltage
VPFCVS
- 0.3
5.3
V
RF pin voltage
VRF
- 0.3
5.3
V
OTP pin voltage
VOTP
- 0.3
5.3
V
OVP pin voltage
VOVP
- 0.3
5.3
V
BM pin voltage
VBM
- 0.3
5.3
V
BO pin Voltage
VBO
- 0.3
5.3
V
HSGND pin voltage
VHSGND
- 650
650
V
HSGND pin voltage transient
dVHSGND /dt
- 40
40
V/ns
Voltage externally supplied to pin
HSVCC
VHSVcc
- 0.3
18.0
V
Referred to HSGND
HSGD pin voltage
VHSGD
- 0.3
VHSVCC+0.3
V
Internally clamped to 11V
HSGD pin peak source current
IHSGD_O_max
- 75
0
mA
< 500 ns
HSGD pin peak sink current
IHSGD_I_max
0
400
mA
< 100 ns
Junction temperature
TJ
- 40
150
°C
Storage temperature
TS
- 55
150
°C
Total IC power dissipation
PTOT
—
1
W
PG-DSO-16 / Tamb=25°C
Soldering temperature
TSOLD
—
260
°C
Wave Soldering2
Latch-up capability
ILU
—
150
mA
Pin voltages acc. to abs.
maximum ratings3
ESD Capability HBM
VESD_HBM
—
2
kV
Human Body Model4
ESD Capability CDM
VESD_CDM
—
500
V
Charged Device Model5
5.3
Referring to GND1
Operating Conditions
The recommended operating conditions are shown for which the DC Electrical Characteristics are valid.
Table 4
Operating Range
Parameter
Voltage externally supplied to pin
HSVCC
Symbol
VHSVcc
Limit Values
Min.
Max.
7.9
17.5
Unit
Remarks
V
Referring to HSGND
Limitation due to creepage distance between the high side and low side pins (CTT 900V inside)
According to JESD22-A111 Rev A
3
Latch-up capability according to JEDEC JESD78D, TA= 85°C
4
ESD-HBM according to ANSI/ESDA/JEDEC JS-001-2012
5
ESD-CDM according to JESD22-C101F
Datasheet
24 of 34
1
2
V 1.1
2018-10-28
ICL5102 PFC + Resonant Half-Bridge Controller
2nd Generation
Electrical Characteristics
Parameter
Symbol
Limit Values
Min.
Max.
Unit
Remarks
HSGND pin voltage
VHSGND
- 650
650
V
Referring to GND1
External supplied VCC
VVcc
8.5
17.5
V
TJ = 25°C
External supplied VCC
VVcc
8.5
18.0
V
TJ = 125°C
LSCS pin voltage
VLSCS
-4
5
V
In active mode
PFCVS pin voltage
VPFCVS
0
4
V
PFCCS pin voltage
VPFCCS
-4
5
V
In active mode
PFCZCD pin voltage
IPFCZCD
-3
3
mA
In active mode
OVP pin voltage
VOVP
0
2.5
V
Junction temperature
TJ
- 40
125
°C
Adjustable HB switching
frequency
fHB
20
500
kHz
@ Tj_max = 125°C / TA = - 40°C
HB Soft-start switching frequency
fHB_SS_max
-
1300
kHz
@ Soft Start
AC mains input frequency
fAC
45
65
Hz
For notch filter
5.4
DC Electrical Characteristics
Note:
The electrical characteristics involve the spread of values given within the specified supply voltage
and junction temperature range TJ from -40 °C to 125 °C. Typical values represent the median
values, which are given in reference to 25 °C. If not otherwise stated, a supply voltage of 15 V and
VHSVCC = 15 V is assumed and the IC operates in active mode. Furthermore, all voltages refer to GND
if not otherwise mentioned.
5.4.1
Power Supply Characteristics
Table 5
Operating Range
Parameter
Symbol
Limit Values
Min.
Typ.
Max.
Unit
Remarks
Vcc Quiescent supply Current 1
IVcc_QU1
—
70
120
µA
VVcc = 8.0V
Vcc Quiescent supply Current 2
IVcc_QU2
—
4.0
5.8
mA
VPFCVS > 2.725V
Vcc supply current in sleep
mode
IVcc_sleep
—
100
160
µA
Vcc turn-on threshold
VVcc_On
15.4
16.0
16.6
V
Vcc turn-off threshold
VVcc_Off
8.5
9.0
9.5
V
Vcc on-off hysteresis
VVcc_Hys
6.7
7.0
7.4
V
Vcc internal clamping voltage
VVcc_Clamp
15.4
16.3
16.6
V
IVcc = 2mA
Vcc internal clamping current
IVcc_clamp
3
—
6
mA
VVcc = 18V
High side leakage current
IHSGND_leak
—
0.01
2.0
µA
VHSGND = 650V, VGND = 0V
HSVcc Quiescent supply
Current 1
IHSVcc_QU1
—
190
280
µA
VHSVcc = 8.0V
HSVcc Quiescent supply
IHSVcc_QU2
—
0.65
1.2
mA
VHSVcc > VHSVcc_On
Datasheet
25 of 34
V 1.1
2018-10-28
ICL5102 PFC + Resonant Half-Bridge Controller
2nd Generation
Electrical Characteristics
Parameter
Symbol
Limit Values
Min.
Typ.
Max.
Unit
Remarks
Current 2
HSVcc turn-on threshold
VHSVcc_On
9.55
10.3
11
V
1
HSVcc turn-off threshold
VHSVcc_Off
7.9
8.6
9.3
V
1
HSVcc on-off hysteresis
VHSVcc_Hy
1.4
1.7
2.1
V
1
Unit
Remarks
5.4.2
PFC Stage Characteristics
Table 6
Electrical Characteristics of the PFCGD Pin
Parameter
Symbol
Limit Values
PFCGD low voltage
VPFCGDL
PFCGD high voltage
VPFCGDH
PFCGD active shut down
VPFCGDLASD
Min.
0.40
0.40
- 0.20
10.0
7.5
7.0
0.40
PFCGD UVLO shut down
VPFCGDLUVLO
0.30
1.00
1.60
V
IPFCGD = 5mA / VVCC=2V
PFCGD peak source current
IPFCGDSO
—
- 100
—
mA
3+4
PFCGD peak sink current
IPFCGDSI
—
500
—
mA
2+3
PFCGD voltage during sink
current
VPFCGDHS
10.8
11.7
12.3
V
IPFCGD = 3mA
PFCGD rise time
tPFCGDR
125
275
580
ns
2V > VLSGD < 8V 2
PFCGD fall time
tPFCGDF
20
45
72
ns
8V > VLSGD > 2V 2
Table 7
PFC OCP1 comparator
reference voltage
2
3
Max.
0.92
1.12
0.62
11.6
—
—
1.12
V
V
V
V
V
V
V
IPFCGD = 5mA
IPFCGD = 20mA
IPFCGD = -20mA
IPFCGD = -20mA
IPFCGD = -1mA / VVCC2
IPFCGD = -5mA / VVCC1
IPFCGD = 20mA / VVCC=5V
Electrical Characteristics of the PFCCS Pin
Parameter
1
Typ.
0.70
0.75
0.30
11.0
—
—
0.75
Symbol
VPFC_OCP1
Limit Values
Unit
Min.
Typ.
Max.
0.95
1.0
1.05
Remarks
V
Referring to high-side ground (HSGND)
VVcc = VVcc_off + 0.3V
RLoad = 4Ω and CLoad = 3.3nF
This parameter is no subject to production testing – verified by design / characterization
Datasheet
26 of 34
4
V 1.1
2018-10-28
ICL5102 PFC + Resonant Half-Bridge Controller
2nd Generation
Electrical Characteristics
Parameter
Symbol
Limit Values
Unit
Min.
Typ.
Max.
Remarks
PFC OCP1 blanking time (incl.
prorogation delay)
tPFC_OCP1_blanking
140
200
260
ns
Leading-edge blanking
tPFC_LEB
180
250
320
ns
Pulse width when VPFCCS
> 1.0V
PFCCS pin bias current
IPFCCSBIAS
- 0.5
—
0.5
µA
VPFCCS = 1.5V
Table 8
Electrical Characteristics of the PFCZCD Pin
Parameter
Symbol
Limit Values
Unit
Min.
Typ.
Max.
Remarks
ZCD reset threshold
VPFCZCDTHRH
1.4
1.5
1.6
V
ZCD threshold
VPFCZCDTHRL
0.4
0.5
0.6
V
ZCD hysteresis
VPFCZCDHY
—
1.0
—
V
Input voltage positive clamping
level
VPFCZCDCLAMPH 4.1
4.6
5.10
V
IPFCZCD = 2mA
Input voltage negative
clamping level
VPFCZCDCLAMPL
- 1.70
- 1.4
- 1.0
V
IPFCZCD = - 2mA
PFCZCD pin bias current, high
IPFCZCDBIASH
- 0.5
—
5.0
µA
VPFCZCD = 1.5V
PFCZCD pin bias current, low
IPFCZCDBIASL
- 0.5
—
0.5
µA
VPFCZCD = 0.5V
Ringing suppression-time
tPFCZCDRING
350
500
650
ns
Limit value for ON-time
extension
Δt x IZCD
400
600
670
pC
Table 9
Electrical Characteristics of the PFCVS Pin
Parameter
Symbol
Limit Values
Unit
Min.
Typ.
Max.
Remarks
PFCVS pin reference voltage
VPFCVS_ref
2.46
2.50
2.54
V
PFC OVP level 2 threshold (115%
VPFCVS_ref)
VPFCVSOV2
2.82
2.88
2.93
V
PFC and HB OFF
PFC OVP level 1 threshold
(109% VPFCVS_ref)
VPFCVSOV1
2.67
2.73
2.78
V
PFC OFF
PFC OVP recovery threshold
(105% VPFCVS_ref)
VPFCVSOVR
2.56
2.63
2.68
V
PFC OVP hysteresis
VPFCVSOVHY
70
100
130
mV
PFC UVP threshold (75% VPFCVS_ref)
VPFCVSUV1
1.83
1.88
1.92
V
PFC open loop threshold(12.5%
VPFCVS_ref)
VPFCVSUV2
0.237
0.31
0.387
V
PFCVS pin bias current
IPFCVSBIAS
- 1.0
—
1.0
µA
Datasheet
27 of 34
4 % rated bus voltage
VPFCVS = 2.5V
V 1.1
2018-10-28
ICL5102 PFC + Resonant Half-Bridge Controller
2nd Generation
Electrical Characteristics
Table 10
PFC PWM Generation
Parameter
Symbol
Limit Values
Min.
Typ.
Max.
Unit
Remarks
PFC initial on-time in soft-start
tPFC_on_initial
1.75
6.0
10.64
µs
VPFCZCD = 0V, VBO = 2.0V
PFC maximum on-time
tPFC_on_max
—
—
26
µs
VACIN = 90V
PFC minimum on-time in CrCM
operation
tPFC_on_min
1.0
—
—
µs
PFC repetition-time
tPFC_rep
47
52
60
µs
PFC maximum off-time
tPFC_off
—
—
52.5
µs
5.4.3
HB Stage Characteristics
Table 11
Electrical Characteristics of the LSGD Pin
Parameter
Symbol
Limit Values
VPFCZCD = 0V
Unit
Remarks
Min.
0.40
0.40
- 0.30
10.0
7.5
7.0
Typ.
0.70
0.80
0.20
10.8
—
—
Max.
1.00
1.20
0.53
11.6
—
—
V
V
V
V
V
V
LSGD low voltage
VLSGDL
LSGD high voltage
VLSGDH
LSGD active shut down
VLSGDLASD
0.4
0.75
1.12
V
ILSGD = 5 mA
ILSGD = 20 mA
ILSGD = - 20 mA
ILSGD = - 20 mA
ILSGD = –1 mA1
ILSGD = –5 mA2
ILSGD = 20 mA / VCC = 5V
LSGD UVLO shut down
VLSGDLUVLO
0.3
1.0
1.6
V
ILSGD = 5 mA / VCC = 2 V
LSGD peak source current
ILSGDSO
—
- 50
—
mA
2+3
LSGD peak sink current
ILSGDSI
—
300
—
mA
1+2
LSGD voltage during sink
current
VLSGDHS
—
11.7
—
V
ILSGD = 3 mA
LSGD rise time
tLSGDR
125
275
580
ns
2 V < VLSGD < 8 V 1
LSGD fall time
tLSGDF
20
35
60
ns
8 V > VLSGD > 2 V 1
Unit
Remarks
Table 12
Electrical Characteristics of the LSCS Pin
Parameter
HB over-current protection
level 2
1
VCC = VCCOFF + 0.3 V
2
Load: RLoad = 10 Ω and CLoad = 1 nF
Symbol
VHB_OCP2
Limit Values
Min.
Typ.
Max.
1.54
1.6
1.66
The parameter is not subject to production testing – verified by design/characterization
Datasheet
28 of 34
V
3
V 1.1
2018-10-28
ICL5102 PFC + Resonant Half-Bridge Controller
2nd Generation
Electrical Characteristics
Parameter
Symbol
Limit Values
Min.
Unit
Typ.
Max.
Remarks
Blanking time for HB overcurrent protection level 2
tHB_OCP2_blanking 430
600
670
ns
HB over-current protection
level 1
VHB_OCP1
0.8
0.86
V
Blanking time for HB overcurrent protection level 1
tHB_OCP1_blanking —
50
—
ms
1
HB capacitive mode detection
level 1
VHB_Cap1
1.6
1.66
V
during turn-on of the
HSGD
Blanking time for HB capacitive
mode detection level 1
tHB_Cap1_blanking 30
50
90
ns
HB capacitive mode detection
level 2
VHB_Cap2
- 70
- 50
- 25
mV
Blanking time for HB capacitive
mode detection level 2
tHB_Cap2_blanking 300
390
550
ns
HB capacitive mode regulation
voltage
VHB_cap_reg
25
50
70
mV
HB capacitive mode regulation
ratio
KHB_cap_reg
4.5
7.0
9.0
%
HB over-current control
VLSCSCC
0.74
0.8
0.86
V
LSCS pin bias current
ILSCSBA
-1.0
—
1.0
µA
VLSCS = 1.5 V
Unit
Remarks
Table 13
0.74
1.54
before turn-on of the
HSGD
Electrical Characteristics of the HSGD Pin
Parameter
Symbol
Limit Values
HSGD low voltage
VHSGDL
HSGD high voltage
VHSGDH
HSGD active shut down
VHSGDLASD
Min.
0.018
0.40
- 0.40
9.7
7.8
0.04
—
Typ.
0.05
1.10
-0.20
10.5
—
0.22
- 50
Max.
0.1
2.50
- 0.04
11.3
—
0.50
—
V
V
V
V
V
V
V
IHSGD = 5mA
IHSGD = 100mA
IHSGD = - 20mA
VCC_HS=15V
IHSGD = - 20mA
VCC_HS_OFF + 0.3V
IHSGD = - 1mA1
HSGD UVLO shut down
VHSGDLUVLO
—
300
—
V
VCC_HS=5V1
HSGD peak source current
IHSGDSO
120
220
320
mA
IHSGD = 20mA
HSGD peak sink current
IHSGDSI
17
35
70
mA
RLoad = 10Ω+CLoad = 1nF
HSGD voltage during sink
current
VHSGDHS
0.018
0.05
0.1
V
IHSGD = 5mA
HSGD rise time
tHSGDR
0.40
1.10
2.50
ns
IHSGD = 100mA
HSGD fall time
tHSGDF
- 0.40
-0.20
- 0.04
ns
IHSGD = - 20mA
The parameter is not subject to Production Test – verified by Design / Characterization
Datasheet
29 of 34
1
V 1.1
2018-10-28
ICL5102 PFC + Resonant Half-Bridge Controller
2nd Generation
Electrical Characteristics
Table 14
Electrical Characteristics of the RF Pin
Parameter
Symbol
Limit Values
Min.
Typ.
Max.
Unit
Remarks
@ 100µA < IRFM < 800µA
RF pin voltage in normal
operation
VRF
2.46
2.5
2.54
V
HB nominal switching
frequency
fNOM
97.5
100
102.5
kHz
f1
f2
f3
f4
f5
37
76
190
220
290
40
80
200
240
320
43
84
210
260
350
kHz
kHz
kHz
kHz
kHz
fmax-25°C
450
500
-
kHz
fmax-40°C
400
500
-
kHz
Adjustable HB switching
frequency via the CCO
Table 15
Electrical Characteristics of the BM Pin
Parameter
Symbol
Limit Values
Unit
Min.
Typ.
Max.
HB burst mode entry voltage
threshold
VHB_BM_entry
710
750
790
mV
Blanking time for HB burst
mode entry
tHB_BM_entry_blanking 8.5
10.0
11.5
ms
HB burst mode turn-on
threshold
VHB_BM_on
2.13
2.20
2.27
V
HB burst mode exit threshold
VHB_BM_exit
1.93
2.0
2.07
V
Maximum sink current into
the BO pin
IBM_max
BO pin current in the sleep
mode
IBM_Stop
Table 16
RRF = 10kΩ without the
resistor to BM pin
IRF = - 100 µA
IRF = - 200 µA
IRF = - 500 µA
IRF = - 600 µA
IRF = - 800 µA
IRF = - 1.25 mA / @ Tj = 25°C1
IRF = - 1.25 mA / @ Tj = 40°C1
800
-3
—
Remarks
µA
14
µA
Electrical Characteristics of the BO Pin
Parameter
Symbol
Limit Values
Unit
Min.
Typ.
Max.
Brown-out threshold
VBO_out
1.14
1.2
1.26
V
Brown-in threshold
VBO_in
1.34
1.4
1.46
V
BO pin bias current
IBOBA
-0.5
—
0.5
µA
Remarks
VBO = 5.0V
Make sure, that the expected ambient temperature do NOT causes a maximum junction temperature higher than 125°C
Datasheet
30 of 34
1
V 1.1
2018-10-28
ICL5102 PFC + Resonant Half-Bridge Controller
2nd Generation
Electrical Characteristics
Table 17
Electrical Characteristics of the OVP Pin
Parameter
Symbol
Limit Values
Min.
Typ.
Max.
Unit
Remarks
t > 5µs
HB OVP pin reference voltage
for OVP detection
VHB_OVP_ref
2.45
2.5
2.55
V
Blanking time for HB OVP
detection
tHB_OVP_blanking
—
5
—
µs
OVP pin bias current
IOVPBA
- 0.5
—
0.5
µA
VOVP = 3.0V
Unit
Remarks
Table 18
Electrical Characteristics of the OTP Pin
Parameter
Symbol
Limit Values
Min.
Typ.
Max.
OTP turn-on threshold
VOTP_start
670
703
735
mV
OTP turn-off threshold
VOTP_off
594
625
665
mV
—
620
—
µs
IOTP
- 106
- 100
- 94
µA
Symbol
Limit Values
Blanking time for OTP
detection
OTP pin source current in
normal operation
Table 19
Time Section
Parameter
Min.
Typ.
Max.
Unit
Remarks
HB maximum dead time 1
tDead_max1
550
750
930
ns
LSCS > - 50mV / 100kHz
HB maximum dead time 2
tDead_max2
350
500
600
ns
LSCS > - 50mV / 500kHz
HB minimum dead time
tDead_min
150
250
300
ns
LSCS < - 50mV / 500kHz
Datasheet
31 of 34
V 1.1
2018-10-28
ICL5102 PFC + Resonant Half-Bridge Controller
2nd Generation
Package Dimensions
6
Package Dimensions
The package dimensions of PG-DSO-16 are provided.
Figure 24
Package Dimensions for PG-DSO-16
Note:
Dimensions in mm.
Note:
You can find all of our packages, packing types and other package information on our Infineon
internet page “Products”: http://www.infineon.com/products.
Datasheet
32 of 34
V 1.1
2018-10-28
ICL5102 PFC + Resonant Half-Bridge Controller
2nd Generation
Revision history
Revision history
Document
version
Date of release
Description of changes
V1.1
09.11.2018
Errors correction and content modification
V1.0
01.06.2018
First release
Datasheet
33 of 34
V 1.1
2018-10-28
Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
Edition 2018-10-28
Published by
Infineon Technologies AG
81726 München, Germany
© 2018 Infineon Technologies AG.
All Rights Reserved.
Do you have a question about this
document?
Email: erratum@infineon.com
Document reference
ifx1
IMPORTANT NOTICE
The information given in this document shall in no
event be regarded as a guarantee of conditions or
characteristics (“Beschaffenheitsgarantie”) .
With respect to any examples, hints or any typical
values stated herein and/or any information
regarding the application of the product, Infineon
Technologies hereby disclaims any and all
warranties and liabilities of any kind, including
without limitation warranties of non-infringement
of intellectual property rights of any third party.
In addition, any information given in this document
is subject to customer’s compliance with its
obligations stated in this document and any
applicable legal requirements, norms and
standards concerning customer’s products and any
use of the product of Infineon Technologies in
customer’s applications.
The data contained in this document is exclusively
intended for technically trained staff. It is the
responsibility of customer’s technical departments
to evaluate the suitability of the product for the
intended application and the completeness of the
product information given in this document with
respect to such application.
For further information on the product, technology,
delivery terms and conditions and prices please
contact your nearest Infineon Technologies office
(www.infineon.com).
WARNINGS
Due to technical requirements products may
contain dangerous substances. For information on
the types in question please contact your nearest
Infineon Technologies office.
Except as otherwise explicitly approved by Infineon
Technologies in a written document signed by
authorized
representatives
of
Infineon
Technologies, Infineon Technologies’ products may
not be used in any applications where a failure of
the product or any consequences of the use thereof
can reasonably be expected to result in personal
injury.
工商网监
湘ICP备2023018690号
