IDP2303

Product Highlights • • • • Integrated 600V startup cell Integrated floating driver based on coreless transformer technology Digital multi-mode operation for higher efficiency curve Supports low stand-by power by means of direct X-cap discharge function and advanced burst mode control Eliminates the auxiliary power supply by means of integrated startup cell and burst mode UART interface for communication and in-circuit configuration • • • Flexible design-in by means of one time programming capability for a wide range of parameters Description The IDP2303 is a multi-mode PFC and LLC controller combined with a floating high side driver and a startup cell. A digital engine provides advanced algorithms for multi-mode operation to support highest efficiency over the whole load range. A comprehensive and configurable protection feature set is implemented. Only a minimum of external components are required with the low pin count DSO-16 package. The integrated HV startup cell and advanced burst mode enable to achieve low stand-by power. In addition a one-time-programming (OTP) unit is integrated to provide a wide set of configurable parameters that help to ease the design in phase. Features • • • • Multi-mode PFC Configurable PFC gate driver Synchronous PFC and LLC burst mode control Configurable non-linear LLC VCO curve • • Applications • LCD-TV 75W ~ 300W • Generarl SMPS Figure 1 Typical Application Product Type IDP2303 Package PG-DSO-16 Configurable soft-start VAC input voltage sensing and X cap discharge via HV pin IDP2303 Digital Multi-Mode PFC + LLC Combo Controller Description ....................................................................................................................................................................................1 1 Pin Configuration and Description....................................................................................................................4 3 3.1 3.2 3.3 3.3.1 3.3.1.1 3.3.1.2 3.3.1.3 3.3.2 3.3.2.1 3.3.2.2 3.3.3 3.3.4 3.3.4.1 3.3.4.2 3.3.4.3 3.3.4.4 3.3.5 3.4 3.4.1 3.4.2 3.4.3 3.4.3.1 3.4.3.2 3.4.3.3 3.4.3.4 3.4.3.5 3.4.3.6 3.4.3.7 3.4.3.8 3.5 3.5.1 3.5.2 3.5.3 3.5.4 3.5.4.1 3.5.4.2 3.5.4.3 3.5.4.4 3.6 3.6.1 3.6.2 3.6.3 3.7 3.7.1 3.7.2 3.7.3 3.8 Functional Description .........................................................................................................................................7 Introduction.................................................................................................................................................................... 7 Overview Controller Features ................................................................................................................................. 7 Overview Controller Features ................................................................................................................................. 7 System and Device overview............................................................................................................................ 7 Processor and memory operations.......................................................................................................... 8 Communication interface ............................................................................................................................ 9 Voltage and current sensors.................................................................................................................... 10 IC Power Supply and High Voltage Startup Cell .................................................................................... 10 Direct AC input monitoring combined with VCC startup function .......................................... 11 X-cap discharge function via the integrated HV startup-cell ..................................................... 12 Standby Mode with synchronous PFC-LLC burst operation ............................................................ 13 IC protection......................................................................................................................................................... 13 Undervoltage lockout for VCC................................................................................................................. 13 Overvoltage protection for VCC ............................................................................................................. 14 Over temperature protection.................................................................................................................. 14 Auto Restart Mode....................................................................................................................................... 14 AC detection.......................................................................................................................................................... 14 PFC Controller............................................................................................................................................................. 14 PFC Softstart......................................................................................................................................................... 15 PFC Multi-mode operation ............................................................................................................................. 15 PFC Protection..................................................................................................................................................... 17 PFC Open Control Loop Protection (PFCOCLP)............................................................................... 17 PFC Inductor Over Current Protection (PFCOCP).......................................................................... 17 PFC Output Over Voltage Protection (PFCOVP).............................................................................. 17 PFC Output Redundant Over Voltage Protection (PFCROVP)................................................... 17 PFC Output Under Voltage Protection (PFCUVP)........................................................................... 18 PFC Brownin Protection for AC Input Line (PFCBIP) ................................................................... 18 PFC Brownout Protection for AC Input Line (PFCBOP)............................................................... 18 PFC Long Time Continuous Conduction Mode Protection (PFCCCMP)................................. 18 Half-bridge LLC Controller..................................................................................................................................... 19 LLC Softstart (Time Controlled Oscillator TCO).................................................................................... 19 LLC Normal Operation (Voltage Controlled Oscillator VCO) ........................................................... 19 LLC Smooth Transition of Frequency Control from TCO to VCO.................................................... 21 LLC Half-bridge Protection............................................................................................................................. 21 LLC Open Control Loop Protection (LLCOCLP)............................................................................... 21 LLC Over Load Protection (LLCOLP) ................................................................................................... 21 LLC Over Current Protection Level 1 (LLCOCP1)........................................................................... 21 LLC Over Current Protection Level 2 (LLCOCP2)........................................................................... 22 Operation Flow ........................................................................................................................................................... 22 IC Initialization.................................................................................................................................................... 22 Operation Flow of the PFC Controller........................................................................................................ 23 Operation Flow of the Halfbridge LLC Controller................................................................................. 24 Overview Protection Features.............................................................................................................................. 25 Undervoltage Lockout for VCC...................................................................................................................... 25 Overvoltage Protection for VCC.................................................................................................................... 26 Overtemperature Protection by means of internal Temperature Detection............................. 26 Fixed and Configurable Parameters................................................................................................................... 27 2 Datasheet Representative Blockdiagram.............................................................................................................................6 2 Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller 3.8.1 3.8.2 4 4.1 4.2 4.3 4.4 4.4.1 4.4.2 4.4.3 4.4.4 4.4.5 4.4.6 4.4.7 4.4.8 4.4.9 5 Fixed Parameters................................................................................................................................................ 27 Configurable Parameters ................................................................................................................................ 27 Electrical Characteristics................................................................................................................................... 30 Absolute Maximum Ratings................................................................................................................................... 30 Package Characteristics........................................................................................................................................... 31 Operating Conditions ............................................................................................................................................... 31 DC Electrical Characteristics ................................................................................................................................. 31 Power Supply Characteristics ....................................................................................................................... 31 Characteristics of the MFIO Pin.................................................................................................................... 32 Characteristics of the HBFB Pin ................................................................................................................... 32 Characteristics of the Current Sense Inputs CSx ................................................................................... 32 Characteristics of the Zero Crossing Input ZCD..................................................................................... 33 Characteristics of the Gate Driver Pins GDx............................................................................................ 33 Characteristics of the High-Voltage Pin HV ............................................................................................. 34 Characteristics of the VS Pin.......................................................................................................................... 34 Characteristics of the HSGD Pin ................................................................................................................... 34 Outline Dimensions............................................................................................................................................. 36 Revision History......................................................................................................................................................................... 37 Datasheet 3 Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller The pin configuration is shown in Figure 2 and Table 1. The Pin functions are described below. Figure 2 Table 1 Pin Configuration Pin Definitions and Functions Symbol Pin GD0 1 (PFCGD) Type O CS0 2 (PFCCS) I GND G VCC 3 P ZCD 5 I VS 4 6 I N.C. HV 7 8 — I MFIO 9 I HBFB 10 I Datasheet Function Gate Driver Output 0 (PFC Gate Driver) Output for directly driving the PFC PowerMOS. The default peak source current capability is 156 mA and the peak sink current capability is 800 mA. Current Sense 0 (PFC Current Sense) Pin CS0 is connected to an external shunt resistor and the source of the PFC PowerMOS. Positive Voltage Supply IC power supply Ground IC ground Zero Crossing Detection Pin ZCD is connected to the auxiliary winding of the PFC choke. Voltage Sensing Pin VS is connected to a high ohmic resistor divider for directly sensing the bus voltage. Creepage Distance High Voltage Input Pin HV is connected to the AC input via an external resistor and 2 diodes. There is a 600 V HV startup-cell internally connected that is used for initial VCC charge. It is also used to discharge the x-capacitors of the EMI network. Furthermore sampled high voltage sensing is supported for brownin/brownout detection. MFIO Pin MFIO provides a half duplex UART communication IO interface for parameter configuration. It also can be used for PFC output redundant over voltage protection. In that case it is mandatory to use a BSS127 transistor as shown in Figure 1 and the described in section 4.4.3.4. Half Bridge Feedback 4 Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller Symbol Pin Type CS1 (HBCS) 11 I GD1 (LSGD) 12 O N.C. HSGND 13 14 — G HSGD 16 O HSVCC Datasheet 15 P Function Pin HBFB is connected to an optocoupler for the feedback path to control the LLC switching frequency. Current Sense 1 (Hallf Bridge current Sense) Pin CS1 is connected to an external shunt resistor and the source of the PowerMOS in the half-bridge stage. Gate Driver Output 1 (Half Bridge Low Side Gate Driver) Output for directly driving the lowside PowerMOS in the half-bridge. The peak source current capability is 120 mA and the peak sink current capability is 500 mA. Creepage Distance High side Ground Ground for floating high side driver High side VCC Power supply of the high side floating driver, supplied via bootstrap High side floating Gate Driver Output for directly driving the high side PowerMOS in the half-bridge. The peak source current capability is 0.52 A and the peak sink current capability is 1.3 A. Refer to item 4.4.9 for more details. 5 Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller A simplified functional block diagram is given in Figure 3. Note that this figure only represents the principle functionality. IDP2303 digital combo-PFC & LLC controller consists of an Infineon 66MHz (fMCLK) NanoDSP processor to actualize both the power factor correction (PFC) and a half-bridge resonant function. The PFC and LLC controllers function with their configured parameter to optimize the performance. The current sense, zerocrossing and voltage sense provide the controller as well as the processor inputs for its control. Figure 3 Datasheet Representative Blockdiagram 6 Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller The functional description gives an overview about the integrated functions and features and their relationship. The mentioned parameters and equations are based on typical values at TA = 25°C. The correlated minimum and maximum values are shown in the electrical characteristics in Chapter 4. This chapter contains following main descriptions: • Introduction (Chapter 3.1) • Overview Controller Features (Chapter 3.2) • • • • • • 3.1 General control features (Chapter 3.3) PFC Controller (Chapter 3.4) Half-bridge LLC Controller (Chapter 3.5) Operation Flow (Chapter 3.6) Overview Protection Features (Chapter 3.7) Fixed and configurable parameters (Chapter 3.8) Introduction The IDP2303 is a digital Combo-LLC controller to support application topologies with a multi-mode PFC and half-bridge LLC stage. The IC consists of a smart digital core that provides advanced algorithms for multimode operation and a variety of protection features. A high degree of forward integration is realized by implementing a floating HV gate driver and a HV startup cell in a slim PG-DSO-16 package. Multifunctional pins ensure a very low component count in the application. General controller features are summarized in Table 2. The IC supports highest design-in flexibility in the application by means of an advanced set of configurable parameters. The configuration can be done via a half duplex UART interface at pin MFIO. 3.2 • • • 3.3 Overview Controller Features General Controller Features (Table 2) PFC Controller Features (Table 5) LLC Controller Features (Table 6) Overview Controller Features This chapter provides an overview of functional blocks for Figure 3. The general control features are General Controller Features System and Devices overview IC Power System and High Voltage Startup Cell Direct AC input monitoring combined with VCC startup function X-cap discharge function via the integrated HV startup-cell Standby Mode with synchronous PFC-LLC burst operation IC protection Auto restart mode AC detection Table 2 3.3.1 System and Device overview Chapter 3.3.1 Chapter 3.3.2 Chapter 3.3.2.1 Chapter 3.3.2.2 Chapter 3.3.3 Chapter 3.3.4 Chapter 3.3.4.4 Chapter 3.3.5 The device is dominantly used in an AC/DC application with a working scenario as illustrated below. The device on powering-up enters start-up and soft-start stage. Once the voltage at the primary side and Datasheet 7 Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller secondary side of the transformer stabilizes, depending on the load condition, the device operates in extremely light load or normal operation. In extremely light load condition, the device operates in burst, meaning the gate drivers are driven at a lower frequency ranges and switching on periodically only to maintain the supply voltage and the VCC of the device. In normal operating condition, the device actively switches its gate driver to regulate the voltage and current supplies to the load. In Figure 4, when overcurrent protection mechanism is triggered, the device shall shut down its LLC and PFC controller and enter a restart of the system and attempt to re-power the system. There are many protection and shut-down scenario. For further detail, please refer to Chapter 3.7. Figure 4 3.3.1.1 IDP2303 Operation Overview Processor and memory operations This chapter describes the IC power processor function and its operation. On powering up, the device’s processor initializes and loads its configuration from its one-timeprogrammable memory and configures the device to its application needs. The timer for the scheduler is programmed and the processor run within a scheduler timing function to continuous monitor for any protection event as well as optimize the parameter for the PFC and LLC controllers. The processor runs in an active scheduler mode when the PFC and the LLC controller are running and runs in the following mode in specific condition of the system. • • • 1 HV-startup: System “cold start” with VCC startup via the integrated HV startup cell. Standby: System operates in synchronous PFC-LLC burst operation to keep output voltage regulated and yet maintain very low system power consumption Auto-restart: A protection mode that stops all PFC and LLC switching operations, puts the IC into a suitable sleep mode, and initiates a new startup after a configurable break time1. Please refer to Chapter 4.7 for more detail about the protection mechanisms. Datasheet 8 Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller Begin Vcc_on threshold reached HV Startup Processor initialised Auto_restart Block function Procesoor flow Parameter loading Register inter-links Enter/Exit Standby Clocks and Timer configuration Scheduler/timers Interrupts Watchdog check LLC control Protection Check PFC control Communication Register/ status System shut off Figure 5 Overview of Processor operations The processor runs its program from its Read Only Memory (ROM) with random access memory (RAM) as main data space for computation and control-flow state records during operation. The processor monitors and processes the analog-to-digital (ADC) data. The processed data is provided to control the power-factor-correction (PFC) and Resonant LLC converter. The processor also monitors the input line (AC), its own monitoring lines as well as the output load feedback voltage for protection condition and mitigates according to the conditions with the protection function. All the information are registered and interrupts are triggered when interrupt event occurs. 3.3.1.2 Communication interface The communication to external host is via the MFIO pin and is handled by the processor in firmware. A halfduplex UART communication data between the host and the device is transferred through internal UART. Datasheet 9 Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller 3.3.1.3 Voltage and current sensors IDP2303 sensing nodes are multiplexed to an analog-to-digital (ADC) module to allow the device to monitor the system behavior and its internal behavior. The voltage and current sensors are multiplexed to the ADC as well. Each of the sensing node samples its voltage or current and the sampling is multiplexed onto the ADC where the digital read-out is measured. Figure 6 Voltage and current sensing multiplexing to ADC Figure 6 shows the sensing paths that are multiplexed to the ADC. The ADC sensing is time-multiplexed to the sensing nodes and is managed internally by the processor. Timers are used to enable and disable the sample and hold circuit in the current sense block. Within each of the sensing block, there are sub-sensing nodes that allow measurement for each specific function. See Chapter 4.4.3 and Chapter 4.4.4 for further details. 3.3.2 IC Power Supply and High Voltage Startup Cell This chapter describes the IC power supply approach and the functions correlated with the high voltage startup cell for Figure 1. The functions supported by the high voltage startup cell are • Direct AC input monitoring combined with VCC startup function (Chapter 3.3.2.1) • X-cap discharge function via the integrated HV startup-cell (3.3.2.2) Datasheet 10 Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller IDP2303 contains four power supply pins VCC, GND, HSVCC and HSGND. The VCC is the main low voltage supply input at the IC. All the internal circuits except the integrated floating driver are connected to pin VCC and pin GND, which is the common ground. A capacitor needs to be placed directly at the pins VCC and GND to provide a proper buffering of the IC power supply voltage. The pins HSVCC and HSGND are the power supply pins for the integrated floating high side driver. The high side driver is supplied by an external bootstrap buffer capacitor that also needs to be connected close to pins HSVCC and HSGND. The external bootstrap capacitor is charged via an external bootstrap diode and resistor which are connected in serial to the VCC supply. In order to avoid unexpected delay of startup cell, upper resistance of the voltage divider for VS pin shall be selected above 8MΩ. 3.3.2.1 Direct AC input monitoring combined with VCC startup function There are two main functions supported at pin HV, with the connection of the AC input voltage via a resistor, RHV (51kΩ) and two diodes (See Figure 8). The integrated HV startup-cell is switched on during the VCC startup phase, when the IC is inactive. A current is flowing from pin HV to pin VCC via an internal diode, which charges the capacitor at pin VCC. This current is limited by the RHV and the RDS(on) of the HV startup-cell. Once the voltage at pin VCC exceeds the VCC on- threshold, the active operating phase is entered. Figure 7 VCC voltage illustration of Direct AC input powering up behavior Within the device, a direct AC input monitoring is supported by a resistive sense that is switched on periodically by an internal timer. The timer switches on the HV startup cell and the switch T2 for a very short time after a defined period. During this short on-time, the voltage across RSH is sensed to estimate the HV voltage (See Figure 8). Datasheet 11 Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller Vbulk VAC CVCC RHV VCC HV HV Startup-cell Closed / Open T3 RBLD Depletion-Cell Driver X-Cap Discharge Function X-cap AC Disconnect Discharge Detection Activation Sampling control for Vin measurement T2 Equivalent circuit diagram of firmware implementation Brownout / Brown-in Detection VHVBOD RSH Figure 8 3.3.2.2 + + tHVBODBlank Brownin/ BrownOut Protection VHVBID High voltage sensing at pin HV X-cap discharge function via the integrated HV startup-cell Safety standard requires X-caps to be discharged within one second once the switching mode power supply is disconnected from the AC line. The AC waveform is closely monitored by the HV pin through external resistor RHV (51 kΩ). An AC detection algorithm checks if there is an alternating voltage at the converter input. This function works reliably for input voltages as specified in Table 3. As soon as the voltage stops alternating an AC unplug event is detected and input capacitors (XCAPs) are getting discharged via the depletion cell of IDP2303 between pins HV and GND. AC unplug detection time is typically within a few hundred Milliseconds and maximum 800 ms. The maximum discharge time constant for the maximum XCAP capacitance value of 2µF (see Table 4) is then appr. 104 ms (with RHV = 51kΩ and the IC internal resistance of about 1kΩ). Therefore the XCAPs are safely discharged within 1s to ES1 or SELV limits according to IEC62368 and IEC60950. The X-caps are then discharged to fulfil the safety standard. The discharging current is determined by the external resistor RHV (51 kΩ) and RBLD (see Figure 8). The X-cap discharge function is a configurable parameter. Datasheet 12 Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller Table 3 Parameters Input voltage ratings for reliable AC detection Input voltage Frequency Table 4 Parameters Min. Range 1 Range 2 47 90 57 Max. 53 63 XCAP discharge component ratings Total capacitance of all XCAPs Total discharge resistance from AC voltage to HV pin 264 Unit VAC Hz Hz Min. Max. Unit 51 51 kΩ 0.1 Remarks 2 µF Remarks RHV 3.3.3 Standby Mode with synchronous PFC-LLC burst operation 3.3.4 IC protection For IDP2303, a “STANDBY” signal from the application will trigger the start to enter standby mode. The “STANDBY” signal will cause a change in resistor divider ratio such that the rated output voltage is regulated at lower voltage in standby mode. If VHBFB is less than V_burst_enter for a blanking time of t_blk_burst, both PFC and LLC will stop switching immediately. The IC is put into power saving mode. The controller enters into burst pause phase of standby mode. During the standby mode, the HBFB pin is monitored to control the burst mode operation. When the HBFB voltage rises up and reaches the burst on threshold V_burst_on, or VCC drops below VVCC_burst_off, the device will wake up and start burst mode operation. LLC burst on time t_burst_on_max is constant and configurable with softstart and soft-stop. After LLC completes one full busrt on switching, the device will stop switching and enters sleep mode to save the power consumption. The LLC busrt frequency f_sw_busrt and t_burst_on_max are optimized at typical standby power load in order to achieve lowest input power and output ripple. Meanwhile, under ultra light load condition, e.g. no load condition, LLC will increase burst frequency adaptively according burst off time. In the end, burst frequency is stabilized so as to regulate busrt off time around maximum burst off time t_burst_off_max. By setting proper t_burst_off_max, LLC can deliver right-fit energy adaptively to different load and avoid deep saturation of feedback loop, which is able to reduce output ripple, minimize power consumption at secondary feedback path and perform excellent dynamic load response. When heavy load comes, the HBFB voltage will rise up and hit the leaving burst mode threshold V_burst_exit. Then the device will leave burst mode operation. Another leaving burst mode condition is when the burst off time reaches the minimum burst off time limit t_burst_off_min. 3.3.4.1 Undervoltage lockout for VCC There is an undervoltage lockout unit (UVLO) implemented, that ensures a defined enabling and disabling of the IC operation depending on the supply voltage at pin VCC. The UVLO contains a hysteresis with the voltage thresholds VVCCon for enabling the IC and VVCCoff for disabling the IC. Datasheet 13 Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller 3.3.4.2 Overvoltage protection for VCC 3.3.4.3 Over temperature protection 3.3.4.4 Auto Restart Mode 3.3.5 AC detection Overvoltage protection at VCC is triggered when VVCC exceeds a threshold of V_VCCOVP for a blanking time of t_VCCOVP. The system enters into auto restart mode then. When the internal temperature exceeds the over temperature protection level T_OTP, the system enters into auto restart mode. If the temperature is lower than T_OTP_reset at the end of the auto restart breaktime, the system exits auto restart mode and enters startup mode. Otherwise, if the temperature is higher than T_OTP_reset at the end of the auto restart breaktime, the system remains in auto restart mode. Once the auto restart mode is entered, the IC stops both PFC and LLC switching operations and enters sleep mode. During this auto restart off-phase the HV startup-cell is activated to maintain the VCC voltage. After the configurable auto restart breaktime t_AR the IC initiates a new start-up. This feature is used for detecting AC unplug condition during standby mode and is implemented via a combination of built-in hardware and firmware. The figure below shows the configuration of the EMI filter and where input voltage is sensed through the HV pin. Figure 9 Circuit with AC detection with EMI filter During standby mode, low power consumption is the main challenge. IDP2303 makes use of the AC detection function to detect the AC unplug quicky and reliably. With the AC detection, it neither needs to sample the AC voltage too often nor needs to trigger the wakeup of the IC too often and hence it can maintain low standby power consumption. Having detected the AC unplugged, the X-cap discharge function would be triggered. In the AC detection function, IDP2303 would take AC samples after defined time intervals and based on proprietary algorithm it determines the decision of unplug condition. 3.4 PFC Controller The PFC controller turns on and off the PFC gate driver so that a desired bus voltage is maintained while the AC input current is approximately proportional to the AC line voltage resulting in high power factor and low THD. A gate driver switching cycle has divided into three phases: • • the on-time, ton, where the PFC MOSFET is turned on, and the PFC choke current increases the freewheeling time, tf, where the PFC MOSFET is turned off, the choke current decreases and charges the PFC output capacitor via the freewheeling diode Datasheet 14 Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller • the waiting time tw, which starts when the choke current decreased to zero and an oscillation is observed at the drain-source voltage of the switching MOSFET and the voltage at the auxiliary winding. COUT RVS2 Inside chip GD0 CS0 + VIN + - RCS Figure 10 VS Bus Voltage - RVS1 CVS1 PFC control at GD0 pin and Voltage and current sensing at VS and CS pins The following PFC functionality of the controller is described: PFC Controller Features PFC Softstart Multi-mode PFC control PFC Protection PFC Open Control Loop Protection (PFCOLP) PFC Inductor Over Current Protection (PFCOCP) PFC Output Over Voltage Protection (PFCOVP) PFC Output Redundant Over Voltage Protection (PFCROVP) PFC Output Under Voltage Protection (PFCUVP) PFC Brownin Protection for AC Input Line (PFCBID) PFC Brownout Protection for AC Input Line (PFCBOD) PFC Long Time Continuous Conduction Mode Protection (PFCCCMP) Table 5 3.4.1 PFC Softstart 3.4.2 PFC Multi-mode operation Chapter 3.4.1 Chapter 3.4.2 Chapter 3.4.3 Chapter 3.4.3.1 Chapter 3.4.3.2 Chapter 3.4.3.3 Chapter 3.4.3.4 Chapter 3.4.3.5 Chapter 3.4.3.6 Chapter 3.4.3.7 Chapter 3.4.3.8 PFC softstart, a PI controller calculates the on-time as a function of the difference between the reference bus voltage and the actual PFC bus voltage. To compensate for the on-time and hence line dependency of the boost power stage, the output of the PI controller is multiplied with on-time. The PFC operates in fixed QR-1 operation with minimum on-time. With the minimum on-time multiplied to the output of the PI controller, it will form an exponential softstart ramp for on-time that limits the switching frequency and startup current. Once the desired PFC bus voltage is reached, it resumes to normal multimode PFC operation. For PFC operating in critical conduction mode CrCM, the MOSFET is turned on with a constant on-time throughout the complete AC half cycle and the off-time is varying during the AC half cycle depending on the instantaneous input voltage applied. Thus, the switching frequency is varying within each AC half cycle with the lowest switching frequency at the peak of the AC input voltage and the highest switching frequency near the zero crossings of the input voltage. A new switching cycle starts immediately when the inductor current Datasheet 15 Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller reaches zero. CrCM is also equivalent to quasi-resonant switching at first inductor current valley or QR1 operation. The switching period of CrCM operation is given by = = = + + (1) CrCM is ideal for full load operation, where the constant on-time is large. However, the constant on-time reduces at light load, resulting in very high switching frequency particularly near the zero crossings of the input voltage. The high switching frequency will increase the switching losses, resulting in poor efficiency at light load. The new multimode PFC control algorithm implemented in IDP2303 can lower the switching frequency by adding an additional delay into each switching cycle through selecting further inductor current valleys to achieve QR2, QR3 and up to QR10 operation. In this way, the switching frequency is limited between a minimum and maximum value. The switching period of the multimode PFC operation, consisting of QR1 to QR10 operation and DCM, is given by (2) 1 iL, pk 2 t on 2 Figure 11 Tosc 4 Current and timing in QR2 Operation Introduction of the delay helps to reduce switching frequency but it also distorts the input current waveform and thus affects the PFC THD performance. The multimode PFC control also consists of an algorithm that optimizes the applied on-time on a cycle by cycle basis so as to ensure good input current shaping and improve PFC THD performance. Datasheet 16 Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller 3.4.3 PFC Protection The PFC stage is protected against: • • • • • • • • PFC Open Control Loop Protection (PFCOCLP) (Chapter 3.4.3.1) PFC Inductor Over Current Protection (PFCOCP) (Chapter 3.4.3.2) PFC Output Over Voltage Protection (PFCOVP) (Chapter 3.4.3.3) PFC Output Redundant Over Voltage Protection (PFCROVP) (Chapter 3.4.3.4) PFC Output Under Voltage Protection (PFCUVP) (Chapter 3.4.3.5) PFC Brownin Protection for AC Input Line (PFCBID) (Chapter 3.4.3.6) PFC Brownout Protection for AC Input Line (PFCBOD) (Chapter 3.4.3.7) PFC Long Time Continuous Conduction Mode Protection (PFCCCMP) (Chapter 3.4.3.8) 3.4.3.1 PFC Open Control Loop Protection (PFCOCLP) 3.4.3.2 PFC Inductor Over Current Protection (PFCOCP) 3.4.3.3 PFC Output Over Voltage Protection (PFCOVP) 3.4.3.4 PFC Output Redundant Over Voltage Protection (PFCROVP) Open control loop is detected if the voltage value at pin VS is lower than the threshold V_OlpPFC. This may happen in case that the voltage sensing loop is highside open circuit or the input voltage is too low. If open loop is detected at the IC startup, both the PFC and the HB LLC controller do not start up. If this open loop condition is detected during system operation, the system enters into auto restart mode. In the converter system, the peak current through the MOSFET is monitored via the PFC shunt resistor RPCS to minimise stress for the MOSFET, the inductor LPFC and the diode DPFC. Once the voltage across the shunt resistor exceeds the over current threshold V_CS0ocpset, the MOSFET gate is turned off. Afterwards, the ZCD signal, or the PFC maximal period time-out signal, initializes the next switching cycle. This protection mechanism is active in every switching cycle. A two stage overvoltage protection scheme is implemented where a slower average measurement of the bus voltage shall trigger a shutdown of the PFC under OVP1 of a lower threshold by firmware, and a faster immediate measurement of the bus voltage shall also trigger a shutdown of the PFC under OVP2 by hardware. For OVP1, if the average sensed PFC bus voltage exceeds the threshold V_OvpSwSetPFC, the PFC will stop switching while the LLC continues to run. OVP2 is implemented by hardware. The threshold of this comparator is fixed at V_OvpHwSetPFC =2.8V. Once the sensed bus voltage exceeds this threshold for a configurable filter delay time, the PFC will stop switching while the LLC continues to run. Once the average sensed PFC bus voltage reduces and reaches the reference bus voltage V_RefPFC, the PFC converter resumes normal operation. For ROVP, if the PFC bus voltage exceeds V_ROVP_set, one ROVP count is recorded. The PFC will stop switching but the LLC continues to run. Once the average sensed PFC bus voltage reduces and reaches the reference bus voltage V_ROVP_reset, the PFC converter resumes to normal operation. If another ROVP is recorded within t_ROVP (8s), it is recorded as 2nd ROVP count. The PFC will stop switching again but the LLC continues to run. However, the ROVP count will be reset to zero if a next ROVP event occurs after t_ROVP (8s). The t_ROVP (8s) starts counting when the last occurring ROVP event is triggered. Whenever the ROVP count accumulates to maximum ROVP count n_ROVP (10), the IC enters auto-restart mode. In normal operations, the ROVP acts similar to the behavior of OVP1. When either OVP1 at VS pin or ROVP at MFIO pin is triggered, the same behavior occurs. In event that the OVP1 resistor divider has faulty resistance level, if VS voltage is lower, the PFC bus voltage would increase. In this case, the ROVP triggers to protect the Datasheet 17 Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller system. Since the faulty resistance level remains unchanged, the ROVP will re-trigger again and again once the bus voltage drops to normal level when the switching is stopped and results in auto-restart mode. This feature is disabled by default, which is selectable in the configurable parameters. Since the MFIO pin is a multifunction pin, not dedicated for high impedance bus voltage sensing, it must not be connect to the Bus voltage divider at start-up. Leakage into the pin during system start-up could affect the IC start-up behaviour. If this feature is enabled, the proposed solution with BSS127 shown in Figure 1 ensures a proper start-up and almost lossless ROVP function, not effecting standby performance. 3.4.3.5 PFC Output Under Voltage Protection (PFCUVP) 3.4.3.6 PFC Brownin Protection for AC Input Line (PFCBIP) 3.4.3.7 PFC Brownout Protection for AC Input Line (PFCBOP) 3.4.3.8 PFC Long Time Continuous Conduction Mode Protection (PFCCCMP) The PFC undervoltage protection (UVP) is a protection for the LLC converter from entering capacitive operation range. Since UVP is detected by sensing the PFC bus voltage, it is placed under PFC protection features. UVP is implemented by firmware. If the average sensed PFC bus voltage falls below a configurable UVP threshold V_UvpSetPFC for a blanking time of t_UvpBlkPFC, PFC undervoltage is detected. PFC and LLC will stop switching. PFC brownin protection is implemented by firmware and it utilizes HV pin for AC input voltage sampling for better input voltage measurement. The desired brownin input voltage threshold is V_HVBID. If VACrms > V_HVBID, brown-in is detected and the system enters into startup. The PFC brownout protection prevents the system from operating at very low input voltage that is out of the normal operating range. This helps to protect the system from high current stress or device failures at very low input voltage. PFC brownout protection is implemented by firmware and it utilizes HV pin for AC input voltage sampling for better input voltage measurement. The desired brownout input voltage threshold is V_HVBOD. If VAC,rms < V_HVBOD and after a blanking time of t_HVBODblank, brownout is detected. PFC will stop switching and LLC will continue switching. Continuous conduction mode (CCM) operation may occur during PFC startup for limited time duration. It is considered as a failure in the system only if CCM operation of the PFC converter is observed over a longer period of time. The PFC converter may run into CCM operation for a longer period due to shorted bypass diode, heavy load step that is out of specification or very low input voltage that is out of the normal operating range. When CCM occurs, the magnetizing current in the PFC choke does not have a chance to decay to zero before the MOSFET turns on. There will be no quasi-resonant oscillation observed at the ZCD signal before the maximum switching period time-out is reached that turns the MOSFET on. This turn-on event without ZCD oscillation is monitored to protect the PFC converter from continuous CCM operation. The long time CCM protection is implemented by firmware. At every sampling period, if the maximum switching period time-out occurs before any quasi-resonant oscillation is observed at the ZCD signal, the CCM time counter is increased by 1. If the PFC switching period is less than the time-out period, the CCM time counter is decreased by 1. Once the CCM time counter exceeds t_CcmpPFC, the system enters into auto restart mode. The long time CCM protection is active only if the PFC ontime is above the threshold t_OnMinPFC by 200ns. Datasheet 18 Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller 3.5 Half-bridge LLC Controller Following LLC functionality is described: Half-bridge LLC Controller Features LLC Softstart (Time Controlled Oscillator TCO) LLC Normal Operation (Voltage Controlled Oscillator VCO) LLC Smooth Transition of Frequency Control From TCO to VCO LLC Half-bridge Protection LLC Open Control Loop Protection (LLCOCLP) LLC Over Load Protection (LLCOLP) LLC Over Current Protection Level 1 (LLCOCP1) LLC Over Current Protection Level 2 (LLCOCP2) Table 6 3.5.1 Chapter 3.5.1 Chapter 3.5.2 Chapter 3.5.3 Chapter 3.5.4 Chapter 3.5.4.1 Chapter 3.5.4.2 Chapter 3.5.4.3 Chapter 3.5.4.4 LLC Softstart (Time Controlled Oscillator TCO) The half-bridge LLC controller enters softstart for every VCC power up and upon recovering from certain protection mode provided the bus voltage is in the proper range. In softstart, the switching frequency changes with the elapsing time (a time controlled oscillator - TCO), as shown in Figure 12. The switching frequency starts at a maximum value and decrease with a defined frequency step change at every 2ms. The initial frequency step change is larger and the frequency step change will gradually decrease at every 2ms until it reaches the minimum frequency step change value. Once the softstart switching frequency is close to the switching frequency output of the free-running voltage controlled oscillator (VCO), the external secondary side LLC bus voltage controller and VCO will take over the regulation of the LLC output voltage. The LLC enters into normal operation. fHB f_MaxTCO Slope_TCO_init Slope_TCO_min 0 Figure 12 3.5.2 t Frequency vs. Time of the TCO LLC Normal Operation (Voltage Controlled Oscillator VCO) During normal operation, a voltage controlled oscillator (VCO) generates the HB LLC converter switching frequency fHB based on the HB feedback voltage VHBFB. In this controller, the curve of the HB switching frequency fHB in response to the feedback voltage VHBFB is schematically shown as in Figure 13. The VCO switching period vs. feedback voltage inside this controller consists of three pieces of direct line with different slew rate. As shown in Figure 13, the line in area II (normal operation) has much lower slew rate than the area I (Light Load) and III (Heavy Load). Therefore, the VCO in the area II has a much better frequency resolution than in the area I and III. In this way, fine frequency resolution around the nominal operating point VNomHB is realized, while a wide operating frequency range can be covered with fast response to the load change in both heavy and light load is realized. Datasheet 19 Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller Figure 13 Frequency vs. Feedback Voltage of the VCO The switching period curve is defined by following key points: feedback origin (0, TMinVCO), VCO light load (V_LLVCO, T_LLVCO), VCO nominal point (VNomVCO, TNomVCO), VCO heavy load (V_HLVCO, T_HLVCO) and feedback maximal point (V_MaxVCO, T_MaxVCO). In this controller, all values are calculated based on the VCO nominal frequency f_NomVCO and nominal feedback voltage V_NomVCO with certain factors, as: the minimal and maximal HB LLC switching frequency f_MinVCO and f_MaxVCO : (3) = . _ _ _ = . _ the frequency at the corners: = . _ _ _ = . _ and the feedback voltages:. = . _ _ _ = . _ (4) (5) (6) (7) (8) Once these points are defined, the switching period is calculated by a linear interpolation of the switching period to the feedback voltage, and the switching frequency curve over the whole feedback range is resulted, which is naturally non-linear function of the feedback voltage, as shown in Figure 13. For an optimal HB LLC operation, the frequency f_NomVCO should be set as the resonant frequency of the LLC resonant tank, while the respected feedback voltage V_NomVCO is taken at the middle of the regulation feedback range. Datasheet 20 Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller 3.5.3 LLC Smooth Transition of Frequency Control from TCO to VCO 3.5.4 LLC Half-bridge Protection With built-in HB LLC softstart, the output voltage rises up smoothly and feedback voltage VHBFB is available once the output voltage reaches in the regulation range. During the startup, LLC leaves the softstart mode and enters normal operation mode if the switching frequency determined by the VCO is equal to or higher than the switching frequency determined by the TCO, then the voltage controlled oscillator (VCO) takes over the frequency control. The LLC half-bridge is protected against: • LLC Open Control Loop Protection (LLCOCLP) (Chapter 3.5.4.1) • • LLC Over Load Protection (LLCOLP) (Chapter 3.5.4.2) LLC Over Current Protection 1 (LLCOCP1) (Chapter 3.5.4.3) • LLC Over Current Protection 2 (LLCOCP2) (Chapter 3.5.4.4) In this controller, the HB LLC converter is protected against HB open loop and over load (OLP), over current 3.5.4.1 LLC Open Control Loop Protection (LLCOCLP) 3.5.4.2 LLC Over Load Protection (LLCOLP) 3.5.4.3 LLC Over Current Protection Level 1 (LLCOCP1) Open control loop may happen due to open circuit in opto-coupler either at the diode or at the transistor, open circuit in HB feedback pin or the broken connection of the IC pin to the opto-coupler transistor source terminal. In this case, the HB feedback VHBFB stays at high. After the end of the softstart, the averaged value of the feedback voltage VHBFB over time period of N_AccHB * t_SrHB is compared with the threshold V_OlpHB. If the measured value is higher than the threshold for time t_OlpHB, then the open loop protection is triggered and the whole system enters auto-restart mode. The system will be stopped and a time break t_AR follows. After this time break, the HB LLC converter restarts again with softstart. This is open loop protection. Over load at the HB LLC output during normal operation leads to rise of the feedback voltage VHBFB. Once the averaged value of the feedback voltage VHBFB over time period of N_AccHB * t_SrHB is high than the threshold V_OlpHB for time t_OlpHB, the over load protection is triggered and the HB controller, together with PFC, enters auto-restart mode. The HB LLC converter will be stopped and a time break t_AR follows. After this time break, the HB LLC converter restarts again with softstart. LLC OCP1 is implemented with hardware comparator and firmware handling and the condition is checked at every LLC switching. The voltage across the shunt resistor RHB at the low-side MOSFET is sensed via the CS1 pin. There are three different over current protection thresholds V_Ocp1_norm, V_Ocp1_burst and V_Ocp1_startup to cover various operation conditions. The threshold V_Ocp1_startup is applied during startup, the threshold V_Ocp1_burst is applied during leaving burst mode transition to avoid the OCP1 mis-triggered and the relatively lower threshold V_Ocp1_norm is applied during normal operation. If the voltage across the shunt resistor RHB at the low-side MOSFET exceeds the OCP1 threshold, OCP1 protection is triggered to increase the current switching frequency t at rate of t_Slope_after OCP1 to limit the power. The higher switching frequency results in reduced current flowing in the LLC tank and limits the output power transfer. If the sensed current falls below the OCP threshold, the LLC switching frequency starts to be reduced. At the point where the calculated LLC switching frequency based on the HBFB signal is higher than the switching frequency as defined by the OCP1 protection, the LLC converter resumes control under VCO. If above scenario occurs continuously more than N_Ocp1_max times, then there will be a serious fault condition, IC will enter auto restart protection mode to protect the whole system. In the meantime, due to the limited Datasheet 21 Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller power transfer during OCP1 protection, the open loop protection or overload protection could also be triggered to enter auto restart protection mode. Table 7 Parameters LLC Overcurrent protection 1 parameters 1 LLC OCP1 detection during startup 2 LLC OCP1 detection during leaving burst mode 2 LLC OCP1 detection during normal operation mode 4 Maximum overcurrent count for overcurrent protection to trigger Symbol VOcp1_startup Values Min. - Typ. 550 Max. - VOcp1_norm - 427.5 - VOcp1_burst NOcp1_max - 750 8 - Unit Note/Test Condition mV 13 mV 13 mV - This setting is application specific and is changed accordingly for application. Please check setting when application varies. Voltage level triggered only during start up and burst mode. 3 Parameter is not tested in production test. 4 Applicable in normal operation only. Voltage level not triggered for soft-start and burst mode. 1 2 3.5.4.4 LLC Over Current Protection Level 2 (LLCOCP2) 3.6 Operation Flow LLC OCP2 could be triggered by a large primary side current through the shunt resistor. OCP2 is implemented by hardware via the OCP2 comparator. The status of OCP2 hardware can be read by firmware to detect if OCP2 event has occurred for subsequent action to be taken. If the voltage across the shunt resistor is higher than the threshold VOcp2, the system enters into auto restart mode. In this chapter the control flow of the IC are described. Operating flowchart is shown in Figure 14. • • • IC Initialization (Section 4.6.1) Operation flow of the PFC Controller (Section 4.6.2) Operation flow of the HB LLC Controller (Section 4.6.3) 3.6.1 IC Initialization As mentioned previously, once the VCC is above the turn-on threshold, the IC is active. The IC enters initialization state immediately after the VCC is powered up. In the initialization state, the correct setup values are assigned to the control units and then both PFC and HB are enabled. Also refer to Figure 5 for scheduler. Datasheet 22 Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller Figure 14 3.6.2 General Operation Flow of the Controller Operation Flow of the PFC Controller If the PFC is disabled, there is no sensing of any PFC related signal and no switching of the PFC gate driver, the PFC MOSFET gate is actively pulled down to ground. Once the PFC is enabled, the bus voltage is checked against open loop. If no open loop is detected, the PFC begins its operation with softstart. Datasheet 23 Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller During PFC softstart, the PFC starts its operation according to the sensed signals at ZCD, CS0, and VS. The voltage control loop (PI regulator) is kept fast enough and the integrator of the PI regulator growth is limited to avoid output voltage overshoot. As soon as the bus voltage is getting close to the rated value, the PFC enters normal operation state where it is regulated to improve the power factor.The bus voltage is regulated to its rated value. From the PFC protections, OCP does not cause any break of the PFC converter operation but OVP1 and OVP2 will cause a short break of the PFC operation. After the bus voltage comes back to the rated value, the PFC resumes its operation immediately. In case of long time CCM operation, the PFC enters auto-restart state. After the auto-restart time break, the PFC restarts with softstart. 3.6.3 Operation Flow of the Halfbridge LLC Controller If the HB LLC is disabled, there is no sensing of any HB LLC converter related signal and no switching of the high and low side gate driver. The MOSFET gates are actively pulled down to ground. Once the HB LLC is enabled, the controller checks the bus voltage against the HB startup bus voltage VHBstrt. After the HB startup voltage at the PFC bus is reached, the HB LLC controller enters softstart state. In this state, the HB LLC converter switching frequency is controlled by TCO and decreases with time. The output will be built up and feedback signal should be available within the softstart time, tss_max. Once the feedback voltage reaches a certain value that the frequency determined by VCO is equal to current frequency determined by the TCO, the controller enters normal operation state, feedback signal is then used for the output regulation by the VCO. Some failures may stop the HB operation and lead the controller back to valid bus voltage check, i.e. by bus under voltage, or the softstart state after the HB auto-restart time break, i.e. by open loop or over load. In case of the over current protection 2 (OCP2), the HB LLC converter enters system auto-restart mode. A comprehensive set of protection is integrated inside this controller for PFC and HB LLC converter. Some of them have just influence on the PFC or HB LLC only while some have influence on the other part of the controller. This information is summarized as in the Table 8 and Table 9. Table 8 PFC Protections If Enabled Protection Effect on PFC converter Bus over voltage VVS > V_OvpSwSetPFC: blocks gate signal; protection 1 VVS < V_RefPFC: releases gate signal Bus over voltage VVS > V_OvpHwSetPFC: blocks gate signal protection 2 VVS < V_RefPFC: releases gate signal Bus under voltage VVS < V_UvpSetPFC: stops operation Effect on HB converter no influence no influence VVS < VUvpSetPFC : LLC continues switching VS open loop VVS < V_OlpPFC for : no startup of PFC no start up protection PFC over current VCS0 > V_CS0ocpSet for t_OcpLebPFC: stops gate protection immediately; no effect next gate turn-on triggered by ZCD or t_maxPFC PFC on time from regulator ton < t_OnMinPFC : PFC minimal on-time blocks PFC gate signal; no effect ton > t_OnMinPFC: releases PFC gate signal PFC maximal on-time ton > t_OnMaxPFC : ton= tOnMaxPFC no effect PFC Brownin VACrms > V_HVBID: Enters startup no effect VACrms < V_HVBOD: After a blanking time of PFC Brownout LLC continues switching t_HVBODblank, stops PFC operation PFC long time CCM CCM operation for longer than t_CcmpPFC : system Auto-restart protection Table 9 Datasheet LLC Protections If Enabled 24 Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller Protection HB over current protection 1 HB over current protection 2 HB open control loop protection HB over load protection 3.7 Effect on PFC converter Effect on HB converter VCS1 > V_OCP1 for N_Ocp1_max : system Auto-restart VCS1 > V_OCP2 : system Auto-restart VHBFB > V_OlpHB for t_OlpHB: system Auto-restart Overview Protection Features The following table provides an overview about the complete protection feature set. The corresponding default actions are listed for the cases where a protection feature is triggered. If the application requires different behavior for the items in the table 8, please contact Infineon representatives. Table 10 Overview Protection Features Protection Fatures Undervoltage Lockout for VCC Overvoltage Protection for VCC Overtemperature Protection by means of internal Temperature Detection PFC Open Control Loop Protection PFC Inductor Over Current Protection PFC Output Over Voltage Protection PFC Output Redundtant Over Voltage Protection PFC Output Under Voltage Protection Symbol ULVO VCCOVP OTP PFCOCLP PFCOCP PFCOVP PFCROVP Default Action PFC and LLC stop switching Auto restart Auto restart Auto restart PFC turns off switch immediately PFC stops switching Auto restart Description Chapter 3.7.1 Chapter 3.7.2 Chapter 3.7.3 Chapter 3.4.3.1 Chapter 3.4.3.2 Chapter 3.4.3.3 Chapter 3.4.3.4 PFCUVP PFC stops switching while LLC Chapter 3.4.3.5 continues switching PFC Brownin Protection for AC Input PFCBIP IC starts switching operation after Chapter 3.4.3.6 Line (PFCBIP) threshold exceeded PFC Brownout Protection for AC Input PFCBOP PFC stops switching while LLC Chapter 3.4.3.7 Line continues switching PFC Long Time Continuous Conduction PFCCMP Auto restart Chapter 3.4.3.8 Mode Protection LLC Open Control Loop Protection LLCOCLP Auto restart Chapter 3.5.4.1 LLC Over Load Protection LLCOLP Auto restart Chapter 3.5.4.2 LLC Over Current Protection 1 LLCOCP1 Frequency increases Chapter 3.5.4.3 LLC Over Current Protection 2 LLCOCP2 Auto restart Chapter 3.5.4.4 3.7.1 Undervoltage Lockout for VCC There is an undervoltage lockout unit (UVLO) implemented, that ensures a defined enabling and disabling of the IC operation depending on the supply voltage at pin VCC. The UVLO contains a hysteresis with the voltage thresholds VVCCon for enabling the IC and VVCCoff for disabling the IC. Once the mains input voltage is applied, a current is flowing through an external resistor into pin HV via the integrated diode to pin VCC. The IC is enabled once VCC exceeds the threshold VVCCon and enters normal operation if no fault condition is detected. In this phase VVCC will drop until the self supply via the auxiliary winding takes over the supply at pin VCC. The self supply via the auxiliary winding must be therefore in place before VVCC undershoots the VVCCoff threshold. Datasheet 25 Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller 3.7.2 Overvoltage Protection for VCC 3.7.3 Overtemperature Protection by means of internal Temperature Detection There is an over voltage detection at pin VCC implemented. The detection function consists of a threshold V_VCCOVP and a blanking time of t_VCCOVP. The IC is disabled once the overvoltage protection is triggered at pin VCC. There is an over temperature protection implemented, that initiates a thermal shutdown once the internal temperature level T_OTP is exceeded. Subsequently if the temperature falls down and hits the reset value T_OTP_reset, device will resume switching with softstart. Datasheet 26 Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller 3.8 Fixed and Configurable Parameters 3.8.1 Fixed Parameters In this chapter all the fixed and configurable parameters are shown. The list of parameters shown in the following tables is default value and has been verified in a reference design system. The below parameters are fixed and cannot be changed. Table 11 General Parameters Parameter Symbol V_VCCOVP t_HVBODBlank T_OTP T_OTP_reset Table 12 n_valley_min n_valley_max Table 13 V_burst_on t_Ocp1_blk_Leave_burst 3.8.2 Table 14 Parameter Description LLC VCO frequency decrement step LLC VCO frequency increment step LLC LEB of OCP1 LLC noise blanking CS1 OCP2 LLC softstart slope after OCP1 event LLC HBFB voltage burst on in burst mode LLC OCP1 blanking time during burst mode to normal mode transition LLC max. soft start duration Configurable Parameters Pin VCC - Fixed Value 23.5 120 125 90 Unit V ms °C °C Pin VS VS VS ZCD ZCD Fixed Value 0.39 0.59 2.45 160 400 Unit V V V ns ns - 10 60 40 0 - ms µs s Pin HBFB HBFB CS1 CS1 CS1 Fixed Value 3 20 0.4 110 80 Unit 1/ fMCLK 1/ fMCLK µs ns ns/32µs CS1 200 ms - CS0 HBFB - 1 1.65 131 The below parameters are defined and can be configured.General Parameters Parameter Symbol V_HVBID V_HVBOD t_AR Datasheet Parameter Description PFC open loop PFC startup voltage PFC control_normal PFC ZCD filter time PFC Ringing suppression time Minimum PFC valley number for multimode operation Maximum PFC valley number for multimode operation PFC Blanking time for CCM protection PFC max switching periodtosc Blanking time for PFC OCP LLC Parameters Parameter Symbol Step_LLC_VCO_decrease Step_LLC_VCO_increase t_Ocp1_leb t_Ocp2_filter Slope_after OCP1 t_ss_max VCC OVP AC brownout blanking time IC OTP IC OTP reset PFC Parameters Parameter Symbol V_OlpPFC V_startup V_RefPFC t_ZCDfilter t_ringsup t_CcmpPFC t_maxPFC t_OcpLebPFC Parameter Description Parameter Description AC brownin AC brownout Auto restart break time 27 Pin HV HV - Default 70 60 2 Range 1 ~ 255 1 ~ 255 0.01~2.08 - V ms Unit Vac Vac s Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller Parameter Symbol t_VCCOVP Parameter Description VCC OVP blanking time Parameter Symbol V_GD0H 1 I_GD0H 1 V_UvpSetPFC V_RefPFC_burst V_HBstrt Parameter Description PFC GD0 drive voltage PFC GD0 drive current PFC bus under voltage PFC control_burst LLC enter soft start PFC blanking time for bus under voltage PFC over voltage comparator filter time PFC bus over voltage PFC bus over voltage clear PFC over current PFC max switching frequency PFC min switching frequency PFC PIT1 P-coe during startup PFC PIT1 P-coe PFC PIT1 I-coe PFC PIT1 T-coe PFC min on time PFC max on time Table 15 PFC Parameters t_UvpBlkPFC t_ovc 1 2 V_OvpSwSetPFC V_OvpSwClearPFC V_CS0ocpSet 2 f_sw_max_pfc f_sw_min_pfc svp_startup Svp Svi Svt t_OnMinPFC t_OnMaxPFC Refer to 5.4.6 for limits Refer to 5.4.4 for limits Table 16 LLC Parameters Parameter Symbol V_GD1H 1 I_GD1H 1 V_Ocp1_norm 1 V_Ocp1_start 1 V_Ocp1_burst 1 N_Ocp1_max f_Ocp1 V_burst_enter V_burst_exit V_OlpHB V_HLVCO V_LLVCO f_MaxVCO f_LLVCO f_NomVCO f_HLVCO Datasheet Parameter Description LLC GD1 drive voltage LLC GD1 drive current LLC OCP1 during steady state LLC OCP1 during softstart LLC OCP1 during burst mode LLC max number of OCP1 events LLC switching frequency during OCP1 LLC HBFB voltage when entering a burst mode LLC HBFB voltage when exiting burst mode LLC open-loop / overload protection LLC VCO heavy load voltage LLC VCO light load voltage LLC VCO max frequency LLC VCO light load frequency LLC nominal operating frequency LLC VCO heavy load frequency 28 Pin - Default 9 Range 1~17 Unit ms Pin GD0 GD0 VS VS VS Default 10.5 0.156 1.77 2.2 2.05 Range 4.5 ~ 15 0.087 ~ 0.36 0.1 ~ 2.3 0.1 ~ 2.3 0.1 ~ 2.3 Unit V A V V V VS 10000 0 ~ 31500 ns VS 3 0.128 ~ 8388 2.572 2.45 0.6 120 60 4 6 7 4 0.1 20 2 ~ 2.8 2 ~ 2.8 0.05 ~ 1.15 1 ~ 300 1 ~ 300 0~7 0~7 0~7 0~7 0.016 ~ 63.98 0.016 ~ 63.98 V V V kHz kHz µs µs Pin GD1 GD1 CS1 CS1 CS1 Default 10.5 0.12 0.4275 0.55 0.75 Range 4.5 ~ 15 0.026 ~ 0.12 0.05 ~ 1.15 0.05 ~ 1.15 0.05 ~ 1.15 Unit V A V V V CS1 200 100 ~ 600 kHz HBFB 2.05 0.1 ~ 2.3 V HBFB HBFB - 2 0.45 250 140 - 85 VS VS CS0 - CS1 HBFB HBFB - 8 0.3 2 100 1 ~ 255 0.1 ~ 2.3 0.1 ~ 2.3 ms - V V 0.1 ~ 2.3 0.1 ~ 2.3 1 ~ 300 1 ~ 300 V V kHz kHz 1 ~ 300 kHz 1 ~ 300 kHz Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller Parameter Symbol f_MinVCO f_sw_burst_start f_sw_burst_stop f_sw_burst f_MaxTCO t_Ocp1_blk_startup t_Ocp1_release t_Ocp1_filter t_blk_Ocp2 t_dead_llc t_OlpHB t_blk_burst Slope_TCO_init Slope_TCO_min N_burst_sstart N_burst_sstop T_burst_on_max Slope_burst_leave 1 THigh_limit Burst_off_time Refer to 5.4.6 for limits Datasheet Parameter Description LLC VCO minimal frequency LLC starting frequency in burst mode LLC ending frequency in burst mode LLC switching frequency during burst mode LLC max. soft start frequency LLC OCP1 blanking time from startup threshold to low threshold during startup LLC releasing OCP1 lapse time LLC blanking filter time CS1 OCP1 LLC blanking time for OCP2 LLC dead time LLC blanking time before openloop / overload protection Blanking time to enter burst mode LLC initial slope during soft start LLC min slope during soft start LLC soft start steps LLC soft stop steps LLC burst on time (excluding soft stop time) LLC slope of soft start when leaving burst mode High limit of burst off time for adaptive minimum frequency during burst on 29 Pin - Default 82 - 200 - CS1 CS1 CS1 - 50 ~ 200 270 0.032 ~ 2097 0 0 ~ 984 100 0 0.5 - 4 4 - 100 ~ 300 200 0.85 HBFB kHz 130 - - 80 ~ 300 80 ~ 300 100 - Unit kHz 200 - Range 1 ~ 300 20 0.36 0.032 ~ 2097 0 ~ 984 0.0157 ~ 0.984 kHz kHz ms ms ns ns µs 0.032 ~ 2097 ms 0.0157 ~ 3.984 0.0157 ~ 3.984 1 ~ 218 1 ~ 218 µs /128 µs µs /128 µs - 0.0157 ~ 3.984 µs /128 µs 0.032 ~ 2097 160 32 ~8160 120 20 ~ 200 0.32 kHz ms us ms Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller All signals are measured with respect to ground pin GND, except the highside signals at pins HSVCC and HSGD, which are measured with respect to pin HSGND. The voltage levels are valid if other ratings are not violated. 4.1 Absolute Maximum Ratings Note : Stresses above the values listed above may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Maximum ratings are absolute ratings; exceeding only one of these values may cause irreversible damage to the integrated circuit.These values are not tested during production test. For the same reason make sure that any capacitors that will be connected to pins VCC and HSVCC are discharged before assembling the application circuit. Table 17 Parameters Absolute Maximum Ratings Voltage externally supplied to pin VCC Voltage at pin GDx Junction temperature Storage temperature Symbol VVCCEXT Min. - 0.5 TJ - 40 VGDx TS Soldering temperature TSOLD ESD capability HBM ESD capability CDM Input Voltage Limit for pin MFIO, HBFB, VS, CS, ZCD Maximum permanent clamping current for pin ZCD and CS Maximum transient clamping current for pin ZCD and CS Maximum negative transient input voltage for ZCD VHBM VCDM Latch-up capability Maximum negative transient input voltage for CS Maximum permanent positive clamping current for CS Maximum transient positive clamping current for CS Maximum voltage at pin HV Maximum current at pin HV Voltage at pins HSVCC, HSGD and HSGND Datasheet Limit Values -0.5 - 55 — ILU — ICLP_TR 260 °C Wave Soldering 1 V V 3 150 150 1.5 V — 2.5 mA V — 10 3.0 10 - 0.3 600 VHSx -650 +650 — 30 °C — 3.6 VHV IHV °C mA — ICLP_DC °C 2.5 — –VIN_CS 125 — –ICLN_TR –VIN_ZCD V 2000 500 - 0.5 Remarks V — — VIN_DC –ICLN_DC Max. 26 VVCC + 0.3 Unit 10 V mA V mA mA V 2 Pin voltages acc. to abs. max. ratings 4 RMS pulse < 500ns pulse < 500ns pulse < 500ns RMS pulse < 500ns Isolation voltage, referred to IC GND Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller According to JESD22-A111 Rev A. Latch-up capability according to JEDEC JESD78D, TA= 85°C. 3 ESD-HBM according to ANSI/ESDA/JEDEC JS-001. 4 ESD-CDM according to JESD22-C101F. 1 2 4.2 Table 18 Parameters Package Characteristics Package Characteristics Symbol Thermal resistance Creepage distance HV vs. GND-related pins. Creepage distance HSGND vs. GND-related pins 4.3 Table 19 Parameters Operating Range Junction Temperature RthJA Max. 119 K/W DCRHS 2.1 — mm Symbol Voltage externally supplied to VCC pin 2.1 — VVCC VUVOFF Max. 125 VVCCEXT — 24 VGD -0.5 Gate driver pin voltage 4.4 DC Electrical Characteristics 4.4.1 Power Supply Characteristics Remarks mm Limit Values Min. -40 TJ Lower VCC limit Unit Min. — DCRHV Operating Conditions Limit Values Unit Remarks °C — V V VVCC + 0.3 V device is held in reset when VVCC < VUVOFF maximum voltage that can be applied to pin VCC by an external voltage source The electrical characteristics involve the spread of values given within the specified supply voltage and junction temperature range, TJ from -40 °C to +125 °C. Typical values represent the median values related to TA = 25 °C. All voltages refer to GND, and the assumed supply voltage is VVCC = 18 V, if not specified otherwise. Not all values given in the tables are tested during production test. The values not tested are explicitly marked. Table 20 Parameters Electrical Characteristics of the Power Supply VCC Turn_On threshold VCC active current in normal mode with open gates VCC Turn_Off 1 threshold Datasheet Symbol VVCCon Min. 19 VVCCoff 7.12 IVCCactive — 31 Values Typ. 20.5 18 7.5 Max. 22 — 7.88 Unit Note/Test Condition V mA V dVCC/dt = 0.2 V/ms Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller Parameters Symbol VCC Tun_Off 1 threshold in burst off mode 2 VVCCoff_burst_off VCC quiescent current in burst off mode 2, not include current drawn from HBFB pin 3 IC Power down threshold VCC quiescent current in Power down mode 1 VCC 2 Min. 9.97 Values Typ. — IVCC_burst_off VVCC_PD 5.7 IVCC_PD 10.5 11.03 — 3.3 VCC Tun_Off 1 threshold in burst off mode 2 mA Tj ≤ 85°C mA Tj ≤ 125°C 40 µA 0.6 — 6 5 Max. Unit Note/Test Condition 20 1.4 6.3 V V VVCC < VVCC_PD(min) – 0.3V Turn_Off means IC is in UVLO mode and the startup cell is turned on. Burst on and burst off mode are both in burst mode while the current consumption of the IC is same as in normal mode during burst on mode and the processor is turned off in burst off mode (refer to Figure 4). 3 Total current in burst off mode = IVCC_burst_off + VHBFB_open/RHBFB_PU, refer to Figure 3 for internal connection of HBFB pin. 4.4.2 Characteristics of the MFIO Pin Table 21 Parameters Electrical Characteristics of the MFIO Pin Output low voltage Output high voltage Output sink current Output source current Output rise time (0 → 1) Output fall time (1 → 0) 1 Not tested in production test. 4.4.3 Table 22 Parameters Table 23 Parameters tFALL — tRISE — Symbol VHBFB_open RHBFB_PU ΔRHBFB_PU Values Typ. — — — — — — Min. 3.04 — — Values Typ. 3.20 9 — Max. 0.8 — 2 2 25 25 Max. 3.36 — ± 20 Characteristics of the Current Sense Inputs CSx Electrical Characteristics of the CSx Pin OCP2 threshold voltage OCP2 threshold tolerance Datasheet Min. — 2.2 — — Electrical Characteristics of the HBFB Pin 1 Not tested in production test. 4.4.4 VOL VOH IOL -IOH Characteristics of the HBFB Pin HBFB open voltage Pull-up resistor Pull-up resistor tolerance 1 Symbol Symbol VOCP2 ΔVOCP2 Min. — — 32 Values Typ. 1.2 — Max. — ±5 Unit Note/Test Condition V IOL = 2 mA V IOH = –2 mA mA mA 20 pF load, push/pull ns output 1 20 pF load, push/pull ns or open-drain output 1 Unit Note/Test Condition V kΩ % Unit Note/Test Condition V % voltage divider tolerance Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller Parameters OCP, OCP1 threshold tolerance Delay from VCSx crossing VCSxOCP1 to CSx_OCP1 rising edge, 1.2V range 1 2 Symbol ΔVOCP1 tCSOCP1 Not tested in production test. Min. — 20 90 90 Values Typ. — Max. ±6.2 170 250 320 140 620 210 Unit Note/Test Condition % 1 ns input signal slope dVCS/dt = 10 mV/µs 2 1 input signal slope dVCS/dt = 150mV/µs 2 ns 2 ns 1 input signal slope dVCS/dt = 300mV/µs This slope represents a use case of a switch-mode power supply with minimum input voltage. 4.4.5 Table 24 Parameters Characteristics of the Zero Crossing Input ZCD Zero-Crossing Comparator Characteristics Zero-crossing threshold Comparator propagation delay Input voltage negative clamping level 4.4.6 Table 25 Parameters Symbol VZCTHR tZCPD –VINPCLN Min. 15 30 140 180 Characteristics of the Gate Driver Pins GDx Max. 70 70 220 Electrical Characteristics of the Gate Driver Pins GD0 and GD1 APD low voltage (Active Pull Down while device is not powered or gate driver is not enabled) RPPD tolerance Driver Output low impedance for GD0 Driver Output low impedance for GD1 Symbol VAPD ΔRPPD RGDL RGDL 1.6 V — — ± 25 % — — 7.0 Ω — — VGDxHRR VVCC - 0.5 ΔIGDxH — IGD0DIS mV Max. Rail-to-rail output high voltage Discharge current for GD0 mV ns Min. ΔVGDxH Output high current tolerance in PWM mode Unit Note/Test Condition Values Typ. Output voltage tolerance Datasheet Values Typ. 40 50 — 800 33 — — — 4.4 Unit Note/Test Condition Ω ±5 % — VVCC V — ±15 % — — dVZCD/dt = 4V/µs mA IGDx = 5mA 1 permanent pulldown resistor inside gate driver TJ ≤ 125°C, IGD = 0.1 A TJ ≤ 125°C, IGD = 0.1 A tolerance of programming options if VGDH > 10V if VVCC < programmed VGDH and output at high state VGD = 4 V and driver at low state 1 Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller Parameters Discharge current for GD1 Output low reverse current 1 Output high reverse current in PWM mode Not tested in production test 4.4.7 Table 26 Parameters 1 — 100 — — 1/6 of IGDH IHVleak RHV_discharge ILD Max. 200 — 1000 3.2 Electrical Characteristics of the VS pin Symbol |ILK| VOvpHwSetPFC Pad leakage verified with guard bands at TA = 25°C. Min. — 2.70 — 5 Values Typ. — 2.8 mA mA — Min. — Unit Note/Test Condition — Values Typ. Characteristics of the VS Pin Input leakage current, no pull device PFC Overvoltage protection 2, OVP2 4.4.9 — 500 IGDREVH Symbol Current charging capability for VCC cap. Parameters -IGDREVL Max. Electrical Characteristics of the HV PIN Resistor value for bleeding path Table 27 IGD1DIS Min. Values Typ. Characteristics of the High-Voltage Pin HV Leakage current at HV pin 4.4.8 Symbol 10 7.5 Max. 200 2.90 mA VGD = 4 V and driver at low state 1 applies if VGD < 0 V and driver at low state 1 applies if VGDxH < VGD and driver at high state 1 Unit Note/Test Condition µA Ω mA VHV = 600 V HV startup cell off Overall resistance between VIN to GND VVCC < VVCCon -0.3V Unit Note/Test Condition nA V VVS ≤ 2.9V 1 Characteristics of the HSGD Pin The electrical characteristics involve the spread of values given within the specified supply voltage and junction temperature range, TJ from -40 °C to +125 °C. Typical values represent the median values related to TJ = 25 °C. All voltages refer to HSGND, and the assumed supply voltage is VHSVCC = 14 V, if not specified otherwise. Table 28 Parameters Electrical Characteristics of the HSGD pin Operating voltage range HSVCC turn on threshold Datasheet Symbol VHSVCC VHSVCCon Min. — 8.7 34 Values Typ. — 9.2 Max. 24 9.7 Unit Note/Test Condition V V lower limit defined by VHSVCCon, VHSVCCoff Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller Parameters HSVCC turn off threshold HSVCC turn on/off hysteresis Output voltage at low state Output voltage at high state Output voltage at active shutdown Output low impedance Peak source current Peak sink current Output low reverse current Rising time 2V < VHSGD < 8V 1 Falling time 8V > VHSGD > 2V Not tested in production test Datasheet Symbol VHSVCCoff VHSVCChy VHSGDlow -VHSGDlow VHSGDhigh VHSGDuvlo Min. 6.2 2 — — — 10 7 — RHSGDLS IHSGDpksrc -IHSGDpksnk — 0.13 0.45 tHSGDrise 20 -IHSGDREVL tHSGDfall — 4 Values Typ. 6.7 2.5 25 125 25 11 — 25 — 200 — — — 5 0.52 1.3 60 140 — 20 35 Max. 7.2 3 100 500 100 12 Unit Note/Test Condition V V mV mV mV V V mV Ω A A 100 mA 40 ns ns IHSGD = 20 mA (sink) IHSGD = 100 mA (sink) IHSGD = -20 mA (src) IHSGD = -20 mA (src) IHSGD = -20 mA (src) VHSVCC = 8 V IHSGD = 20 mA (sink) VHSVCC = 5 V IHSGD = 20 mA (sink) 1 1 applies if VHSGD < 0 V and driver at low state 1 CLOAD = 3.3 nF, RLOAD = 6.8 Ω 1 CLOAD = 3.3 nF, RLOAD = 6.8 Ω 1 Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller Figure 15 PG-DSO-16 Note: Please read the Getting Started guide to learn how to use the macro’s and styles in this template. 1) 2) You can find all of our packages, sorts of packing and others in our Infineon Internet Page “Products”: http://www.infineon.com/products. Dimensions in mm. Datasheet 36 Rev. V2.0, 2017-03-21 IDP2303 Digital Multi-Mode PFC + LLC Combo Controller Major changes since the last revision Page or Reference 27 27 28 28 28 Datasheet Description of change Correct typo of T_OTP and T_OTP_reset Delete foot note 1 Add foot note 2 V_ocp1_burst description is changed to during burst mode f_sw_burst_start and f_sw_burst_stop range is changed to 80~300kHz 37 Rev. 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