StrongIRFET™
IRF100B202
HEXFET® Power MOSFET
Application
Brushed Motor drive applications
BLDC Motor drive applications
Battery powered circuits
Half-bridge and full-bridge topologies
Synchronous rectifier applications
Resonant mode power supplies
OR-ing and redundant power switches
DC/DC and AC/DC converters
DC/AC Inverters
S
TO-220
max
8.6m
97A
TO-220AB
IRF100B202
D
Drain
Standard Pack
Form
Quantity
Tube
50
25
S
Source
Orderable Part Number
IRF100B202
100
ID = 58A
80
20
TJ = 125°C
15
10
TJ = 25°C
60
40
20
5
0
2
4
6
8
10
12
14
16
18
20
VGS, Gate -to -Source Voltage (V)
Fig 1. Typical On– Resistance vs. Gate Voltage
1
7.2m
S
D
G
ID, Drain Current (A)
RDS(on), Drain-to -Source On Resistance (m)
IRF100B202
RDS(on) typ.
ID (Silicon Limited)
G
Gate
Package Type
100V
G
Benefits
Improved Gate, Avalanche and Dynamic dV/dt Ruggedness
Fully Characterized Capacitance and Avalanche SOA
Enhanced body diode dV/dt and dI/dt Capability
Lead-Free, RoHS Compliant, Halogen-Free
Base part number
VDSS
D
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25
50
75
100
125
150
175
TC , Case Temperature (°C)
Fig 2. Maximum Drain Current vs. Case Temperature
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IRF100B202
Absolute Maximum Rating
Symbol
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
TJ
TSTG
Parameter
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
Mounting Torque, 6-32 or M3 Screw
Max.
97
68
380
221
1.5
± 20
Units
A
W
W/°C
V
-55 to + 175
°C
300
10 lbf·in (1.1 N·m)
Avalanche Characteristics
EAS (Thermally limited)
EAS (Thermally limited)
EAS (tested)
IAR
EAR
189
Single Pulse Avalanche Energy
Single Pulse Avalanche Energy
Single Pulse Avalanche Energy Tested Value
Avalanche Current
Repetitive Avalanche Energy
mJ
292
217
See Fig 15, 16, 23a, 23b
Thermal Resistance
Symbol
Parameter
Junction-to-Case
RJC
Case-to-Sink, Flat Greased Surface
RCS
Junction-to-Ambient
RJA
Typ.
–––
0.50
–––
Max.
0.68
–––
62
A
mJ
Units
°C/W
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
V(BR)DSS
Drain-to-Source Breakdown Voltage
Min.
100
Typ. Max.
––– –––
Units
Conditions
V
VGS = 0V, ID = 250µA
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient
–––
0.10
–––
V/°C
RDS(on)
VGS(th)
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
IDSS
Drain-to-Source Leakage Current
–––
2.0
–––
–––
–––
–––
–––
7.2
–––
–––
–––
–––
–––
2.4
8.6
4.0
20
250
100
-100
–––
m VGS = 10V, ID = 58A
V
VDS = VGS, ID = 150µA
VDS =100 V, VGS = 0V
µA
VDS = 80V,VGS = 0V,TJ =125°C
VGS = 20V
nA
VGS = -20V
IGSS
RG
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Gate Resistance
Reference to 25°C, ID = 5mA
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.113mH, RG = 50, IAS = 58A, VGS =10V.
ISD 58A, di/dt 1316A/µs, VDD V(BR)DSS, TJ 175°C.
Pulse width 400µs; duty cycle 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS.
R is measured at TJ approximately 90°C.
Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 24A, VGS =10V.
This value determined from sample failure population, starting TJ =25°C, L= 0.113mH, RG = 50, IAS =58A, VGS =10V.
2
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IRF100B202
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Qg
Qgs
Qgd
Qsync
td(on)
tr
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain Charge
Total Gate Charge Sync. (Qg– Qgd)
Turn-On Delay Time
Rise Time
Min.
123
–––
–––
–––
–––
–––
–––
Typ.
–––
77
20
23
54
11
56
td(off)
Turn-Off Delay Time
–––
55
tf
Ciss
Coss
Crss
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Effective Output Capacitance
(Energy Related)
Output Capacitance (Time Related)
–––
–––
–––
–––
58
4476
319
154
–––
355
–––
VGS = 0V, VDS = 0V to 80V
–––
385
–––
VGS = 0V, VDS = 0V to 80V
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Min.
Typ.
Max. Units
–––
–––
97
–––
–––
380
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
VSD
Diode Forward Voltage
–––
–––
1.3
dv/dt
Peak Diode Recovery dv/dt
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
–––
–––
–––
–––
–––
28
51
58
105
133
–––
–––
–––
–––
–––
IRRM
Reverse Recovery Current
–––
3.7
–––
Coss eff.(ER)
Coss eff.(TR)
Max. Units
Conditions
–––
S VDS = 10V, ID =58A
116
ID = 58A
–––
VDS = 50V
nC
–––
VGS = 10V
–––
–––
VDD = 65V
ID = 58A
–––
ns
–––
RG= 2.7
VGS = 10V
–––
–––
–––
–––
pF
VGS = 0V
VDS = 50V
ƒ = 1.0MHz, See Fig.5
Diode Characteristics
Symbol
IS
ISM
3
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A
V
D
G
S
TJ = 25°C,IS = 58A,VGS = 0V
V/ns TJ = 175°C,IS =58A,VDS = 100V
TJ = 25°C
VDD = 85V
ns
TJ = 125°C
IF = 58A,
TJ = 25°C di/dt = 100A/µs
nC
TJ = 125°C
A
TJ = 25°C
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IRF100B202
1000
1000
100
BOTTOM
VGS
15V
10V
7.0V
6.0V
5.5V
5.0V
4.5V
4.0V
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
10V
7.0V
6.0V
5.5V
5.0V
4.5V
4.0V
10
4.0V
100
BOTTOM
4.0V
10
60µs PULSE WIDTH
60µs PULSE WIDTH
Tj = 25°C
1
0.1
Tj = 175°C
1
10
1
100
0.1
VDS, Drain-to-Source Voltage (V)
3.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current (A)
100
Fig 4. Typical Output Characteristics
1000
100
10
TJ = 175°C
TJ = 25°C
1
VDS = 50V
60µs PULSE WIDTH
0.1
ID = 58A
VGS = 10V
2.5
2.0
1.5
1.0
0.5
1
2
3
4
5
6
7
8
-60
60
100
140
180
14
VGS, Gate-to-Source Voltage (V)
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
10000
Ciss
1000
20
Fig 6. Normalized On-Resistance vs. Temperature
Fig 5. Typical Transfer Characteristics
100000
-20
TJ , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
C, Capacitance (pF)
10
VDS, Drain-to-Source Voltage (V)
Fig 3. Typical Output Characteristics
Coss
Crss
100
ID = 58A
12
VDS = 80V
VDS = 50V
10
VDS= 20V
8
6
4
2
0
0.1
1
10
100
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage
4
1
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0
20
40
60
80
100
QG, Total Gate Charge (nC)
Fig 8. Typical Gate Charge vs.
Gate-to-Source Voltage
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IRF100B202
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
100
TJ = 175°C
TJ = 25°C
10
1
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100µsec
100
1msec
10
10msec
Tc = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
1
0.1
0.0
0.5
1.0
1.5
0.1
2.0
1
10
100
VDS , Drain-to-Source Voltage (V)
VSD , Source-to-Drain Voltage (V)
Fig 10. Maximum Safe Operating Area
Fig 9. Typical Source-Drain Diode Forward Voltage
2.0
130
Id = 5.0mA
1.6
120
Energy (µJ)
V(BR)DSS, Drain-to-Source Breakdown Voltage (V)
DC
110
100
1.2
0.8
0.4
0.0
90
0
-60 -40 -20 0 20 40 60 80 100120140160180
TJ , Temperature ( °C )
20
60
80
100
120
VDS, Drain-to-Source Voltage (V)
Fig 11. Drain-to-Source Breakdown Voltage
RDS (on), Drain-to -Source On Resistance (m)
40
Fig 12. Typical Coss Stored Energy
40
VGS = 5.0V
VGS = 5.5V
VGS = 6.0V
VGS = 7.0V
VGS = 8.0V
VGS = 10V
35
30
25
20
15
10
5
0
20
40
60
80
100
120
ID, Drain Current (A)
Fig 13. Typical On– Resistance vs. Drain Current
5
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IRF100B202
Thermal Response ( Z thJC ) °C/W
1
D = 0.50
0.20
0.1
0.10
0.05
0.02
0.01
0.01
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Avalanche Current (A)
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
Tstart =25°C (Single Pulse)
100
0.01
10
0.05
0.10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Avalanche Current vs. Pulse Width
EAR , Avalanche Energy (mJ)
200
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 58A
150
100
50
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy vs. Temperature
6
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Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1.Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for every
part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not
exceeded.
3. Equation below based on circuit and waveforms shown in Figures
23a, 23b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage
increase during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax
(assumed as 25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 14)
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
Iav = 2T/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
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IRF100B202
30
3.5
25
IF = 39A
VR = 85V
3.0
20
TJ = 25°C
TJ = 125°C
IRRM (A)
VGS(th), Gate threshold Voltage (V)
4.0
2.5
2.0
1.5
15
10
ID = 150µA
ID = 250µA
ID = 1.0mA
ID = 1.0A
5
0
1.0
-75 -50 -25
0
100 200 300 400 500 600 700 800 900 1000
25 50 75 100 125 150 175
diF /dt (A/µs)
TJ , Temperature ( °C )
Fig 18. Typical Recovery Current vs. dif/dt
Fig 17. Threshold Voltage vs. Temperature
1600
25
TJ = 25°C
TJ = 125°C
1200
15
QRR (nC)
IRRM (A)
20
IF = 39A
VR = 85V
IF = 58A
VR = 85V
10
TJ = 25°C
TJ = 125°C
800
400
5
0
0
100 200 300 400 500 600 700 800 900 1000
100 200 300 400 500 600 700 800 900 1000
diF /dt (A/µs)
diF /dt (A/µs)
Fig 19. Typical Recovery Current vs. dif/dt
Fig 20. Typical Stored Charge vs. dif/dt
1600
IF = 58A
VR = 85V
QRR (nC)
1200
TJ = 25°C
TJ = 125°C
800
400
0
100 200 300 400 500 600 700 800 900 1000
diF /dt (A/µs)
Fig 21. Typical Stored Charge vs. dif/dt
7
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IRF100B202
Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
V(BR)DSS
tp
15V
DRIVER
L
VDS
D.U.T
RG
IAS
20V
tp
+
V
- DD
A
I AS
0.01
Fig 23a. Unclamped Inductive Test Circuit
Fig 23b. Unclamped Inductive Waveforms
Fig 24a. Switching Time Test Circuit
Fig 24b. Switching Time Waveforms
Id
Vds
Vgs
VDD
Vgs(th)
Qgs1 Qgs2
Fig 25a. Gate Charge Test Circuit
8
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Qgd
Qgodr
Fig 25b. Gate Charge Waveform
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IRF100B202
TO-220AB Package Outline (Dimensions are shown in millimeters (inches))
TO-220AB Part Marking Information
EXAM PLE:
T H IS IS A N IR F 1 0 1 0
LO T C O D E 1789
ASSEM BLED O N W W 19, 2000
IN T H E A S S E M B L Y L IN E "C "
N o t e : "P " in a s s e m b ly lin e p o s it io n
in d ic a t e s "L e a d - F r e e "
IN T E R N A T IO N A L
R E C T IF IE R
LO G O
ASSEM BLY
LO T C O D E
PART NUM BER
D ATE C O D E
YEA R 0 = 2000
W EEK 19
L IN E C
TO-220AB packages are not recommended for Surface Mount Application.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
9
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IRF100B202
Qualification Information†
Industrial
(per JEDEC JESD47F) ††
Qualification Level
Moisture Sensitivity Level
TO-220
N/A
Yes
RoHS Compliant
†
Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability/
††
Applicable version of JEDEC standard at the time of product release.
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit http://www.irf.com/whoto-call/
10
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