IRFB3256PBF

PD - 97727 IRFB3256PbF HEXFET® Power MOSFET D Applications l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits G S Benefits l Improved Gate, Avalanche and Dynamic dV/dt Ruggedness l Fully Characterized Capacitance and Avalanche SOA l Enhanced body diode dV/dt and dI/dt Capability l Lead-Free VDSS RDS(on) typ. max. ID (Silicon Limited) ID (Package Limited) 60V 2.7mΩ 3.4mΩ 206A 75A D G D S TO-220AB G D S Gate Drain Source Absolute Maximum Ratings Symbol ID @ TC = 25°C ID @ TC = 100°C ID @ TC = 25°C IDM PD @TC = 25°C VGS Parameter Max. Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Package Limited) 206 172 75 820 300 2.0 ± 20 3.3 -55 to + 175 c Pulsed Drain Current Maximum Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 screw e dv/dt TJ TSTG Avalanche Characteristics Single Pulse Avalanche Energy (Thermally Limited) Avalanche Current Repetitive Avalanche Energy EAS IAR EAR c Thermal Resistance Symbol RθJC RθCS RθJA www.irf.com c Parameter ij Junction-to-Case Case-to-Sink, Flat Greased Surface Junction-to-Ambient Units A W W/°C V V/ns °C 300 (1.6mm from case) 10lbf in (1.1N m) x d x 340 See Fig. 14, 15, 22a, 22b mJ A mJ Typ. Max. Units ––– 0.50 0.50 ––– °C/W ––– 62 1 09/22/11 IRFB3256PbF Static @ TJ = 25°C (unless otherwise specified) Symbol Parameter V(BR)DSS ΔV(BR)DSS/ΔTJ RDS(on) VGS(th) gfs RG IDSS Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Internal Gate Resistance Drain-to-Source Leakage Current IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. Typ. Max. Units 60 ––– ––– 2.0 88 ––– ––– ––– ––– ––– ––– 29 2.7 ––– ––– 0.79 ––– ––– ––– ––– Conditions ––– V VGS = 0V, ID = 250μA ––– mV/°C Reference to 25°C, ID = 1.0mA 3.4 mΩ VGS = 10V, ID = 75A 4.0 V VDS = VGS, ID = 150μA ––– S VDS = 25V, ID = 75A ––– Ω 20 μA VDS = 60V, VGS = 0V VDS = 60V, VGS = 0V, TJ = 125°C 250 100 nA VGS = 20V VGS = -20V -100 c f Dynamic @ TJ = 25°C (unless otherwise specified) Symbol Qg Qgs Qgd Qsync td(on) tr td(off) tf Ciss Coss Crss Coss eff. (ER) Coss eff. (TR) Parameter Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Total Gate Charge Sync. (Qg - Qgd) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Effective Output Capacitance (Energy Related) Effective Output Capacitance (Time Related) Min. Typ. Max. Units ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– 130 31 42 88 22 77 55 64 6600 720 400 1080 1400 195 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– nC Conditions ID = 75A VDS = 30V VGS = 10V ID = 75A, VDS =0V, VGS = 10V VDD = 39V ID = 75A RG = 2.7Ω VGS = 10V VGS = 0V VDS = 48V ƒ = 1.0 MHz, See Fig. 5 VGS = 0V, VDS = 0V to 48V , See Fig. 11 VGS = 0V, VDS = 0V to 48V f ns pF f h g Diode Characteristics Symbol IS Parameter Continuous Source Current VSD trr (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Qrr Reverse Recovery Charge IRRM ton Reverse Recovery Current Forward Turn-On Time ISM d Notes:  Repetitive rating; pulse width limited by max. junction temperature. ‚ Limited by TJmax, starting TJ = 25°C, L = 0.12mH RG = 50Ω, IAS = 75A, VGS =10V. Part not recommended for use above this value. ƒ ISD ≤ 75A, di/dt ≤ 890A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C. „ Pulse width ≤ 400μs; duty cycle ≤ 2%. … Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS . 2 Min. Typ. Max. Units ––– ––– ––– ––– Conditions 206 A MOSFET symbol 820 A showing the integral reverse D G S p-n junction diode. ––– ––– 1.3 V TJ = 25°C, IS = 75A, VGS = 0V VR = 51V, ––– 43 ––– ns TJ = 25°C T = 125°C IF = 75A ––– 53 ––– J di/dt = 100A/μs ––– 58 ––– nC TJ = 25°C TJ = 125°C ––– 65 ––– ––– 2.4 ––– A TJ = 25°C Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) f f † Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS . ‡ Rθ is measured at TJ approximately 90°C. ˆ RθJC value shown is at time zero. www.irf.com IRFB3256PbF 1000 1000 VGS 15V 12V 10V 6.0V 5.0V 4.75V 4.50V 4.25V 100 BOTTOM VGS 15V 12V 10V 6.0V 5.0V 4.75V 4.50V 4.25V TOP ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) TOP 100 4.25V 10 BOTTOM 4.25V 10 ≤60μs PULSE WIDTH ≤60μs PULSE WIDTH Tj = 175°C Tj = 25°C 1 1 0.01 0.1 1 10 100 0.01 V DS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics 10 100 2.2 100 RDS(on) , Drain-to-Source On Resistance (Normalized) ID, Drain-to-Source Current (A) 1 Fig 2. Typical Output Characteristics 1000 T J = 175°C T J = 25°C 10 VDS = 25V ≤60μs PULSE WIDTH 1.0 ID = 75A VGS = 10V 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 2 3 4 5 6 7 -60 -40 -20 0 20 40 60 80 100120140160180 T J , Junction Temperature (°C) VGS, Gate-to-Source Voltage (V) Fig 4. Normalized On-Resistance vs. Temperature Fig 3. Typical Transfer Characteristics 100000 14.0 VGS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd VGS, Gate-to-Source Voltage (V) ID= 75A C oss = C ds + C gd C, Capacitance (pF) 0.1 V DS, Drain-to-Source Voltage (V) 10000 Ciss Coss Crss 1000 12.0 VDS= 48V VDS= 30V 10.0 VDS= 12V 8.0 6.0 4.0 2.0 0.0 100 1 10 100 VDS, Drain-to-Source Voltage (V) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage www.irf.com 0 20 40 60 80 100 120 140 160 180 QG, Total Gate Charge (nC) Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 3 IRFB3256PbF 1000 10000 ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) OPERATION IN THIS AREA LIMITED BY R DS(on) T J = 175°C 100 T J = 25°C 10 1000 100μsec 1msec 100 10 10msec 1 VGS = 0V 1.0 0.1 0.0 0.5 1.0 1.5 2.0 2.5 3.0 0.1 VSD, Source-to-Drain Voltage (V) ID, Drain Current (A) 150 100 50 0 50 75 100 125 150 175 V(BR)DSS , Drain-to-Source Breakdown Voltage (V) Limited by package 25 T C , Case Temperature (°C) 100 72 ID = 1.0mA 70 68 66 64 62 60 -60 -40 -20 0 20 40 60 80 100120140160180 T J , Temperature ( °C ) Fig 9. Maximum Drain Current vs. Case Temperature Fig 10. Drain-to-Source Breakdown Voltage 2.0 EAS , Single Pulse Avalanche Energy (mJ) 1400 1.8 ID 12A 24A BOTTOM 75A 1200 1.6 TOP 1000 1.4 1.2 Energy (μJ) 10 Fig 8. Maximum Safe Operating Area 250 200 1 VDS, Drain-to-Source Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 1.0 0.8 0.6 0.4 0.2 0.0 800 600 400 200 0 0 10 20 30 40 50 60 VDS, Drain-to-Source Voltage (V) Fig 11. Typical COSS Stored Energy 4 DC Tc = 25°C Tj = 175°C Single Pulse 70 25 50 75 100 125 150 175 Starting T J , Junction Temperature (°C) Fig 12. Maximum Avalanche Energy vs. DrainCurrent www.irf.com IRFB3256PbF Thermal Response ( Z thJC ) °C/W 1 D = 0.50 0.20 0.1 0.10 0.05 0.02 0.01 0.01 SINGLE PULSE ( THERMAL RESPONSE ) 0.001 0.0001 1E-006 1E-005 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc 0.0001 0.001 0.01 0.1 1 t1 , Rectangular Pulse Duration (sec) Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case 1000 Avalanche Current (A) Duty Cycle = Single Pulse 100 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ΔTj = 150°C and Tstart =25°C (Single Pulse) 0.01 0.05 0.10 10 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ΔΤ j = 25°C and Tstart = 150°C. 1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 14. Typical Avalanche Current vs.Pulsewidth EAR , Avalanche Energy (mJ) 400 Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. ΔT = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 14, 15). tav = Average time in avalanche. D = Duty cycle in avalanche = tav ·f ZthJC(D, tav) = Transient thermal resistance, see Figures 13) TOP Single Pulse BOTTOM 1.0% Duty Cycle ID = 75A 300 200 100 0 25 50 75 100 125 150 175 Starting T J , Junction Temperature (°C) PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC Iav = 2DT/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav Fig 15. Maximum Avalanche Energy vs. Temperature www.irf.com 5 4.0 16 3.5 14 3.0 12 IRRM (A) VGS(th) , Gate threshold Voltage (V) IRFB3256PbF 2.5 2.0 ID = 150μA ID = 1.0mA 1.5 IF = 30A V R = 51V TJ = 25°C TJ = 125°C 10 8 6 ID = 1.0A 4 1.0 2 0.5 -75 -25 25 75 125 0 175 200 600 800 1000 Fig. 17 - Typical Recovery Current vs. dif/dt Fig 16. Threshold Voltage vs. Temperature 500 16 IF = 45A V R = 51V 14 IF = 30A V R = 51V 400 TJ = 25°C TJ = 125°C QRR (nC) 12 IRRM (A) 400 diF /dt (A/μs) T J , Temperature ( °C ) 10 8 TJ = 25°C TJ = 125°C 300 200 6 100 4 2 0 0 200 400 600 800 1000 0 200 400 600 800 1000 diF /dt (A/μs) diF /dt (A/μs) Fig. 19 - Typical Stored Charge vs. dif/dt Fig. 18 - Typical Recovery Current vs. dif/dt 500 IF = 45A V R = 51V QRR (nC) 400 TJ = 25°C TJ = 125°C 300 200 100 0 0 200 400 600 800 1000 diF /dt (A/μs) 6 Fig. 20 - Typical Stored Charge vs. dif/dt www.irf.com IRFB3256PbF Driver Gate Drive D.U.T ƒ - ‚ - - „ * D.U.T. ISD Waveform Reverse Recovery Current +  RG • • • • dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test VDD P.W. Period VGS=10V Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + D= Period P.W. + + - Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Current Inductor Curent ISD Ripple ≤ 5% * VGS = 5V for Logic Level Devices Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs V(BR)DSS 15V DRIVER L VDS tp D.U.T RG VGS 20V + V - DD IAS A 0.01Ω tp I AS Fig 22a. Unclamped Inductive Test Circuit RD VDS Fig 22b. Unclamped Inductive Waveforms VDS 90% VGS D.U.T. RG + - VDD V10V GS 10% VGS Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % td(on) Fig 23a. Switching Time Test Circuit tr t d(off) Fig 23b. Switching Time Waveforms Id Current Regulator Same Type as D.U.T. Vds Vgs 50KΩ 12V tf .2μF .3μF D.U.T. + V - DS Vgs(th) VGS 3mA IG ID Current Sampling Resistors Fig 24a. Gate Charge Test Circuit www.irf.com Qgs1 Qgs2 Qgd Qgodr Fig 24b. Gate Charge Waveform 7 IRFB3256PbF TO-220AB Package Outline Dimensions are shown in millimeters (inches) TO-220AB Part Marking Information (;$03/( 7+,6,6$1,5) /27&2'( $66(0%/('21:: ,17+($66(0%/