PD -97363
IRLB3034PbF
Applications
l DC Motor Drive
l High Efficiency Synchronous Rectification in SMPS
l Uninterruptible Power Supply
l High Speed Power Switching
l Hard Switched and High Frequency Circuits
HEXFET® Power MOSFET
D
VDSS
40V
RDS(on) typ.
1.4m:
max.
1.7m:
ID (Silicon Limited)
343A
ID (Package Limited) 195A
c
G
S
Benefits
l Optimized for Logic Level Drive
l Very Low RDS(ON) at 4.5V VGS
l Superior R*Q at 4.5V VGS
l Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
l Fully Characterized Capacitance and Avalanche
SOA
l Enhanced body diode dV/dt and dI/dt Capability
l Lead-Free
TO-220AB
IRLB3034PbF
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Symbol
ID @ TC = 25°C
ID @ TC = 100°C
ID @ TC = 25°C
IDM
PD @TC = 25°C
VGS
Parameter
Max.
343
243
195
1372
375
2.5
±20
4.6
d
Pulsed Drain Current
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
Mounting torque, 6-32 or M3 screw
f
dv/dt
TJ
TSTG
Avalanche Characteristics
EAS (Thermally limited)
IAR
EAR
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
d
A
W
W/°C
V
V/ns
-55 to + 175
°C
300
x
x
10lbf in (1.1N m)
e
d
Units
c
c
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Package Limited)
255
See Fig. 14, 15, 22a, 22b,
mJ
A
mJ
Thermal Resistance
Symbol
RθJC
RθCS
RθJA
www.irf.com
Parameter
j
Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
Typ.
Max.
Units
–––
0.5
–––
0.4
–––
62
°C/W
1
01/14/09
IRLB3034PbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
V(BR)DSS
Drain-to-Source Breakdown Voltage
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
IDSS
Gate Threshold Voltage
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
40
–––
–––
–––
1.0
–––
–––
–––
–––
RG(int)
Internal Gate Resistance
–––
–––
0.04
1.4
1.6
–––
–––
–––
–––
–––
2.1
Conditions
–––
V VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 5mA
1.7
VGS = 10V, ID = 195A
mΩ
2.0
VGS = 4.5V, ID = 172A
2.5
V VDS = VGS, ID = 250µA
VDS = 40V, VGS = 0V
20
µA
250
VDS = 40V, VGS = 0V, TJ = 125°C
VGS = 20V
100
nA
-100
VGS = -20V
d
g
g
–––
Ω
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Qg
Qgs
Qgd
Qsync
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss eff. (ER)
Coss eff. (TR)
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Qg - Qgd)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min. Typ. Max. Units
i
h
Effective Output Capacitance (Energy Related)
Effective Output Capacitance (Time Related)
286 ––– –––
––– 108 162
–––
29
–––
–––
54
–––
–––
54
–––
–––
65
–––
––– 827 –––
–––
97
–––
––– 355 –––
––– 10315 –––
––– 1980 –––
––– 935 –––
––– 2378 –––
––– 2986 –––
Conditions
S
VDS = 10V, ID = 195A
ID = 185A
VDS = 20V
nC
VGS = 4.5V
ID = 185A, VDS =0V, VGS = 4.5V
VDD = 26V
ID = 195A
ns
RG = 2.1Ω
VGS = 4.5V
VGS = 0V
VDS = 25V
pF ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 32V
VGS = 0V, VDS = 0V to 32V
g
g
i
h
Diode Characteristics
Symbol
IS
Parameter
Continuous Source Current
VSD
trr
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IRRM
ton
Reverse Recovery Current
Forward Turn-On Time
ISM
d
Notes:
Calcuted continuous current based on maximum allowable junction
temperature Bond wire current limit is 195A. Note that current
limitation arising from heating of the device leds may occur with
some lead mounting arrangements.
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.013mH
RG = 25Ω, IAS = 195A, VGS =10V. Part not recommended for use
above this value .
ISD ≤ 195A, di/dt ≤ 841A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
2
Min. Typ. Max. Units
–––
–––
–––
–––
343
c
1372
Conditions
MOSFET symbol
A
showing the
integral reverse
D
G
S
p-n junction diode.
––– –––
1.3
V TJ = 25°C, IS = 195A, VGS = 0V
TJ = 25°C
VR = 34V,
–––
39
–––
ns
T
=
125°C
I
–––
41
–––
J
F = 195A
di/dt
= 100A/µs
TJ = 25°C
–––
39
–––
nC
TJ = 125°C
–––
46
–––
–––
1.7
–––
A TJ = 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
g
g
Pulse width ≤ 400µs; duty cycle ≤ 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS.
Rθ is measured at TJ approximately 90°C
www.irf.com
IRLB3034PbF
100000
ID, Drain-to-Source Current (A)
10000
BOTTOM
1000
100000
≤60µs PULSE WIDTH
Tj = 25°C
TOP
ID, Drain-to-Source Current (A)
VGS
15V
10V
8.0V
4.5V
3.5V
3.0V
2.7V
2.5V
TOP
10000
100
10
2.5V
BOTTOM
100
2.5V
10
0.1
1
10
100
0.1
V DS, Drain-to-Source Voltage (V)
1
10
100
V DS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
10000
2.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current (A)
≤60µs PULSE WIDTH
Tj = 175°C
1000
1
1000
T J = 175°C
100
T J = 25°C
10
1
VDS = 25V
≤60µs PULSE WIDTH
ID = 195A
VGS = 10V
1.5
1.0
0.5
0.1
1
2
3
4
5
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig 4. Normalized On-Resistance vs. Temperature
Fig 3. Typical Transfer Characteristics
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
Ciss
10000
C oss = C ds + C gd
Coss
Crss
1000
5.0
ID= 185A
4.5
VGS, Gate-to-Source Voltage (V)
100000
C, Capacitance (pF)
VGS
15V
10V
8.0V
4.5V
3.5V
3.0V
2.7V
2.5V
VDS= 32V
VDS= 20V
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
100
0.0
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
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0
20
40
60
80
100
120
140
QG, Total Gate Charge (nC)
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
3
IRLB3034PbF
10000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
10000
1000
T J = 175°C
100
TJ = 25°C
10
OPERATION IN THIS AREA
LIMITED BY R DS(on)
1000
100µsec
100
1msec
LIMITED BY PACKAGE
10msec
10
DC
1
Tc = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
0.1
1.0
0.0
0.5
1.0
1.5
2.0
0.1
2.5
Limited By Package
ID, Drain Current (A)
250
200
150
100
50
0
50
75
100
125
150
175
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
350
25
Id = 5mA
48
46
44
42
40
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Temperature ( °C )
Fig 9. Maximum Drain Current vs.
Case Temperature
Fig 10. Drain-to-Source Breakdown Voltage
2.5
EAS , Single Pulse Avalanche Energy (mJ)
1200
ID
38.9A
65.3A
BOTTOM 195A
TOP
1000
2.0
Energy (µJ)
100
50
T C , Case Temperature (°C)
1.5
1.0
0.5
0.0
800
600
400
200
0
0
5
10
15
20
25
30
35
VDS, Drain-to-Source Voltage (V)
Fig 11. Typical COSS Stored Energy
4
10
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
300
1
VDS, Drain-to-Source Voltage (V)
VSD, Source-to-Drain Voltage (V)
40
45
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Fig 12. Maximum Avalanche Energy vs. DrainCurrent
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IRLB3034PbF
Thermal Response ( Z thJC ) °C/W
1
D = 0.50
0.1
0.20
0.10
R1
R1
0.05
τJ
0.02
0.01
0.01
τJ
τ1
1E-005
R3
R3
Ri (°C/W)
R4
R4
τC
τ
τ2
τ1
τ2
τ3
τ3
Ci= τi/Ri
Ci i/Ri
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
R2
R2
0.0001
τ4
τ4
0.02477
τi (sec)
0.000025
0.08004
0.000077
0.19057
0.001656
0.10481
0.008408
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Avalanche Current (A)
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ∆Tj = 150°C and
Tstart =25°C (Single Pulse)
0.01
100
0.05
0.10
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ∆Τ j = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
EAR , Avalanche Energy (mJ)
300
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 195A
250
200
150
100
50
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Fig 15. Maximum Avalanche Energy vs. Temperature
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5
IRLB3034PbF
14
IF = 78A
V R = 34V
12
2.5
TJ = 25°C
TJ = 125°C
10
2.0
IRRM (A)
VGS(th) , Gate threshold Voltage (V)
3.0
1.5
ID = 250µA
1.0
8
6
ID = 1.0mA
4
ID = 1.0A
0.5
2
0.0
-75 -50 -25
0
0
25 50 75 100 125 150 175
0
100
T J , Temperature ( °C )
300
400
500
Fig. 17 - Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage vs. Temperature
14
400
IF = 117A
V R = 34V
12
IF = 78A
V R = 34V
TJ = 25°C
TJ = 125°C
10
TJ = 25°C
TJ = 125°C
300
8
QRR (A)
IRRM (A)
200
diF /dt (A/µs)
6
4
200
100
2
0
0
0
100
200
300
400
500
0
100
diF /dt (A/µs)
200
300
400
500
diF /dt (A/µs)
Fig. 19 - Typical Stored Charge vs. dif/dt
Fig. 18 - Typical Recovery Current vs. dif/dt
400
IF = 117A
V R = 34V
TJ = 25°C
TJ = 125°C
QRR (A)
300
200
100
0
0
100
200
300
400
500
diF /dt (A/µs)
6
Fig. 20 - Typical Stored Charge vs. dif/dt
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IRLB3034PbF
Driver Gate Drive
D.U.T
-
-
-
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
RG
•
•
•
•
dv/dt controlled by RG
Driver same type as D.U.T.
I SD controlled by Duty Factor "D"
D.U.T. - Device Under Test
VDD
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
D=
Period
P.W.
+
+
-
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor
Current
Inductor Curent
ISD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V(BR)DSS
15V
DRIVER
L
VDS
tp
D.U.T
RG
VGS
20V
+
V
- DD
IAS
A
0.01Ω
tp
I AS
Fig 22a. Unclamped Inductive Test Circuit
RD
VDS
Fig 22b. Unclamped Inductive Waveforms
VDS
90%
VGS
D.U.T.
RG
+
- VDD
V10V
GS
10%
VGS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
td(on)
Fig 23a. Switching Time Test Circuit
tr
t d(off)
Fig 23b. Switching Time Waveforms
Id
Current Regulator
Same Type as D.U.T.
Vds
Vgs
50KΩ
12V
tf
.2µF
.3µF
D.U.T.
+
V
- DS
Vgs(th)
VGS
3mA
IG
ID
Current Sampling Resistors
Fig 24a. Gate Charge Test Circuit
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Qgs1 Qgs2
Qgd
Qgodr
Fig 24b. Gate Charge Waveform
7
IRLB3034PbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
TO-220AB Part Marking Information
(;$03/(
7+,6,6$1,5)
/27&2'(
$66(0%/('21::
,17+($66(0%/
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