IRLR8721PBF

IRLR8721PbF IRLU8721PbF Applications l High Frequency Synchronous Buck Converters for Computer Processor Power l High Frequency Isolated DC-DC Converters with Synchronous Rectification for Telecom and Industrial Use l Lead-Free Benefits l Very Low RDS(on) at 4.5V VGS l Ultra-Low Gate Impedance l Fully Characterized Avalanche Voltage and Current Base Part Number Package Type IRLR8721PbF D-Pak IRLU8721PbF I-Pak HEXFET® Power MOSFET VDSS RDS(on) max 8.4m: 30V Qg 8.5nC D S S D G G D-Pak I-Pak IRLR8721PbF IRLU8721PbF G D S Gate Drain Source Standard Pack Form Quantity Tube 75 Tape and Reel 2000 Tape and Reel Left 3000 Tape and Reel Right 3000 Tube 75 Orderable part number IRLR8721PbF IRLR8721TRPbF IRLR8721TRLPbF IRLR8721TRRPbF IRLU8721PbF Absolute Maximum Ratings Parameter Max. Units 30 V VDS Drain-to-Source Voltage VGS Gate-to-Source Voltage Continuous Drain Current, VGS @ 10V ± 20 65 IDM Continuous Drain Current, VGS @ 10V Pulsed Drain Current 260 PD @TC = 25°C Maximum Power Dissipation 65 PD @TC = 100°C Maximum Power Dissipation 33 TJ Linear Derating Factor Operating Junction and TSTG Storage Temperature Range ID @ TC = 25°C ID @ TC = 100°C f 46f c A W W/°C °C 0.43 -55 to + 175 Thermal Resistance Typ. Max. ––– 2.3 RJA Junction-to-Case Junction-to-Ambient (PCB Mount) Parameter ––– 50 RJA Junction-to-Ambient ––– 110 RJC g Units °C/W Notes  through … are on page 11 1 www.irf.com © 2012 International Rectifier December 4, 2012 IRLR/U8721PbF Static @ TJ = 25°C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions BVDSS VDSS/TJ Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient 30 ––– ––– 21 RDS(on) Static Drain-to-Source On-Resistance ––– ––– 6.3 10.1 V VGS = 0V, ID = 250μA mV/°C Reference to 25°C, ID = 1mA m VGS = 10V, ID = 25A 8.4 VGS = 4.5V, ID = 20A 11.8 VGS(th) VGS(th) Gate Threshold Voltage Gate Threshold Voltage Coefficient 1.35 ––– 1.9 -6.8 2.35 V VDS = VGS, ID = 25μA ––– mV/°C IDSS Drain-to-Source Leakage Current ––– ––– ––– ––– 1.0 150 μA VDS = 24V, VGS = 0V VDS = 24V, VGS = 0V, TJ = 125°C IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage ––– ––– ––– ––– 100 -100 nA VGS = 20V VGS = -20V gfs Qg Forward Transconductance Total Gate Charge 46 ––– ––– 8.5 ––– 13 S VDS = 15V, ID = 20A Qgs1 Qgs2 Pre-Vth Gate-to-Source Charge Post-Vth Gate-to-Source Charge ––– ––– 1.9 1.2 ––– ––– nC VDS = 15V VGS = 4.5V Qgd Qgodr Gate-to-Drain Charge Gate Charge Overdrive Switch Charge (Qgs2 + Qgd) ––– ––– 3.4 2.0 ––– ––– Output Charge ––– ––– 4.6 7.9 ––– ––– RG td(on) Gate Resistance Turn-On Delay Time ––– ––– 2.3 8.8 3.8 ––– tr td(off) Rise Time Turn-Off Delay Time ––– ––– 30 9.4 ––– ––– tf Ciss Fall Time Input Capacitance ––– ––– 6.5 1030 ––– ––– Coss Crss Output Capacitance Reverse Transfer Capacitance ––– ––– 350 110 ––– ––– Qsw Qoss ––– ––– f f ID = 20A See Fig. 16 nC  VDS = 16V, VGS = 0V VDD = 15V, VGS = 4.5V ID = 20A ns f RG = 1.8 See Fig. 14 VGS = 0V pF VDS = 15V ƒ = 1.0MHz Avalanche Characteristics EAS IAR Parameter Single Pulse Avalanche Energy Avalanche Current EAR Repetitive Avalanche Energy c dh c Typ. ––– ––– Max. 93 20 Units mJ A ––– 6.5 mJ Diode Characteristics Parameter Min. Typ. Max. Units IS Continuous Source Current ISM (Body Diode) Pulsed Source Current VSD (Body Diode) Diode Forward Voltage ––– trr Qrr Reverse Recovery Time Reverse Recovery Charge ––– ––– ton Forward Turn-On Time ch 2 ––– ––– ––– 65 f A Conditions MOSFET symbol D 260 showing the integral reverse ––– 1.0 V S p-n junction diode. TJ = 25°C, IS = 20A, VGS = 0V 17 24 26 36 ns nC TJ = 25°C, IF = 20A, VDD = 15V di/dt = 300A/μs ––– G f f Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) www.irf.com © 2012 International Rectifier December 4, 2012 IRLR/U8721PbF 1000 1000 BOTTOM TOP ID, Drain-to-Source Current (A) 100 100 10 1 2.7V BOTTOM VGS 10V 8.0V 5.0V 4.5V 4.0V 3.5V 3.0V 2.7V 10 2.7V 60μs PULSE WIDTH 60μs PULSE WIDTH Tj = 175°C Tj = 25°C 0.1 0.1 1 1 10 100 0.1 V DS, Drain-to-Source Voltage (V) 10 100 Fig 2. Typical Output Characteristics 1000 RDS(on) , Drain-to-Source On Resistance (Normalized) 2.0 100 T J = 175°C 10 T J = 25°C 1 VDS = 15V 60μs PULSE WIDTH 0.1 ID = 25A VGS = 10V 1.5 1.0 0.5 0 2 4 6 8 10 VGS, Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics 3 1 V DS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) TOP VGS 10V 8.0V 5.0V 4.5V 4.0V 3.5V 3.0V 2.7V www.irf.com © 2012 International Rectifier -60 -40 -20 0 20 40 60 80 100120140160180 T J , Junction Temperature (°C) Fig 4. Normalized On-Resistance vs. Temperature December 4, 2012 IRLR/U8721PbF 10000 5.0 VGS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd VGS, Gate-to-Source Voltage (V) ID= 20A C, Capacitance (pF) C oss = C ds + C gd Ciss 1000 Coss Crss 100 10 4.0 VDS= 6.0V 3.0 2.0 1.0 0.0 1 10 100 0 VDS, Drain-to-Source Voltage (V) ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) 1000 T J = 175°C T J = 25°C 10 4 6 8 10 Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 1000 100 2 QG, Total Gate Charge (nC) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage 1 OPERATION IN THIS AREA LIMITED BY R DS(on) 100μsec 100 1msec 10 10msec 1 Tc = 25°C Tj = 175°C Single Pulse VGS = 0V 0.1 0.1 0.0 0.5 1.0 1.5 2.0 VSD, Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 4 VDS= 24V VDS= 15V www.irf.com © 2012 International Rectifier 0 1 10 100 VDS, Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area December 4, 2012 IRLR/U8721PbF 2.5 70 VGS(th) , Gate Threshold Voltage (V) Limited By Package 60 ID, Drain Current (A) 50 40 30 20 10 2.0 ID = 25μA 1.5 1.0 0 0.5 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175 200 T J , Temperature ( °C ) T C , Case Temperature (°C) Fig 9. Maximum Drain Current vs. Case Temperature Fig 10. Threshold Voltage vs. Temperature Thermal Response ( Z thJC ) °C/W 10 1 D = 0.50 0.20 0.10 0.05 0.1 J 0.02 0.01 R1 R1 J 1 R2 R2 2 1 2 Ci= iRi Ci iRi 0.01 1E-005 3 C  3 Ri (°C/W) i (sec) 0.3501 0.000072 1.1877 0.7635 0.001239 0.010527 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc SINGLE PULSE ( THERMAL RESPONSE ) 0.001 1E-006 R3 R3 0.0001 0.001 0.01 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 5 www.irf.com © 2012 International Rectifier December 4, 2012 0.1 IRLR/U8721PbF 400 DRIVER L VDS D.U.T RG 20V + - VDD IAS tp A 0.01 Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp EAS , Single Pulse Avalanche Energy (mJ) 15V ID 1.1A 1.4A BOTTOM 20A 350 TOP 300 250 200 150 100 50 0 25 50 75 100 125 150 175 Starting T J , Junction Temperature (°C) Fig 12c. Maximum Avalanche Energy vs. Drain Current I AS V DS Fig 12b. Unclamped Inductive Waveforms V GS RG Current Regulator Same Type as D.U.T. RD D.U.T. + -V DD VGS Pulse Width µs Duty Factor  50K 12V .2F Fig 14a. Switching Time Test Circuit .3F D.U.T. + V - DS VDS 90% VGS 3mA IG ID 10% VGS td(on) Current Sampling Resistors Fig 13. Gate Charge Test Circuit 6 tr t d(off) tf Fig 14b. Switching Time Waveforms www.irf.com © 2012 International Rectifier December 4, 2012 IRLR/U8721PbF Avalanche Current (A) 100 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 150°C and Tstart =25°C (Single Pulse) 10 Duty Cycle = Single Pulse 1 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming  j = 25°C and Tstart = 150°C. 0.1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 1.0E+00 1.0E+01 1.0E+02 tav (sec) Fig 15. Typical Avalanche Current vs. Pulsewidth 7 www.irf.com © 2012 International Rectifier December 4, 2012 IRLR/U8721PbF D.U.T Driver Gate Drive ƒ + - - „ * D.U.T. ISD Waveform Reverse Recovery Current +  RG dv/dt controlled by R G Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test VDD P.W. Period VGS=10V Circuit Layout Considerations  Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer ‚ D= Period P.W. + + - Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent ISD Ripple  5% * VGS = 5V for Logic Level Devices Fig 15. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs Id Vds Vgs Vgs(th) Qgodr Qgd Qgs2 Qgs1 Fig 16. Gate Charge Waveform 8 www.irf.com © 2012 International Rectifier December 4, 2012 IRLR/U8721PbF Power MOSFET Selection for Non-Isolated DC/DC Converters Control FET Synchronous FET Special attention has been given to the power losses in the switching elements of the circuit - Q1 and Q2. Power losses in the high side switch Q1, also called the Control FET, are impacted by the Rds(on) of the MOSFET, but these conduction losses are only about one half of the total losses. The power loss equation for Q2 is approximated by; * Ploss  Pconduction  Pdrive  Poutput  2 Ploss  Irms  Rds(on)  Power losses in the control switch Q1 are given by;  Qg  Vg  f  Ploss = Pconduction+ Pswitching+ Pdrive+ Poutput Q    oss  Vin  f  Qrr  Vin  f   2  This can be expanded and approximated by; *dissipated primarily in Q1. Ploss  Irms 2  Rds(on )   Qgd  I   Vin  ig     Qgs 2 f  I   Vin  f  ig     Qg  Vg  f   Qoss  Vin  f   2  This simplified loss equation includes the terms Qgs2 and Qoss which are new to Power MOSFET data sheets. Qgs2 is a sub element of traditional gate-source charge that is included in all MOSFET data sheets. The importance of splitting this gate-source charge into two sub elements, Qgs1 and Qgs2, can be seen from Fig 16. Qgs2 indicates the charge that must be supplied by the gate driver between the time that the threshold voltage has been reached and the time the drain current rises to Idmax at which time the drain voltage begins to change. Minimizing Q gs2 is a critical factor in reducing switching losses in Q1. Qoss is the charge that must be supplied to the output capacitance of the MOSFET during every switching cycle. Figure A shows how Qoss is formed by the parallel combination of the voltage dependant (nonlinear) capacitance’s Cds and Cdg when multiplied by the power supply input buss voltage. For the synchronous MOSFET Q2, Rds(on) is an important characteristic; however, once again the importance of gate charge must not be overlooked since it impacts three critical areas. Under light load the MOSFET must still be turned on and off by the control IC so the gate drive losses become much more significant. Secondly, the output charge Qoss and reverse recovery charge Qrr both generate losses that are transfered to Q1 and increase the dissipation in that device. Thirdly, gate charge will impact the MOSFETs’ susceptibility to Cdv/dt turn on. The drain of Q2 is connected to the switching node of the converter and therefore sees transitions between ground and Vin. As Q1 turns on and off there is a rate of change of drain voltage dV/dt which is capacitively coupled to the gate of Q2 and can induce a voltage spike on the gate that is sufficient to turn the MOSFET on, resulting in shoot-through current . The ratio of Qgd/Qgs1 must be minimized to reduce the potential for Cdv/dt turn on. Figure A: Qoss Characteristic 9 www.irf.com © 2012 International Rectifier December 4, 2012 IRLR/U8721PbF D-Pak (TO-252AA) Package Outline Dimensions are shown in millimeters (inches) D-Pak (TO-252AA) Part Marking Information (;$03/( 7+,6,6$1,5)5 3$57180%(5 :,7+$66(0%/< ,17(51$7,21$/ /27&2'( ,5)5 $   5(&7,),(5 $66(0%/('21:: /2*2 ,17+($66(0%/