OPTIREG™ Linear TLE42794
5V low drop fixed voltag e regulator
Features
•
Output voltage 5 V ± 2%
•
Output current up to 150 mA
•
Very low current consumption
•
Early Warning
•
Power-on and undervoltage reset with programmable delay time
•
Reset low down to VQ = 1 V
•
Adjustable reset threshold
•
Very low dropout voltage
•
Output current limitation
•
Reverse polarity protection
•
Overtemperature protection
•
Suitable for use in automotive electronics
•
Wide temperature range from -40 °C up to 150 °C
•
Input voltage range from -42 V to 45 V
•
Green Product (RoHS compliant)
Potential applications
General automotive applications.
Product validation
Qualified for automotive applications. Product validation according to AEC-Q100/101.
Description
The OPTIREG™ Linear TLE42794 is a monolithic integrated low dropout voltage regulator, especially designed
for automotive applications. An input voltage up to 45 V is regulated to an output voltage of 5.0 V. The
component is able to drive loads up to 150 mA. It is short-circuit protected by the implemented current
limitation and has an integrated overtemperature shutdown. A reset signal is generated for an output voltage
VQ,rt of typically 4.65 V. This threshold can be decreased by an external resistor divider. The power-on reset
delay time can be programmed by the external delay capacitor. The additional sense comparator provides an
early warning function: Any voltage (e.g. the input voltage) can be monitored, an under-voltage condition is
indicated by setting the comparator’s output to low. If pull-up resistors are desired at the outputs of the reset
Data Sheet
www.infineon.com/OPTIREG-Linear
1
Rev. 1.3
2018-10-02
OPTIREG™ Linear TLE42794
5V low drop fixed voltage regulator
and the sense comparator, the TLE42694 with integrated pull-up resistors can be used instead of the
TLE42794.
Dimensioning information on external components
The input capacitor CI is recommended for compensation of line influences. The output capacitor CQ is
necessary for the stability of the control loop.
Circuit description
The control amplifier compares a reference voltage to a voltage that is proportional to the output voltage and
drives the base of the series transistor via a buffer. Saturation control as a function of the load current prevents
any oversaturation of the power element. The component also has a number of internal circuits for protection
against:
•
Overload
•
Overtemperature
•
Reverse polarity
Type
Package
Marking
TLE42794G
PG-DSO-8
42794G
TLE42794GM
PG-DSO-14
42794GM
TLE42794E
PG-SSOP-14 exposed pad
42794E
Data Sheet
2
Rev. 1.3
2018-10-02
OPTIREG™ Linear TLE42794
5V low drop fixed voltage regulator
Table of Contents
1
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2
2.1
2.2
2.3
2.4
2.5
2.6
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin assignment TLE42794G (PG-DSO-8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin definitions and functions TLE42794G (PG-DSO-8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin assignment TLE42794GM (PG-DSO-14) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin definitions and functions TLE42794GM (PG-DSO-14) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin assignment TLE42794E (PG-SSOP-14 exposed pad) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin definitions and functions TLE42794E (PG-SSOP-14 exposed pad) . . . . . . . . . . . . . . . . . . . . . . . . . .
3
3.1
3.2
3.3
General product characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Functional range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Thermal resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4
4.1
4.2
4.3
4.4
4.5
4.6
4.7
4.8
Block description and electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical characteristics voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Typical performance characteristics voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Typical performance characteristics current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reset function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Typical performance characteristics reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Early warning function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13
13
14
15
17
18
19
23
24
5
5.1
5.2
5.2.1
5.2.2
5.3
5.4
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Selection of external components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reverse polarity protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
26
26
27
27
27
28
29
6
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Data Sheet
3
5
5
5
6
6
7
7
Rev. 1.3
2018-10-02
OPTIREG™ Linear TLE42794
5V low drop fixed voltage regulator
Block diagram
1
Block diagram
Ι
Q
Error
Amplifier
Current and
Saturation
Control
Reference
Trimming
D
RO
&
Reference
SO
RADJ
SI
GND
Figure 1
Data Sheet
AEB01955
Block diagram
4
Rev. 1.3
2018-10-02
OPTIREG™ Linear TLE42794
5V low drop fixed voltage regulator
Pin configuration
2
Pin configuration
2.1
Pin assignment TLE42794G (PG-DSO-8)
Ι
SΙ
RADJ
D
1
2
3
4
8
7
6
5
Q
SO
RO
GND
AEP01668
Figure 2
Pin configuration (top view)
2.2
Pin definitions and functions TLE42794G (PG-DSO-8)
Pin
Symbol
Function
1
I
Input
for compensating line influences, a capacitor to GND close to the IC terminals is
recommended
2
SI
Sense input
connect the voltage to be monitored;
connect to Q if the sense comparator is not needed
3
RADJ
Reset threshold adjust
connect an external voltage divider to adjust reset threshold;
connect to GND for using internal threshold
4
D
Reset delay timing
connect a ceramic capacitor to GND for adjusting the reset delay time;
leave open if the reset function is not needed
5
GND
Ground
6
RO
Reset output
open collector output; external pull-up resistor required, respecting values given
in Reset output external pull-up resistor to VQ;
leave open if the reset function is not needed
7
SO
Sense output
open collector output; external pull-up resistor required, respecting values given
in Sense output external Pull-up resistor to VQ;
leave open if the sense comparator is not needed
8
Q
Output
block to GND with a capacitor close to the IC terminals, respecting the values
given for its capacitance CQ and ESR in “Functional range” on Page 10
Data Sheet
5
Rev. 1.3
2018-10-02
OPTIREG™ Linear TLE42794
5V low drop fixed voltage regulator
Pin configuration
2.3
Pin assignment TLE42794GM (PG-DSO-14)
RADJ
D
GND
GND
GND
GND
RO
1
2
3
4
5
6
7
14
13
12
11
10
9
8
SI
Ι
GND
GND
GND
Q
SO
AEP02248
Figure 3
Pin configuration (top view)
2.4
Pin definitions and functions TLE42794GM (PG-DSO-14)
Pin
Symbol
Function
1
RADJ
Reset threshold adjust
connect an external voltage divider to adjust reset threshold;
connect to GND for using internal threshold
2
D
Reset delay timing
connect a ceramic capacitor to GND for adjusting the reset delay time;
leave open if the reset function is not needed
3, 4, 5, 6
GND
Ground
connect all pins to PCB and heatsink area
7
RO
Reset output
open collector output; external pull-up resistor required, respecting values given
in Reset output external pull-up resistor to VQ;
leave open if the reset function is not needed
8
SO
Sense output
open collector output; external pull-up resistor required, respecting values given
in Sense output external Pull-up resistor to VQ;
leave open if the sense comparator is not needed
9
Q
Output
block to GND with a capacitor close to the IC terminals, respecting the values
given for its capacitance CQ and ESR in the table “Functional range” on Page 10
10, 11, 12 GND
Data Sheet
Ground
connect all pins to PCB and heatsink area
6
Rev. 1.3
2018-10-02
OPTIREG™ Linear TLE42794
5V low drop fixed voltage regulator
Pin configuration
Pin
Symbol
Function
13
I
Input
for compensating line influences, a capacitor to GND close to the IC terminals is
recommended
14
SI
Sense input
connect the voltage to be monitored;
connect to Q if the sense comparator is not needed
2.5
Pin assignment TLE42794E (PG-SSOP-14 exposed pad)
RADJ
n.c.
D
GND
n.c.
n.c.
RO
1
2
3
4
5
6
7
14
13
12
11
10
9
8
SI
I
n.c.
Q
n.c.
n.c.
SO
PinConfig_SSOP-14.vsd
Figure 4
Pin Configuration (top view)
2.6
Pin definitions and functions TLE42794E (PG-SSOP-14 exposed pad)
Pin
Symbol
Function
1
RADJ
Reset threshold adjust
connect an external voltage divider to adjust reset threshold;
connect to GND for using internal threshold
2, 5, 6
n.c.
not connected
3
D
Reset delay timing
connect a ceramic capacitor to GND for adjusting the reset delay time;
leave open if the reset function is not needed
4
GND
Ground
connect all pins to PCB and heatsink area
7
RO
Reset output
open collector output; external pull-up resistor required, respecting values given
in Reset output external pull-up resistor to VQ;
leave open if the reset function is not needed
8
SO
Sense output
open collector output; external pull-up resistor required, respecting values given
in Sense output external Pull-up resistor to VQ;
leave open if the sense comparator is not needed
9, 10, 12
n.c.
not connected
Data Sheet
7
Rev. 1.3
2018-10-02
OPTIREG™ Linear TLE42794
5V low drop fixed voltage regulator
Pin configuration
Pin
Symbol
Function
11
Q
Output
block to GND with a capacitor close to the IC terminals, respecting the values
given for its capacitance CQ and ESR in the table “Functional range” on Page 10
13
I
Input
for compensating line influences, a capacitor to GND close to the IC terminals is
recommended
14
SI
Sense input
connect the voltage to be monitored;
connect to Q if the sense comparator is not needed
Data Sheet
8
Rev. 1.3
2018-10-02
OPTIREG™ Linear TLE42794
5V low drop fixed voltage regulator
General product characteristics
3
General product characteristics
3.1
Absolute maximum ratings
Table 1
Absolute maximum ratings1)
-40 °C ≤ Tj ≤ 150 °C; all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Parameter
Symbol
Values
Unit Note or Test Condition
Number
Min.
Typ. Max.
-40
–
45
V
–
P_4.1.1
-0.3
–
7
V
–
P_4.1.2
VD
-0.3
–
7
V
–
P_4.1.3
Junction temperature
Tj
-40
–
150
°C
–
P_4.1.4
Storage temperature
Tstg
-50
–
150
°C
–
P_4.1.5
ESD absorption
VESD,HBM
-2
–
2
kV
Human body model
(HBM)2)
P_4.1.6
ESD absorption
VESD,CDM
-500
–
500
V
Charge device model
(CDM)3)
P_4.1.7
ESD absorption
VESD,CDM
-750
–
750
V
Charge device model
(CDM)3) at corner pins
P_4.1.8
Input, sense input
Voltage
VI
Output, reset output, sense output
Voltage
VQ
Reset delay, reset threshold
Voltage
Temperature
ESD absorption
1) Not subject to production test, specified by design
2) ESD susceptibility human body model “HBM” according to AEC-Q100-002 - JESD22-A114
3) ESD susceptibility charged device model “CDM” according to ESDA STM5.3.1
Notes
1. Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
Data Sheet
9
Rev. 1.3
2018-10-02
OPTIREG™ Linear TLE42794
5V low drop fixed voltage regulator
General product characteristics
3.2
Functional range
Table 2
Functional range
Parameter
Symbol
Values
Unit
Note or
Test Condition
Number
V
–
P_4.2.1
Min. Typ. Max.
Input voltage
VI
Output capacitor’s
requirements for stability
CQ
10
–
–
Output capacitor’s
requirements for stability
ESR(CQ)
–
–
Junction temperature
Tj
-40
–
5.5
–
45
µF
–
1)
P_4.2.2
3
Ω
–2)
P_4.2.3
150
°C
–
P_4.2.4
1) The minimum output capacitance requirement is applicable for a worst case capacitance tolerance of 30%
2) Relevant ESR value at f = 10 kHz
Note:
Data Sheet
Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics
table.
10
Rev. 1.3
2018-10-02
OPTIREG™ Linear TLE42794
5V low drop fixed voltage regulator
General product characteristics
3.3
Thermal resistance
Table 3
Thermal resistance
Parameter
Symbol
Values
Min.
Typ.
Max.
–
80
–
Unit
Note or
Test Condition
Number
K/W
measured to pin 5
P_4.3.1
TLE42794G (PG-DSO-8)
Junction to soldering point1)
RthJSP
1)
RthJA
–
113
–
K/W
FR4 2s2p board
P_4.3.2
Junction to ambient1)
RthJA
–
172
–
K/W
FR4 1s0p board,
footprint only3)
P_4.3.3
Junction to ambient1)
RthJA
–
142
–
K/W
FR4 1s0p board,
P_4.3.4
300mm2 heatsink area
on PCB3)
Junction to ambient1)
RthJA
–
136
–
K/W
FR4 1s0p board,
P_4.3.5
2
600mm heatsink area
on PCB3)
Junction to soldering point1)
RthJSP
–
27
–
K/W
measured to group of P_4.3.6
pins 3, 4, 5, 10, 11, 12
Junction to ambient1)
RthJA
–
63
–
K/W
FR4 2s2p board2)
P_4.3.7
1)
RthJA
–
104
–
K/W
FR4 1s0p board,
footprint only3)
P_4.3.8
Junction to ambient1)
RthJA
–
73
–
K/W
FR4 1s0p board,
P_4.3.9
300mm2 heatsink area
on PCB3)
Junction to ambient1)
RthJA
–
65
–
K/W
FR4 1s0p board,
P_4.3.10
2
600mm heatsink area
on PCB3)
Junction to ambient
2)
TLE42794GM (PG-DSO-14)
Junction to ambient
TLE42794E (PG-SSOP-14 exposed pad)
Junction to case1)
RthJC
–
10
–
K/W
measured to exposed P_4.3.11
pad
Junction to ambient1)
RthJA
–
47
–
K/W
FR4 2s2p board2)
P_4.3.12
1)
RthJA
–
145
–
K/W
FR4 1s0p board,
footprint only3)
P_4.3.13
Junction to ambient1)
RthJA
–
63
–
K/W
FR4 1s0p board,
P_4.3.14
2
300mm heatsink area
on PCB3)
Junction to ambient1)
RthJA
–
53
–
K/W
FR4 1s0p board,
P_4.3.15
600mm2 heatsink area
on PCB3)
Junction to ambient
1) Not subject to production test, specified by design
Data Sheet
11
Rev. 1.3
2018-10-02
OPTIREG™ Linear TLE42794
5V low drop fixed voltage regulator
General product characteristics
2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The product
(chip+package) was simulated on a 76.2 x 114.3 x 1.5 mm3 board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm
Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer.
3) Specified RthJA value is according to JEDEC JESD 51-3 at natural convection on FR4 1s0p board; The product
(chip+package) was simulated on a 76.2 × 114.3 × 1.5 mm3 board with 1 copper layer (1 x 70µm Cu).
Data Sheet
12
Rev. 1.3
2018-10-02
OPTIREG™ Linear TLE42794
5V low drop fixed voltage regulator
Block description and electrical characteristics
4
Block description and electrical characteristics
4.1
Voltage regulator
The output voltage VQ is controlled by comparing a portion of it to an internal reference and driving a PNP pass
transistor accordingly. The control loop stability depends on the output capacitor CQ, the load current, the
chip temperature and the poles/zeros introduced by the integrated circuit. To ensure stable operation, the
output capacitor’s capacitance and its equivalent series resistor ESR requirements given in the table
“Functional range” on Page 10 have to be maintained. For details see also the typical performance graph
“Output capacitor series resistor ESR(CQ) versus output current IQ” on Page 16. As the output capacitor
also has to buffer load steps it should be sized according to the application’s needs.
An input capacitor CI is strongly recommended to compensate line influences. Connect the capacitors close to
the component’s terminals.
A protection circuitry prevent the IC as well as the application from destruction in case of catastrophic events.
These safeguards contain an output current limitation, a reverse polarity protection as well as a thermal
shutdown in case of overtemperature.
In order to avoid excessive power dissipation that could never be handled by the pass element and the
package, the maximum output current is decreased at input voltages above VI = 22 V.
The thermal shutdown circuit prevents the IC from immediate destruction under fault conditions (e.g. output
continuously short-circuited) by switching o-ff the power stage. After the chip has cooled down, the regulator
restarts. This leads to an oscillatory behavior of the output voltage until the fault is removed. However,
junction temperatures above 150 °C are outside the maximum ratings and therefore significantly reduce the
IC’s lifetime.
The TLE42794 allows a negative supply voltage. In this fault condition, small currents are flowing into the IC,
increasing its junction temperature. This has to be considered for the thermal design, respecting that the
thermal protection circuit is not operating during reverse polarity conditions.
Supply
II
I
Q
Regulated
Output Voltage
IQ
Saturation Control
Current Limitation
C
CI
Temperature
Shutdown
BlockDiagram_VoltageRegulator.vsd
Figure 5
Data Sheet
Bandgap
Reference
ESR
}
CQ
LOAD
GND
Voltage regulator
13
Rev. 1.3
2018-10-02
OPTIREG™ Linear TLE42794
5V low drop fixed voltage regulator
Block description and electrical characteristics
4.2
Electrical characteristics voltage regulator
Table 4
Electrical characteristics voltage regulator
VI = 13.5 V, -40 °C ≤ Tj ≤ 150 °C, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Parameter
Symbol
Values
Unit
Note or Test Condition Number
Min. Typ. Max.
Output voltage
VQ
4.9
5.0
5.1
V
100 µA < IQ < 100 mA
6 V < VI < 18 V
P_5.2.1
Output current limitation
IQ,max
150
200
500
mA
VQ = 4.8V
P_5.2.2
Load regulation
steady-state
ΔVQ, load
-30
-15
–
mV
IQ = 5 mA to 100 mA
VI = 6 V
P_5.2.3
Line regulation
steady-state
ΔVQ, line
–
10
40
mV
VI = 6 V to 32 V
IQ = 5 mA
P_5.2.4
Dropout voltage1)
Vdr = VI - VQ
Vdr
–
250
500
mV
IQ = 100 mA
P_5.2.5
Overtemperature shutdown
threshold
Tj,sd
151
–
200
°C
Tj increasing2)
P_5.2.6
Overtemperature shutdown
threshold hysteresis
Tj,sdh
–
15
–
°C
Tj decreasing2)
P_5.2.7
–
70
–
dB
fripple = 100 Hz
Vripple = 0.5 Vpp
P_5.2.8
Power supply ripple rejection2) PSRR
1) measured when the output voltage VQ has dropped 100mV from the nominal value obtained at VI = 13.5V
2) not subject to production test, specified by design
Data Sheet
14
Rev. 1.3
2018-10-02
OPTIREG™ Linear TLE42794
5V low drop fixed voltage regulator
Block description and electrical characteristics
4.3
Typical performance characteristics voltage regulator
Output current IQ versus
input voltage VI
Output voltage VQ versus
junction temperature TJ
01_VQ_TJ.VSD
5,2
02_IQ_VI.VSD
300
V Q = 4.8 V
I Q = 5 mA
V I = 13.5 V
5,1
250
I Q,max [mA]
4,9
V
Q
[V]
5
4,8
200
150
100
4,7
50
4,6
0
-40
0
40
80
120
T j = 150 °C
0
160
10
Power supply ripple rejection PSRR versus
ripple frequency fr
3,5
T j = 25 °C
I Q = 10 mA
C Q = 10 µF ceramic
[mV]
3
ΔVQ
P S RR [d B ]
T j = 150 °C
I Q = 5 mA
4
40
2
1,5
20
1
10
0,5
0
0,01
T j = 25 °C
2,5
30
T j = -40 °C
0
0,1
1
10
100
1000
0
f [kHz]
Data Sheet
40
04_DVQ_DVI.VSD
4,5
03_PSRR_FR.VSD
70
50
30
Line regulation ΔVQ,line versus
input voltage VI
80
60
20
V I [V]
T j [°C]
90
T j = -40 °C
T j = 25 °C
10
20
30
40
V I [V]
15
Rev. 1.3
2018-10-02
OPTIREG™ Linear TLE42794
5V low drop fixed voltage regulator
Block description and electrical characteristics
Output capacitor series resistor ESR(CQ) versus
output current IQ
Load regulation ΔVQ,load versus
output current IQ
05_DVQ_DIQ.VSD
0
06_ESR_IQ.VSD
100
VI = 13.5 V
C Q = 10 µF
V I = 13.5 V
-2
-8
ESR(C Q ) [Ω ]
[mV]
ΔVQ
-4
-6
Unstable
Region
10
T j = -40
T j = 25 °C
T j = 150
-10
1
Stable
Region
0,1
-12
0,01
-14
0
20
40
60
80
0
100
50
100
150
IQ [mA]
I Q [mA]
Dropout voltage Vdr versus
output current IQ
Dropout voltage Vdr versus
junction temperature Ti
07_VDR_IQ.VSD
300
08_VDR_TJ.VSD
300
I Q = 100 mA
250
T j = 25 °C
200
200
T j = -40 °C
V DR [mV]
V DR [mV]
250
T j = 150 °C
150
150
100
100
50
50
I Q = 25 mA
I Q = 5 mA
I Q = 100 µA
0
0
0
20
40
60
80
-40
100
40
80
120
160
T j [°C]
I Q [mA]
Data Sheet
0
16
Rev. 1.3
2018-10-02
OPTIREG™ Linear TLE42794
5V low drop fixed voltage regulator
Block description and electrical characteristics
4.4
Current consumption
Table 5
Electrical characteristics voltage regulator
VI = 13.5 V, -40 °C ≤ Tj ≤ 150 °C, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit
Note or Test Condition
Number
Current consumption
Iq = IQ - II
Iq
–
210
280
µA
IQ = 100 µA
Tj = 25 °C
P_5.4.1
Current consumption
Iq = IQ - II
Iq
–
240
300
µA
IQ = 100 µA
Tj ≤ 85 °C
P_5.4.2
Current consumption
Iq = IQ - II
Iq
–
0.7
1
mA
IQ = 10 mA
P_5.4.3
Current consumption
Iq = IQ - II
Iq
–
3.5
8
mA
IQ = 50 mA
P_5.4.4
Data Sheet
17
Rev. 1.3
2018-10-02
OPTIREG™ Linear TLE42794
5V low drop fixed voltage regulator
Block description and electrical characteristics
4.5
Typical performance characteristics current consumption
Current consumption Iq versus
output current IQ
Current consumption Iq versus
output current IQ (IQ low)
09_IQ_IQ_IQLOW.VSD
1,6
V I = 13.5 V
T j = 25 °C
1,4
V I = 13.5 V
T j = 25 °C
10
8
1
I q [mA]
I q [mA]
1,2
10_IQ_IQ.VSD
12
0,8
0,6
6
4
0,4
2
0,2
0
0
0
5
10
15
20
25
0
I Q [mA]
20
40
60
80
100
120
I Q [mA]
Current consumption Iq versus
input voltage VI
11_IQ_VI.VSD
6
5
I q [mA]
4
R LOAD = 100 Ω
3
2
1
R LOAD = 50 k Ω
0
0
10
20
30
40
V I [V]
Data Sheet
18
Rev. 1.3
2018-10-02
OPTIREG™ Linear TLE42794
5V low drop fixed voltage regulator
Block description and electrical characteristics
4.6
Reset function
The reset function provides several features:
Output undervoltage reset:
An output undervoltage condition is indicated by setting the reset output RO to “low”. This signal might be
used to reset a microcontroller during low supply voltage.
Power-on reset delay time:
The power-on reset delay time trd allows a microcontoller and oscillator to start up. This delay time is the time
frame from exceeding the reset switching threshold VRT until the reset is released by switching the reset output
“RO” from “low” to “high”. The power-on reset delay time trd is defined by an external delay capacitor CD
connected to pin D charged by the delay capacitor charge current ID,ch starting from VD = 0 V.
If the application needs a power-on reset delay time trd different from the value given in Power on reset delay
time, the delay capacitor’s value can be derived from the specified values in Power on reset delay time and
the desired power-on delay time:
(4.1)
t rd, new
C D = ---------------- × 47nF
t rd
with
•
CD: capacitance of the delay capacitor to be chosen
•
trd,new: desired power-on reset delay time
•
trd: power-on reset delay time specified in this datasheet
For a precise calculation also take the delay capacitor’s tolerance into consideration.
Reset reaction time:
The reset reaction time avoids that short undervoltage spikes trigger an unwanted reset “low” signal. The
reset reaction rime trr considers the internal reaction time trr,int and the discharge time trr,d defined by the
external delay capacitor CD (see typical performance graph for details). Hence, the total reset reaction time
becomes:
(4.2)
t rr = t rd, int + t rr, d
with
•
trr: reset reaction time
•
trr,int: internal reset reaction time
•
trr,d: reset discharge
Reset output pull-up resistor RRO:
The reset output RO is an open collector output requiring an external pull-up resistor. In Table 6 “Electrical
characteristics reset function” on Page 21 a minimum value for the external resistor RRO is given. Keep in
mind to stay within the values specified for the reset output RO in Table 1 “Absolute maximum ratings” on
Page 9
Data Sheet
19
Rev. 1.3
2018-10-02
OPTIREG™ Linear TLE42794
5V low drop fixed voltage regulator
Block description and electrical characteristics
Reset Adjust Function
The undervoltage reset switching threshold can be adjusted according to the application’s needs by
connecting an external voltage divider (RADJ1, RADJ2) at pin RADJ. For selecting the default threshold connect
pin RADJ to GND.
When dimensioning the voltage divider, take into consideration that there will be an additional current
constantly flowing through the resistors.
With a voltage divider connected, the reset switching threshold VRT,new is calculated as follows:
(4.3)
R ADJ, 1 + R ADJ, 2
V RT, new = ------------------------------------------ × V RADJ, th
R ADJ, 2
with
•
VRT,new: the desired new reset switching threshold
•
RADJ1, RADJ2: resistors of the external voltage divider
•
VRADJ,th: reset adjust switching threshold given in Table 6 “Electrical characteristics reset function” on
Page 21
Supply
I
Q
Int.
Supply
Control
VDD
CQ
ID,ch
Reset
I RO
VDST
VRADJ,th
RRO
RO
OR
RADJ,1
MicroController
RADJ
I RADJ
GND
optional
ID,dch
D
BlockDiagram_ResetAdjust.vsd
RADJ,2
GND
CD
Figure 6
Data Sheet
Block diagram reset function
20
Rev. 1.3
2018-10-02
OPTIREG™ Linear TLE42794
5V low drop fixed voltage regulator
Block description and electrical characteristics
VI
t
t < trr,total
VQ
VRT
1V
t
t rd
VD
V DU
V DRL
t
t rd
VRO
V RO,low
trr,total
trd
t rr,total
t rd
t rr,total
1V
t
Thermal
Shutdown
Input
Voltage Dip
Undervoltage
Figure 7
Timing diagram reset
Table 6
Electrical characteristics reset function
Spike at
output
Overload
T i mi n g Di a g ra m_ Re se t . vs
VI = 13.5 V, -40 °C ≤ Tj ≤ 150 °C, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Min. Typ. Max.
Number
4.5
Output undervoltage reset
Default output undervoltage reset VRT
switching thresholds
4.65
4.8
V
VQ decreasing
P_5.6.1
Output undervoltage reset threshold adjustment
Reset adjust
switching threshold
VRADJ,th
1.26
1.35
1.44
V
3.5 V ≤ VQ < 5 V
P_5.6.2
Reset adjustment range1)
VRT,range
3.50
–
4.65
V
–
P_5.6.3
Data Sheet
21
Rev. 1.3
2018-10-02
OPTIREG™ Linear TLE42794
5V low drop fixed voltage regulator
Block description and electrical characteristics
Table 6
Electrical characteristics reset function (cont’d)
VI = 13.5 V, -40 °C ≤ Tj ≤ 150 °C, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Min. Typ. Max.
Number
Reset output low voltage
VRO,low
–
0.1
0.4
V
P_5.6.4
1 V ≤ VQ ≤ VRT
external RRO,ext = 10 kΩ
Reset output external
pull-up resistor to VQ
RRO,ext
10
–
–
kΩ
1 V ≤ VQ ≤ VRT ; VRO ≤ 0.4 V P_5.6.5
Delay pin output voltage
VD
–
–
5
V
–
P_5.6.6
Power on reset delay time
trd
17
28
39
ms
CD = 100 nF
P_5.6.7
Upper delay
switching threshold
VDU
–
1.8
–
V
–
P_5.6.8
Lower Delay
switching threshold
VDL
–
0.45
–
V
–
P_5.6.9
Delay capacitor
charge current
ID,ch
–
6.5
–
µA
VD = 1 V
P_5.6.10
Delay capacitor
reset discharge current
ID,dch
–
70
–
mA
VD = 1 V
P_5.6.11
Delay capacitor
discharge time
trr, d
–
1.9
3
µs
Calculated value:
trr,d = CD*(VDU - VDL)/
ID,dch
CD= 100 nF
P_5.6.12
Internal reset reaction time
trr, int
–
3
7
µs
CD = 0 nF 2)
P_5.6.13
Reset reaction time
trr, total
–
4.9
10
µs
Calculated value:
trr, total = trr, int + trr,d
CD = 100 nF
P_5.6.14
Reset output RO
Reset delay timing
1) VRT is scaled linearly, in case the reset switching threshold is modified
2) parameter not subject to production test; specified by design
Data Sheet
22
Rev. 1.3
2018-10-02
OPTIREG™ Linear TLE42794
5V low drop fixed voltage regulator
Block description and electrical characteristics
4.7
Typical performance characteristics reset
Power on reset delay time trd versus
junction temperature Tj
12_TRD_TJ.VSD
35
C D = 100 nF
30
t rd [ms]
25
20
15
10
5
0
-40
0
40
80
120
160
T j [°C]
Data Sheet
23
Rev. 1.3
2018-10-02
OPTIREG™ Linear TLE42794
5V low drop fixed voltage regulator
Block description and electrical characteristics
4.8
Early warning function
The additional sense comparator provides an early warning function: Any voltage (e.g. the input voltage) can
be monitored, an undervoltage condition is indicated by setting the comparator’s output to low.
Sense
Input
Voltage
VSI, High
VSI, Low
t
Sense
Output
High
Low
t
AED03049
Figure 8
Sense timing diagram
Table 7
Electrical characteristics early warning function
VI = 13.5 V, -40 °C ≤ Tj ≤ 150 °C, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Parameter
Symbol
Values
Min. Typ.
Max.
Unit
Note or Test Condition Number
Sense comparator input
Sense threshold high
VSI,high
1.24 1.31
1.38
V
–
P_5.8.1
Sense threshold low
VSI,low
1.16 1.22
1.28
V
–
P_5.8.2
Sense switching hysteresis
VSI,hy
20
160
mV
–
P_5.8.3
Data Sheet
90
24
Rev. 1.3
2018-10-02
OPTIREG™ Linear TLE42794
5V low drop fixed voltage regulator
Block description and electrical characteristics
Table 7
Electrical characteristics early warning function (cont’d)
VI = 13.5 V, -40 °C ≤ Tj ≤ 150 °C, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Parameter
Symbol
Values
Unit
Note or Test Condition Number
Min. Typ.
Max.
ISI
-1
-0.1
1
µA
–
P_5.8.4
Sense output low voltage
VSO,low
–
0.1
0.4
V
VSI < VSI,low
VI > 5.5 V
RSO,ext = 10 kΩ
P_5.8.5
Sense output external
Pull-up resistor to VQ
RSO,ext
10
–
–
kΩ
VI > 5.5 V
VSO ≤ 0.4 V
P_5.8.6
Sense input current
Sense comparator output
Data Sheet
25
Rev. 1.3
2018-10-02
OPTIREG™ Linear TLE42794
5V low drop fixed voltage regulator
Application information
5
Application information
Note:
The following information is given as a hint for the implementation of the device only and shall not
be regarded as a description or warranty of a certain functionality, condition or quality of the device.
5.1
Application diagram
Supply
II
DI
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湘ICP备2023018690号
