FAN2558S12X

www.fairchildsemi.com FAN2558/FAN2559 180mA Low Voltage CMOS LDO Features • Fixed 1.0V, 1.2V, 1.3V, 1.5V, 1.8V, 2.5V, 3.3V, 3.5V, 3.6V, 3.8V and Adjustable Output • Power Good Indicator with Open Drain Output • 180mA Output Current • 100µA Ground Current • Cbypass for Low Noise Operation • Fast Enable for CDMA Applications • High Ripple Rejection • Current Limit • Thermal Shutdown • Excellent Line and Load Regulation • Requires Only 1µF Output Capacitor • Stable with 0 to 300mΩ ESR • TTL-level Compatible Enable Input • Active Output Discharge General Description The FAN2558/9 low voltage CMOS LDOs feature fixed or adjustable output voltage, 180mA load current, delayed power good output (open drain) and 1% output accuracy with excellent line and load regulation. An external bypass capacitor provides ultra-low noise operation. The FAN2558/9 low voltage LDOs incorporate both thermal shutdown and short circuit protection. Output is stable with a 1µF, low ESR capacitor. The FAN2558/9 family is available in 5-Lead SOT-23, 6-Lead SOT-23 and 2x2mm MLP-6 packages. FAN2558: Fixed Output LDO with Power Good output FAN2558ADJ: Adjustable Output LDO with Power Good output FAN2559: Fixed Output LDO with Power Good output, Low Noise Available standard output voltages are 1.0, 1.2V, 1.3V, 1.5V, 1.8V, 2.5V, 3.3V, 3.5V, 3.6V, and 3.8V. Custom output voltage options are also available. Applications • • • • Processor Power-up sequencing PDAs, Cell Phones Portable Electronic Equipment PCMCIA Vcc and Vpp regulation/switching Typical Application 47KΩ RPG VIN 47KΩ RPG VIN C OUT 47KΩ RPG VOUT R1 ADJ R2 PG C OUT VIN FB SHDN GND V UT O FB SHDN GND FB SHDN GND V UT O C OUT CBYP C BYP PG CAP+ CAPEN PG CAP+ CAPEN CAP+ CAPEN FAN2558 FAN2558ADJ FAN2559 REV. 1.0.4 3/15/04 FAN2558/FAN2559 PRODUCT SPECIFICATIONS Pin Assignments TOP-VIEW VIN 1 GND 2 EN 3 4 PG 5 VOUT VIN 1 GND EN 2 3 6 VOUT 5 ADJ/BYP 4 PG FAN2558/FAN2558ADJ/FAN2559 2x2mm MLP-6 PACKAGE VOUT NC/ADJ/BYP PG 1 2 3 6 5 4 VIN GND EN FAN2558 5-Lead SOT-23 PACKAGE FAN2558ADJ/FAN2559 6-Lead SOT-23 PACKAGE Pin Name Pin no. 1 2 3 4 5 6 VIN GND. EN PG VOUT FAN2558 5SOT-23 2x2mm MLP-6 VOUT NC PG EN GND VIN VIN GND. EN PG ADJ VOUT FAN2558ADJ 6SOT-23 2x2mm MLP-6 VOUT ADJ PG EN GND VIN VIN GND. EN PG BYP VOUT FAN2559 6SOT-23 2x2mm MLP-6 VOUT BYP PG EN GND VIN Pin Descriptions Symbol VIN VOUT GND PG ADJ BYP EN Power Supply Input Regulated Voltage Output Ground Connection Power Good Output, Open Drain Ratio of potential divider from Vout to ADJ determines output voltage Reference Noise Bypass Chip Enable Input. The regulator is fully enabled when TTL “H” is applied to this input. The regulator enters into shutdown mode when TTL “L” is applied to this input. Pin Function Description 2 REV. 1.0.4 3/15/04 PRODUCT SPECIFICATIONS FAN2558/FAN2559 Absolute Maximum Ratings Parameter VIN to GND Voltage on any other pin to GND Junction Temperature (TJ) Storage Temperature Lead Soldering Temperature, 10 seconds Power Dissipation (PD) Electrostatic Discharge (ESD) Protection (Note1) HBM CDM 4 1 -0.3 -55 -65 Min. Max. 6 VIN + 0.3 150 150 300 Internally Limited Units V V °C °C °C W kV Recommended Operating Conditions Parameter Supply Voltage Range, VIN for VOUT < 2.0V Supply Voltage Range, VIN for VOUT ≥ 2.0V Load Current Enable Input Voltage VEN Power Good Output Voltage Range VPG Junction Temperature Thermal Resistance-Junction to Ambient SOT-23 (Note 2) Thermal Resistance-Junction to Case, 2mm x 2mm 6-lead MLP 0 0 -40 Min. 2.7 VOUT + VDROPOUT Typ. Max. 5.5 5.5 180 VIN VIN 125 235 75 °C/W Units V V mA V V °C Notes: 1. Using Mil Std. 883E, method 3015.7 (Human Body Model) and EIA/JESD22C101-A (Charge Device Model) 2. Junction to ambient thermal resistance, ΘJC, is a strong function of PCB material, board thickness, thickness and number of copper plains, number of via used, diameter of via used, available copper surface, and attached heat sink characteristics. REV. 1.0.4 3/15/04 3 FAN2558/FAN2559 PRODUCT SPECIFICATIONS Electrical Characteristics VIN = VIN min (note 5) to 5.5V, VEN = VIN, ILOAD = 100µA, TA = -40°C to +85°C, unless otherwise noted. Typical values are at 25°C. Symbol Parameter Conditions Min. Typ. Max. Units VOUT VOUT(ADJ) ∆VOUT_LNR ∆VOUT_LDR ISD IGND ILIM TSD Output Voltage Accuracy (Note 3) Output Voltage Range (Adjustable) Line Regulation Load Regulation (Note 4) Supply Current in Shutdown Mode Ground Pin Current (Note 4) Current Limit Thermal Shutdown Temperature Thermal Shutdown Hysteresis Enable Input Low Enable Input High Enable Input Current Low Threshold High Threshold PG Output Low Voltage PG Leakage Current Enable Response Time Power "ON" Delay Time ILOAD = 100µA ILOAD = 100µA VIN min < VIN < 5.5V ILOAD = 0.1mA to 150mA VEN < 0.4V PG = No Connection ILOAD = 0mA, VIN = 5.5V ILOAD = 150mA, VIN = 5.5V VOUT = 0V -2 1 -0.3 1 2 VIN 0.3 % V %/V % µA 2.5 0.1 90 110 260 350 150 10 4 150 150 500 µA mA °C °C VENL VENH IE VPG VPGL IPG TEN TON VIN = 5.5V, Shutdown VIN = 5.5V, Enabled VENL ≤ 0.4V, VIN = 5.5V VENH ≥ 1.6V, VIN = 5.5V % of VOUT PG ON % of VOUT PG OFF IPG_SINK = 100µA, Fault Condition PG off, VPG =5.5V COUT = 1µF CBYPASS = 10nF COUT = 1µF CBYPASS = 10nF VENL ≥ 1.6V, VIN = 0V to VOUT + 1V 1 VOUT > 2.7V and ILOAD = 180mA 400 0.02 0.01 30 300 89 1.6 0.01 0.01 0.4 V V µA % 97 0.1 % V µA 300 500 µS µS DPG VDROP-OUT PG Delay time Dropout Voltage (For Adjustable Output Version) Feedback Voltage (For Adjustable Output Version) 5 mS mV VFB_ADJ 0.59 V Note: 3. Guaranteed ±1% output voltage accuracy parts are available on customer request. 4. Measured at constant junction temperature using low duty cycle pulse testing. 5. VIN min = 2.7V or (VOUT + 1V), whichever is greater. 4 REV. 1.0.4 3/15/04 PRODUCT SPECIFICATIONS FAN2558/FAN2559 DC Electrical Characteristics (Continued) VIN = VIN min (note 5) to 5.5V, VEN = VIN, ILOAD = 100µA, TA = -40°C to +85°C, unless otherwise noted. Typical values are at 25°C. Symbol Parameter Conditions Min. Typ. Max. Units PSRR Power Supply Rejection Ratio DC to 100kHz COUT =1µF CBYPASS= 10nF ILOAD = 0 to 150mA VOUT ≤ 1.8V BW: 300Hz to 50kHz COUT =1µF CBYPASS= 10nF ILOAD = 0 to 150mA 50 dB eN Output Noise 30 µVRMS REV. 1.0.4 3/15/04 5 FAN2558/FAN2559 PRODUCT SPECIFICATIONS Functional Description Utilizing BiCMOS technology, the FAN2525/FAN2559 product family is optimized for use in compact battery powered systems. These LDOs offer a unique combination of high ripple rejection, low noise, low power consumption, high tolerance for a variety of output capacitors, and less than 1µA “OFF” current. In the circuit, a differential current sense amplifier controls a series-pass P-Channel MOSFET to achieve high ripple rejection. A separate error amplifier compares the load voltage at the output with an onboard trimmed low voltage bandgap reference for output regulation. Thermal shutdown and current limit circuits protect the device under extreme conditions. When the device temperature reaches 150°C, the output is disabled. When the device cools down by 10°C, it is re-enabled. The user can shut down the device using the Enable control pin at any time. The current limit circuit is trimmed, which leads to consistent power on /enable delays, and provides safe short circuit current densities even in narrow traces of the PCB. A carefully optimized control loop accommodates a wide range of ESR values in the output bypass capacitor, allowing the user to optimize space, cost, and performance requirements. An Enable pin shuts down the regulator output to conserve power, reducing supply current to less than 1µA. The fixed-voltage FAN2559 has a noise bypass pin. Power Good is available as a diagnostic function to indicate that the output voltage has reduced within 5% of the nominal value. The six pin adjustable-voltage version utilizes pin 5 to connect to an external voltage divider which feeds back to the regulator error amplifier, thus setting the output voltage to the desired value. capacitor quality still must be considered if the designer is to achieve optimal circuit performance. In general, ceramic capacitors offer superior ESR performance, and a smaller case size than tantalum capacitors. Input Capacitor An input capacitor of 2.2µF (nominal value) or greater, connected between the Input pin and Ground, placed in close proximity to the device, will improve transient response and ripple rejection. Higher values will further improve ripple rejection and transient response. An input capacitor is recommended when the input source, either a battery or a regulated AC voltage, is located far from the device. Any good quality ceramic, tantalum, or metal film capacitor will give acceptable performance; however, in extreme cases capacitor surge current ratings may have to be considered. Output Capacitor An output capacitor is required to maintain regulator loop stability. Stable operation will be achieved with a wide variety of capacitors with ESR values ranging from 0mΩ up to 400mΩ. Multilayer ceramic, tantalum or aluminum electrolytic capacitors may be used. A nominal value of at least 1µF is recommended. Note that the choice of output capacitor affects load transient response, ripple rejection, and it has a slight effect on noise performance as well. An internal resistor of approximately 100Ω is connected between VOUT and GND in shutdown mode, to discharge the output capacitor at a faster rate. Bypass Capacitor (FAN2559 Only) In the fixed-voltage configuration, connecting a capacitor between the bypass pin and ground can significantly reduce output noise. Values ranging from 0pF to 47nF can be used, depending on the sensitivity to output noise in the application. At the high-impedance Bypass pin, care must be taken in the PCB layout to minimize noise pickup, and capacitors must be selected to minimize current loading (leakage). Noise pickup from external sources can be considerable. Leakage currents into the Bypass pin will directly affect regulator accuracy and should be kept as low as possible; thus, highquality ceramic and film types are recommended for their low leakage characteristics. Cost-sensitive applications not concerned with noise can omit this capacitor. Applications Information External Capacitors – Selection The FAN2558/FAN2559 gives the user the flexibility to utilize a wide variety of capacitors compared to other LDOs. An innovative design approach offers significantly reduced sensitivity to ESR, which degrades regulator loop stability in older designs. While the improvements featured in the FAN2558/FAN2559 family greatly simplify the design task, 6 REV. 1.0.4 3/15/04 PRODUCT SPECIFICATIONS FAN2558/FAN2559 Control Functions Enable Pin Connecting 2V or greater to the Enable pin will enable the output, while 0.4V or less will disable it while reducing the quiescent current consumption to less than 1µA. If this shutdown function is not needed, the pin can simply be connected permanently to the VIN pin. Allowing this pin to float will cause erratic operation. Error Flag (Power Good) Fault conditions such as input voltage dropout (low VIN), overheating, or overloading (excessive output current), will set an error flag. The PG pin which is an open-drain output, will go LOW when VOUT is less than 95% or the specified output voltage. When the voltage at VOUT is greater than 95% of the specified output voltage, the PG pin is HIGH. A logic pull-up resistor of 47KΩ is recommended at this output. The pin can be left disconnected if unused. Thermal Protection The FAN2558/FAN2559 is designed to supply high peak output currents for brief periods, however sustained excessive output load at high input - output voltage difference will increase the device’s temperature and exceed maximum ratings due to power dissipation. During output overload conditions, when the die temperature exceeds the shutdown limit temperature of 150°C, an onboard thermal protection will disable the output until the temperature drops approximately 10°C below the limit, at which point the output is re-enabled. During a thermal shutdown, the user may assert the powerdown function at the Enable pin, reducing power consumption to a minimum. The ground pin current IGND can be found in the charts provided in the Electrical Characteristics section. The relationship describing the thermal behavior of the package is:  T J ( max ) – T A  P D ( max ) =  -------------------------------  θ JA   where TJ(max) is the maximum allowable junction temperature of the die, which is 125°C, and TA is the ambient operating temperature. θJA is dependent on the surrounding PC board layout and can be empirically obtained. While the θJC (junction-to-case) of the SOT23-5 package is specified at 130°C /W, the θJA of the minimum PWB footprint will be at least 235°C /W. This can be improved by providing a heat sink of surrounding copper ground on the PWB. Depending on the size of the copper area, the resulting θJA can range from approximately 180°C /W for one square inch to nearly 130°C /W for 4 square inches. The addition of backside copper with through-holes, stiffeners, and other enhancements can also aid in reducing thermal resistance. The heat contributed by the dissipation of other devices located nearby must be included in the design considerations. Once the limiting parameters in these two relationships have been determined, the design can be modified to ensure that the device remains within specified operating conditions. If overload conditions are not considered, it is possible for the device to enter a thermal cycling loop, in which the circuit enters a shutdown condition, cools, re-enables, and then again overheats and shuts down repeatedly due to an unmanaged fault condition. Adjustable Version The FAN2558ADJ includes an input pin ADJ which allows the user to select an output voltage ranging from 1V to near VIN, using an external resistor divider. The voltage VADJ presented to the ADJ pin is fed to the onboard error amplifier which adjusts the output voltage until VADJ is equal to the onboard bandgap reference voltage of 1.00V(typ). The equation is: R1 V OUT = 0.59V × 1 + ----R2 Thermal Characteristics The FAN2558/FAN2559 is designed to supply 180mA at the specified output voltage with an operating die (junction) temperature of up to 125°C. Once the power dissipation and thermal resistance is known, the maximum junction temperature of the device can be calculated. While the power dissipation is calculated from known electrical parameters, the actual thermal resistance depends on the thermal characteristics of the SOT23-5 surface-mount package and the surrounding PC board copper to which it is mounted. The power dissipation is equal to the product of the input-tooutput voltage differential and the output current plus the ground current multiplied by the input voltage, or: P D = ( V IN – V OUT ) × I OUT + V IN × I GND Since the bandgap reference voltage is trimmed, 1% initial accuracy can be achieved. The total value of the resistor chain should not exceed 250KOhm total to keep the error amplifier biased during no-load conditions. Programming output voltages very near VIN need to allow for the magnitude and variation of the dropout voltage VDO over load, supply, and temperature variations. Note that the low-leakage FET input to the CMOS error amplifier induces no bias current error to the calculation. REV. 1.0.4 3/15/04 7 FAN2558/FAN2559 PRODUCT SPECIFICATIONS General PCB Layout Considerations For optimum device performance, careful circuit layout and grounding techniques must be used. Establishing a small local ground, to which the GND pin, and the output and bypass capacitors are connected, is recommended. The input capacitor should be grounded to the main ground plane. The quiet local ground is then routed back to the main ground plane using feed through via. In general, the high-frequency compensation components (input, bypass, and output capacitors) should be located as close to the device as possible. Close proximity of the output capacitor is especially important to achieve optimum performance, especially during high load conditions. A large copper area in the local ground serves as heat sink (as discussed above) when high power dissipation significantly increases device temperature. Component-side copper provides significantly better thermal performance. Added feed through connecting the device side ground plane to the back plane further reduces thermal resistance. 8 REV. 1.0.4 3/15/04 PRODUCT SPECIFICATIONS FAN2558/FAN2559 Block Diagram (Note 6) VIN EN Shutdown Control BYPASS Bandgap Precharge/Fast Enable Shutdown Thermal Shutdown Error Amplifier Load Current Sense n p VOUT Out of Regulation Detection GND PG n Delay Over-Current Dropout Detection GND Note: 6. Fixed output voltage version. BYPASS pin is available for FAN2559 only. REV. 1.0.4 3/15/04 9 FAN2558/FAN2559 PRODUCT SPECIFICATIONS Typical Performance Characteristics Unless otherwise specified, CIN = COUT = 1µF, RPG = 47kΩ, TA = 25°C, EN = VIN Output Voltage vs. Temperature Output Voltage vs. Temperature ILOAD = 0mA Output Voltage (V) Output Voltage (V) VIN = 5.5V ILOAD = 180mA VIN = 5.5V Junction Temperature (°C) Junction Temperature (°C) Ground Current vs. Temperature ILOAD = 0mA VIN = 5.5V Ground Current vs. Temperature ILOAD = 180mA Ground Current (µA) VIN = 5.5V VIN = 2.7V Ground Current (µA) VIN = 2.7V Junction Temperature (°C) Junction Temperature (°C) Enable Response Time vs. Temperature Power On Response Time vs. Temperature Enable Delay (µS) Junction Temperature (°C) Power On Delay (µS) Junction Temperature (°C)) 10 REV. 1.0.4 3/15/04 PRODUCT SPECIFICATIONS FAN2558/FAN2559 Typical Performance Characteristics (Continued) Unless otherwise specified, CIN = COUT = 1µF, RPG = 47kΩ, TA = 25°C, EN = VIN Power Good Delay vs. Input Voltage ILOAD = 100µA Output Voltage vs. Input Voltage Power Good Delay (mS) Output Voltage (V) ILOAD =100µA ILOAD =180mA Input Voltage (V) Input Voltage (V) Output Voltage vs. Load Current Output Voltage vs. Enable Voltage COUT =1µF COUT =1µF Output Voltage (V) Load Current (mA) Output Voltage (V) VIN =2.7V ILOAD =100µA Enable Voltage (V) Ripple Rejection vs. Frequency VOUT ≤ 1.8V Ripple Rejection vs. Frequency VOUT ≤ 1.8V ILOAD =0mA Ripple Rejection (dB) Ripple Rejection (dB) COUT =1µF CBYP = 10nF ILOAD =180mA COUT =1µF CBYP = 10nF REV. 1.0.4 3/15/04 11 FAN2558/FAN2559 PRODUCT SPECIFICATIONS Typical Performance Characteristics (Continued) Unless otherwise specified, CIN = COUT = 1µF, RPG = 47kΩ, TA = 25°C, EN = VIN Output Spectral Noise Density ILOAD = 180mA COUT =1µF CBYP = 10nF Enable Voltage (2V/div) Noise (nVrms/rtHz) Enable Delay = 27.6µS VOUT =1.2V Output Voltage (500mV/div) VIN =2.7V ILOAD =0mA COUT =1µF CBYP =10nF Time (20µS/div) Load Transient Response Output Voltage (100mV/div) VIN = 2.7V VOUT =1.8V COUT = 4.7µF Power Good Delay Power Good Delay = 2mSec VIN =3V VOUT =1V COUT =1µF ILOAD =100mA Output Current (50mA/div) ILOAD = 0mA Time (200µS/div) Power Good (2V/div) Output Voltage (1V/div) Time (1mS/div) Power Good in Fail Condition 25 20 15 10 5 0 0 .0 VIN = 5V VIN = 4V Power Good Current (mA) VIN = 3V 0.5 1.0 1.5 2.0 Power Good Voltage (V) 12 REV. 1.0.4 3/15/04 PRODUCT SPECIFICATIONS FAN2558/FAN2559 Mechanical Dimensions 2x2mm 6-Lead MLP REV. 1.0.4 3/15/04 13 FAN2558/FAN2559 PRODUCT SPECIFICATIONS Mechanical Dimensions 6-Lead SOT-23 Package B e c L E H E H 5-Lead SOT-23 Package B e c L α e1 D e1 D α A A A1 A1 Symbol A A1 B c D E e e1 H L α Notes: Inches Min .035 .000 .008 .003 .106 .059 Max .057 .006 .020 .010 .122 .071 Millimeters Min .90 .00 .20 .08 2.70 1.50 Max 1.45 .15 .50 .25 3.10 1.80 Notes .037 BSC .075 BSC .087 .004 0° .126 .024 10° .95 BSC 1.90 BSC 2.20 .10 0° 3.20 .60 10° 7. Package outline exclusive of mold flash & metal burr. 8. Packageoutline exclusive of solder plating. 9. EIAJ Ref Number SC_74A 14 REV. 1.0.4 3/15/04 PRODUCT SPECIFICATIONS FAN2558/FAN2559 Ordering Information TA= -40°C to 85°C Part Number Output Voltage FAN2558 1.0V 1.2V 1.3V 1.5V 1.8V 2.5V 3.3V 3.5V 3.6V 3.8V 1.0V 1.2V 1.3V 1.5V 1.8V Adjustable FAN2559 1.0V 1.2V 1.3V 1.5V 1.8V 1.0V 1.2V 1.3V 1.5V 1.8V Package Marking 58T 58U 58X 58V 58O 58J 58K 58P 58Q 58I 58T 58U 58X 58V 58O 58R 58R 59T 59U 59X 59V 59O 59T 59U 59X 59V 59O Package 5-Lead SOT-23 Order Code FAN2558S10X FAN2558S12X FAN2558S13X FAN2558S15X FAN2558S18X FAN2558S25X FAN2558S33X FAN2558S35X FAN2558S36X FAN2558S38X FAN2558MP10X FAN2558MP12X FAN2558MP13X FAN2558MP15X FAN2558MP18X FAN2558SX FAN2558MPX FAN2559S10X FAN2559S12X FAN2559S13X FAN2559S15X FAN2559S18X FAN2559MP10X FAN2559MP12X FAN2559MP13X FAN2559MP15X FAN2559MP18X 2mm x 2mm 6-Lead MLP 6-Lead SOT-23 2mm x 2mm 6-Lead MLP 6-Lead SOT-23 2mm x 2mm 6-Lead MLP DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. www.fairchildsemi.com REV. 1.0.4 3/15/04  2004 Fairchild Semiconductor Corporation 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.