FAN7085CMX

FA N 70 85 _F 08 5 H igh Side G a te Dr iv e r wit h Re c har ge F ET March 2009 FAN7085_F085 Features • Qualified to AEC Q100 High Side Gate Driver with Recharge FET Description The FAN7085_F085 is a high-side gate drive IC with reset input and built-in recharge FET. It is designed for high voltage and high speed driving of MOSFET or IGBT, which operates up to 300V. Fairchild's high-voltage process and common-mode noise cancellation technique provide stable operation in the high side driver under high-dV/dt noise circumstances. Logic input is compatible with standard CMOS outputs. The UVLO circuits prevent from malfunction when VCC and VBS are lower than the specified threshold voltage. It is available with space saving SOIC-8 Package. Minimum source and sink current capability of output driver is 250mA and 250mA. Built-in recharge FET to refresh bootstrap circuit is very useful for circuit topology requiring switches on low and high side of load. • Floating channel designed for bootstrap operation fully operational up to 300V. • • Tolerance to negative transient voltageon VS pin dv/dt immune. • Gate drive supply range from 4.5V to 20V • Under-voltage lockout • CMOS Schmitt-triggered inputs with pull-down and pull-up • High side output out of phase with input (Inverted input) • Reset input • Internal recharge FET for bootstrap refresh SOIC-8 Typical Applications • Diesel and gasoline injectors/valves • MOSFET-and IGBT high side driver applications Ordering Information Device FAN7085CM FAN7085CMX X : Tape & Reel type Package SOIC-8 SOIC-8 Operating Temp. -40 ° C ~ 125 ° C -40 ° C ~ 125 ° C © 2008 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com FAN7085_F085 Rev. 1.0.3 FA N 70 85 _F 08 5 H igh Side G a te Dr iv e r wit h Re c har ge F ET Block Diagrams VB Under Voltage Reset VB to VS Pulse Filter Flip Flop Brake before make HO VS VCC Under Voltage Reset VCC to GND RESET- INGND Logic Pulse Filter Level Shifter ON Delay Level Shifter OFF Pin Assignments 1 2 3 4 VCC INGND VB HO NC 8 7 6 5 RESET- VS Pin Definitions Pine Number 1 2 3 4 5 6 7 8 Pin Name VCC INGND RESETVS NC HO VB I/O P I P I P A P Pin Function Description Driver supply voltage, typically 5V Driver control signal input (Negative Logic) Ground Driver enable input signal (Negative Logic) High side floating offset for MOSFET Source connection No connection (No Bond wire) High side drive output for MOSFET Gate connection Driver output stage supply 2 FAN7085_F085 Rev. 1.0.3 www.fairchildsemi.com Recharg e Path FA N 70 85 _F 08 5 H igh Side G a te Dr iv e r wit h Re c har ge F ET Absolute Maximum Ratings Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to GND. Parameter High side floating supply voltage High side driver output stage voltage Neg. transient: 0.5 ms, external MOSFET off Symbol VBS VB Vs VH O VC C VIN VRES Pd 1) Min. -0.3 -5 -25 VS-0.3 -0.3 -0.3 -0.3 Max. 25 325 300 VB+0.3 25 Vcc+0.3 Vcc+0.3 0.625 200 Unit V V V V V V V W ° C/W V V High side floating supply offset voltage Neg. transient 0.2 us High side floating output voltage Supply voltage Input voltage for INInput voltage for RESETPower Dissipation 1) Thermal resistance, junction to ambient Electrostatic discharge voltage (Human Body Model) Charge device model Junction Temperature Storage Temperature Rthja VESD VCDM Tj TS -55 1.5K 500 150 150 °C °C Note: 1) The thermal resistance and power dissipation rating are measured bellow conditions; JESD51-2: Integrated Circuit Thermal Test Method Environmental Conditions - Natural condition(StillAir) JESD51-3: Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Package Recommended Operating Conditions For proper operation the device should be used within the recommended conditions.-40°C 6.5V VBS: 6.5V->2.4V or 2.4V->6.5V VB=VS=300V Vcc =20V Static mode, VBS =7V, VIN =0 or 5V Static mode, VBS =16V, VIN =0 or 5V VBS =7V, Cbs=1uF, tdIG-IN =3uS, t T E S T=100uS Min. 2.8 0.02 0.5 0.5 - Typ. 3.7 3.4 0.3 Max. 4.3 20 20 Unit V V V us us uA uA uA uA mV - 200 500 100 200 210 VIH VIL IINIIN+ R IN VRH VR L IR E S + IR E S RR E S VR E S E T =5V VR E S E T =0 VIN =0 VIN =5V 0.6VC C 5 83 0.6Vcc 25 200 - 0.28VC C 60 5 1000 0.28Vcc V V uA uA ΚΩ V V uA uA ΚΩ 5 25 60 5 83 200 1000 VO H VOL IO + IOR OP RO N I O =0 I O =0 VIN =5V VIN =0 250 250 450 450 15.5 15.5 0.1 0.1 28 28 V V mA mA Ω Ω Recharge Characteristics Recharge TR turn-on propagation delay Recharge TR turn-off propagation delay Recharge TR on-state voltage drop Dead Time Characteristics High side turn-off to recharge gate turn-on Recharge gate turn-off to high side turn-on DTHOFF DTHON Vcc=5V, VS =7V Vcc=5V, VS =7V 4 0.1 7.8 0.4 9.8 0.7 us us T on_rech T off_rech VR E C H Is=1mA, VIN=5V @125° C 4 7.9 0.2 9.8 0.4 1.2 us us V Note: The input parameter are referenced to GND. The VO and IO parameters are referenced to GND. 4 FAN7085_F085 Rev. 1.0.3 www.fairchildsemi.com FA N 70 85 _F 08 5 H igh Side G a te Dr iv e r wit h Re c har ge F ET Dynamic Electrical Characteristics Unless otherwise specified, -40°C VCCUVLO+ > VCCUVLO+ Notes: X means independent from signal IN-=LOW indicates that the high side NMOS is ON IN-=HIGH indicates that the high side NMOS is OFF RechFET =ON indicates that the recharge MOSFET is ON RechFET =OFF indicates that the recharge MOSFET is OFF VBS X X X > VBSUVLO+ < VBSUVLO- RESETX LOW X HIGH HIGH INX X HIGH LOW LOW Ho OFF OFF OFF ON OFF RechFET ON ON ON OFF OFF 6 FAN7085_F085 Rev. 1.0.3 www.fairchildsemi.com FA N 70 85 _F 08 5 H igh Side G a te Dr iv e r wit h Re c har ge F ET Typical Application Circuit 1. Typical Application Circuit D1 VCC VCC INGND RESETVB HO NC VS Up to 300V R1 C2 R2 Load C3 C1 2. Application Example From Charge Pump D5 Voltage Source 5V VCC INGND RESETVB HO NC VS R1 S1 C3 R2 C2 C1 D3 R3 From LS Driver C4 R4 S2 D4 Load GND 7 FAN7085_F085 Rev. 1.0.3 www.fairchildsemi.com FA N 70 85 _F 08 5 H igh Side G a te Dr iv e r wit h Re c har ge F ET Input-Output Waveforms 1. Input/Output Timing Diagrams IN- RESET- 90% 90% VS 10% tr tf 10 % VHO Recharge tplh tphl Toff _rech T on_rech Figure.1 Input and Output Timing Diagram and Switching Time Waveform Definition 2. Reset Timing Diagrams IN- RESET- VHO tplh _res tphl_res Figure.2 Reset and Output Timing Diagram 8 FAN7085_F085 Rev. 1.0.3 www.fairchildsemi.com FA N 70 85 _F 08 5 H igh Side G a te Dr iv e r wit h Re c har ge F ET 3.VB Drop Voltage Diagram Ig INIg VCC VB HO NC 50R 1u RESET- INGND RESET- VS 7V 2n5 VB-VS VB drop Figure3.b VB Drop Voltage Test Circuit Brake before make Figure3.a VB Drop Voltage Diagram 9 FAN7085_F085 Rev. 1.0.3 www.fairchildsemi.com FA N 70 85 _F 08 5 H igh Side G a te Dr iv e r wit h Re c har ge F ET Performance Graphs T his performance graphs based on ambient temperature -40 ° C ~ 1 2 5 °C 3.2 VBS=7V, RL=50, CL=2.5nF 2.6 VBS=7V, RL=50, CL=2.5nF 3.0 2.4 Vinth+ (V) 2.8 Vinth- (V) 2.2 2.6 2.0 2.4 Typ. Typ. 2.2 1.8 4.4 4.7 5.0 5.3 5.6 5.9 6.2 6.5 4.4 4.7 5.0 5.3 5.6 5.9 6.2 6.5 Vsupply (V) Figure 4a. Positive IN and RESET Threshold vs VCC Supply Vsupply (V) Figure 4b. Negative IN and RESET Threshold vs VCC Supply 2000 500 Output Source Cureent (mA) VCC=5V, RL=50, CL=2.5nF VCC=5V,VBS=7V, RL=50, CL=2.5nF Typ. Output Sink Cureent (mA) 1600 -40oC 450 1200 125 C o 400 800 350 400 0 5 10 15 20 300 -50 0 50 100 o 150 VBS(V) Temperature ( C) Figure5a. Output Sink Current vs VBS Supply Figure5b. Output Source Current vs Tempearature 650 250 VCC=5V,VBS=7V, RL=50, CL=2.5nF Turn-on Propagation Delay (ns) Turn-off Propagation Delay (ns) VCC=5V,VBS=7V, RL=50, CL=2.5nF 620 200 590 560 Typ. 150 Typ. 530 500 -50 0 50 100 o 150 100 -50 0 50 100 o 150 Temperature( C) Figure 6a. Turn-On Propagation Delay Time vs Temperature Temperature ( C) Figure 6b. Turn-Off Propagation Delay Time vs Temperature 10 FAN7085_F085 Rev. 1.0.3 www.fairchildsemi.com FA N 70 85 _F 08 5 H igh Side G a te Dr iv e r wit h Re c har ge F ET 700 VCC=5V, VBS=7V, RL=50, CL=2.5nF RES-to-Output Turn-off Propagation Delay (ns) RES-to-Output Turn-on Propagation Delay (ns) 250 VCC=5V, VBS=7V, RL=50, CL=2.5nF 650 200 600 150 Typ. 550 Typ. 500 -50 0 50 100 o 150 100 -50 0 50 100 o 150 Temperature ( C) Temperature ( C) Figure 7a. RES to Output Turn-On Propagation Delay vs Temperature Figure 7b. RES to Output Turn-Off Propagation Delay vs Temperature 50 50 Logic "1" RES Input Current ( uA) VCC=5V, RL=50, CL=2.5nF VCC=5V, RL=50, CL=2.5nF Logic "0" Input Current ( uA) 40 Typ. 40 30 30 Typ. 20 20 10 10 0 -50 0 50 100 o 150 0 -50 0 50 100 o 150 Temperature ( C) Figure 8. Logic “0” IN Input Current vs Temperature Temperature ( C) Figure 9. Logic “1” RESET Input Current vs Temperature 5.0 4.5 5.0 4.5 Max. VBS Supply Voltage(V) VBS Supply Voltage(V) 4.0 Typ. 4.0 3.5 3.0 Max. 3.5 3.0 2.5 2.0 -50 Min. Typ. Min. 2.5 2.0 -50 0 50 100 o 150 0 50 100 o 150 Temperature( C) Temperature( C) Figure 10a. VBS Under Voltage Threshold(+) vs Temperature Figure 10b. VBS Under Voltage Threshold(-) vs Temperature 11 FAN7085_F085 Rev. 1.0.3 www.fairchildsemi.com FA N 70 85 _F 08 5 H igh Side G a te Dr iv e r wit h Re c har ge F ET 5.0 4.5 5.0 4.5 Max. VC C Supply Voltage(V) 4.0 Typ. VC C Supply Voltage(V) 4.0 3.5 Max. 3.5 3.0 2.5 2.0 -50 Min. Typ. 3.0 Min. 2.5 2.0 -50 0 50 100 o 150 0 50 100 o 150 Temperature( C) Temperature( C) Figure 11a. VCC Under Voltage Threshold(+) vs Temperature Figure 11b. VCC Under Voltage Threshold(-) vs Temperature Recharge Transistor Turn-on Propagation Delay (us) Recharge Gate Turn-off Propagation Delay (ns) 10 VCC=5v, VBS=7VRL=50, CL=2.5nF 300 VBS=7V VCC=5v, VBS=7VRL=50, CL=2.5nF 260 8 Typ. 220 6 180 Typ. 4 -50 0 50 100 o 150 140 -50 0 50 100 o 150 Temperature( C) Figure 12. Recharge FET Turn-on Delay time Temperature ( C) Figure 12. Recharge FET Turn-off Delay time VCC=5v, VBS=7VRL=50, CL=2.5nF High Side Turn-off to Recharge Gate Turn-on (us) 1.8 10 VCC=5v, VBS=7VRL=50, CL=2.5nF 1.4 8 Typ. I ( mA) 1.0 6 0.6 Typ. 0.2 0.4 0.6 0.8 1.0 1.2 4 -50 0 50 100 o 150 V (V) Temperature ( C) Figure 14. Recharge FET I-V curve Figure 15. High Side Turn-off to Recharge FET turn-on VS Temperature 12 FAN7085_F085 Rev. 1.0.3 www.fairchildsemi.com FA N 70 85 _F 08 5 H igh Side G a te Dr iv e r wit h Re c har ge F ET Package Dimensions 13 www.fairchildsemi.com FAN7085_F085 Rev. 1.0.3 TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. 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Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I39 © 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com