FAN73832

FAN73832 Half-Bridge Gate-Drive IC February 2007 FAN73832 Features Half-Bridge Gate-Drive IC Description The FAN73832 is a half-bridge, gate-drive IC with shutdown and programmable dead-time control functions for driving MOSFETs and IGBTs, operating up to +600V. Fairchild’s high-voltage process and common-mode noise canceling technique provide stable operation of high-side driver under high dv/dt noise circumstances. An advanced level-shift circuit allows high-side gate driver operation up to VS=-9.8V (typical) for VBS=15V. The UVLO circuits for both channels prevent malfunction when VDD and VBS are lower than the specified threshold voltage. Output drivers typically source/sink 350mA/650mA, respectively, which is suitable for all kinds of half- and full-bridge inverters. Floating Channel for Bootstrap Operation to +600V Typically 350mA/650mA Sourcing/Sinking Current Driving Capability for Both Channels Extended Allowable Negative VS Swing to -9.8V for Signal Propagation at VDD=VBS=15V High-Side Output in Phase of IN Signal Built-in UVLO Functions for Both Channels Built-in Common-Mode dv/dt Noise Canceling Circuit Internal 400ns Minimum Dead-Time at RDT=20KΩ Programmable Turn-on Delay-Time Control (Dead-Time) Applications SMPS Motor Drive Inverter Fluorescent Lamp Ballast HID Ballast 8-SOP 8-DIP Ordering Information Part Number FAN73832M(1) FAN73832MX(1) FAN73832N Note: 1. These devices passed wave soldering test by JESD22A-111. Package 8-SOP 8-DIP Pb-Free Yes Operating Temperature Range Packing Method Tube -40°C ~ 125°C Tape & Reel Tube © 2006 Fairchild Semiconductor Corporation FAN73832 Rev. 1.0.2 www.fairchildsemi.com FAN73832 Half-Bridge Gate-Drive IC Typical Application Diagrams RBOOT DBOOT VDD FAN73832 1 IN VDC VB HO VS LO 8 7 PWM 2 GND 3 CBOOT PWM IC Control Shutdown RDT DT/ SD 6 5 4 VDD FAN73832 Rev.01 Figure 1. Application Circuit for Half-Bridge Switching Power Supply VDC VCC VDD VB HO VDD VB HO VS PHA PHB SD IN VS IN Forward FAN73832 DT/ SD GND LO FAN73832 Reverse DT/ SD GND LO M DC Motor Controller FAN73832 Rev.01 Figure 2. Application Circuit for Full-Bridge DC Motor Driver © 2006 Fairchild Semiconductor Corporation FAN73832 Rev. 1.0.2 2 www.fairchildsemi.com FAN73832 Half-Bridge Gate-Drive IC Internal Block Diagram 8 UVLO VB DRIVER NOISE CANCELLER R S R Q 7 HO IN 1 HS(ON/ OFF) PULSE GEN ERATOR 6 UVLO VS VDD SCHMITT TRIGGER INPUT 4 DRIVER DT/SD 3 RDTINT DEAD - TIME CONTROL LS(ON/ OFF) DELAY 5 LO 2 GND FAN73832 Rev:00 Figure 3. Functional Block Diagram of FAN73832 © 2006 Fairchild Semiconductor Corporation FAN73832 Rev. 1.0.2 3 www.fairchildsemi.com FAN73832 Half-Bridge Gate-Drive IC Pin Assignments IN GND DT/SD VDD 1 2 3 4 8 7 6 5 VB HO VS LO Figure 4. Pin Configuration (Top View) FAN73832 FAN73832 Rev:00 Pin Definitions Pin # 1 2 3 4 5 6 7 8 Name IN GND DT/SD VDD LO VS HO VB Logic Input Ground Description Dead-Time Control with External Resistor and Shutdown Function Low-Side Supply Voltage Low-Side Driver Output High-Side Floating Supply Return High-Side Driver Output High-Side Floating Supply © 2006 Fairchild Semiconductor Corporation FAN73832 Rev. 1.0.2 4 www.fairchildsemi.com FAN73832 Half-Bridge Gate-Drive IC Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA=25°C unless otherwise specified. Symbol VS VB VHO VDD VLO VIN VDT/SD GND dVS/dt PD(2)(3)(4) θJA TJ TSTG Notes: Parameter High-side offset voltage High-side floating supply voltage High-side floating output voltage HO Low-side and logic-fixed supply voltage Low-side output voltage LO Logic input voltage (IN) Dead-time and shutdown control voltage Logic ground Allowable offset voltage slew rate Power dissipation Thermal resistance, junction-to-ambient Junction temperature Storage temperature 8-SOP 8-DIP 8-SOP 8-DIP Min. VB-25 -0.3 VS-0.3 -0.3 -0.3 -0.3 -0.3 VDD-25 Max. VB+0.3 625 VB+0.3 25 VDD+0.3 VDD+0.3 5.0 VDD+0.3 50 0.625 1.25 200 100 150 150 Unit V V V V V V V V V/ns W °C/W °C °C 2. Mounted on 76.2 x 114.3 x 1.6mm PCB (FR-4 glass epoxy material). 3. Refer to the following standards: JESD51-2: Integral circuits thermal test method environmental conditions - Natural convection JESD51-3: Low effective thermal conductivity test board for leaded surface mount packages 4. Do not exceed PD under any circumstances. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol VB VS VDD VHO VLO VIN TA Parameter High-side floating supply voltage High-side floating supply offset voltage Low-side supply voltage High-side (HO) output voltage Low-side (LO) output voltage Logic input voltage (IN) Ambient temperature Condition Min. VS+15 6-VDD 15 VS GND GND -40 Max. VS+20 600 20 VB VDD VDD 125 Unit V V V V V V °C © 2006 Fairchild Semiconductor Corporation FAN73832 Rev. 1.0.2 5 www.fairchildsemi.com FAN73832 Half-Bridge Gate-Drive IC Electrical Characteristics VBIAS (VDD, VBS)=15.0V, RDT=20KΩ,TA=25°C, unless otherwise specified. The VIN and IIN parameters are referenced to GND. The VO and IO parameters are referenced to VS and COM and are applicable to the respective outputs HO and LO. Symbol IQBS IQDD ISD(5) IPBS IPDD ILK VDDUV+ VBSUV+ VDDUVVBSUVVDDUVH VBSUVH RDTINT VDT VOH VOL IO+ IOVS Parameter Quiescent VBS supply current Quiescent VDD supply current Shutdown supply current Operating VBS supply current Operating VDD supply current Offset supply leakage current VDD and VBS supply under-voltage positive going threshold VDD and VBS supply under-voltage negative going threshold VDD supply under-voltage lockout hysteresis Internal dead-time setting resistance Normal voltage at DT High-level output voltage, VBIAS-VO Low-level output voltage, VO Output high short-circuit pulse current Output low short-circuit pulsed current Allowable negative VS pin voltage for IN signal propagation to HO Logic "1" input voltage Logic "0" input voltage Logic "1" input bias current Logic "0" input bias current Shutdown "1" input voltage Shutdown "0" input voltage Input pull-down resistance VIN=5V VIN=0V Condition VIN=0V or 5V VIN=0V or 5V, RDT=20KΩ DT/SD=GND fIN=20kHz, rms value fIN=20kHz, rms value VB=VS=600V Min. Typ. 35 300 650 400 650 Max. 90 450 900 700 850 10 Unit SUPPLY CURRENT SECTION µA POWER SUPPLY SECTION 10.7 10.0 11.6 10.8 0.8 12.5 11.6 V V V DEAD-TIME CONTROL SECTION 20 RDT=20KΩ IO=20mA VO=0V, VIN=5V with PW