FDM6296

FDM6296 Single N-Channel, Logic-Level, PowerTrench® MOSFET December 2004 FDM6296 Single N-Channel, Logic-Level, PowerTrench® MOSFET Features ■ 11.5 A, 30 V RDS(ON) = 10.5 mΩ @ VGS = 10 V RDS(ON) = 15 mΩ @ VGS = 4.5 V ■ Low Qg, Qgd and Rg for efficient switching performance ■ Low Profile – MicroFET 3.3 x 3.3 mm General Description This single N-Channel MOSFET in the thermally efficient MicroFET package has been specifically designed to perform well in Point of Load converters. Providing an optimized balance between Rds(on) and gate charge this device can be effectively used as a “high side” control switch or “low side” synchronous rectifier. Applications ■ Point of Load Converter ■ 1/16 Brick Synchronous Rectifier MicroFET Bottom 6 5 7 8 Top 5 6 7 2 1 4 3 2 1 8 4 3 Absolute Maximum Ratings TA=25°C unless otherwise noted Symbol VDSS VGSS ID PD TJ, TSTG Drain-Source Voltage Gate-Source Voltage Drain Current – Continuous – Pulsed Power Dissipation (Steady State) (Note 1a) (Note 1b) Operating and Storage Junction Temperature Range (Note 1a) Parameter Ratings 30 ±20 11.5 40 2.5 1.2 –55 to +150 Units V V A W °C Thermal Characteristics RθJA RθJA RθJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1b) (Note 1) 52 108 5 °C/W Package Marking and Ordering Information Device Marking 6296 Device FDM6296 Reel Size 7’’ Tape width 12mm Quantity 3000 units ©2004 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com FDM6296 Rev. D FDM6296 Single N-Channel, Logic-Level, PowerTrench® MOSFET Electrical Characteristics TA = 25°C unless otherwise noted Symbol Off Characteristics BVDSS ∆BVDSS ∆ TJ IDSS IGSS VGS(th) ∆VGS(th) ∆ TJ RDS(on) Drain–Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate–Body Leakage VGS = 0 V, ID = 250 µA ID = 250 µA, Referenced to 25°C VDS = 24 V, VGS = 0 V VGS = ±20 V, VDS = 0 V VDS = VGS, ID = 250 µA ID = 250 µA, Referenced to 25°C VGS = 10 V, ID = 11.5 A VGS = 4.5 V, ID = 10 A VGS = 10 V, ID = 11.5A, TJ = 125°C VDS = 5 V, ID =11.5 A VDS = 15 V, VGS = 0 V, f = 1.0 MHz 1 1.9 –5 8.7 10.6 13 47 10.5 15 17 30 29 1 ±100 V mV/°C µA nA Parameter Test Conditions Min Typ Max Units On Characteristics (Note 2) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance Forward Transconductance 3 V mV/°C mΩ gFS Ciss Coss Crss RG td(on) tr td(off) tf Qg Qgs Qgd IS VSD trr Qrr S Dynamic Characteristics Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance VGS = 15 mV, f = 1.0 MHz VDD = 15 V, ID = 1 A, VGS = 10 V, RGEN = 6 Ω 1507 415 128 1.1 pF pF pF Ω 20 10 44 23 17 ns ns ns ns nC nC nC Switching Characteristics (Note 2) Turn–On Delay Time Turn–On Rise Time Turn–Off Delay Time Turn–Off Fall Time Total Gate Charge Gate–Source Charge Gate–Drain Charge VDS = 15 V, ID = 11.5 A, VGS = 5 V 10 5 27 13 12 4 3 Drain–Source Diode Characteristics and Maximum Ratings Maximum Continuous Drain–Source Diode Forward Current Drain–Source Diode Forward Voltage Diode Reverse Recovery Time Diode Reverse Recovery Charge VGS = 0 V, IS = 2 A (Note 2) IF = 11.5 A, diF/dt = 100 A/µs 0.9 29 20 2 1.2 A V nS nC Notes: 1. RθJA is determined with the device mounted on a 1 in_ 2 oz. copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC are guaranteed by design while RθJA is determined by the user’s board design. (a). RθJA = 52°C/W when mounted on a 1in2 pad of 2 oz copper, 1.5” x 1.5” x 0.062” thick PCB (b). RθJA = 108°C/W when mounted on a minimum pad of 2 oz copper 2. Pulse Test: Pulse Width < 300ms, Duty Cycle < 2.0% 2 FDM6296 Rev. D www.fairchildsemi.com FDM6296 Single N-Channel, Logic-Level, PowerTrench® MOSFET Typical Characteristics 30 25 ID, DRAIN CURRENT (A) 4.5V 20 15 10 5 2.5V 0 0 0.8 0.2 0.4 0.6 VDS, DRAIN-SOURCE VOLTAGE (V) 1 4.0V 3.0V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE VGS = 10.0V 3.5V 2 VGS = 3.0V 1.8 1.6 3.5V 1.4 4.0V 1.2 1 0 0 4 8 12 ID, DRAIN CURRENT (A) 16 20 4.5V 5.0V 6.0V 10.0V Figure 1. On-Region Characteristics Figure 2. On-Resistance Variation with Drain Current and Gate Voltage 1.6 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE RDS(ON), ON-RESISTANCE (OHM) ID = 11.5V VGS = 10.0V 1.4 0.025 ID = 5.8A 0.02 TA = 125°C 0.015 1.2 1 0.5 0.01 TA = 25°C 0.6 -50 0.005 -25 0 25 50 75 100 TJ, JUNCTION TEMPERATURE (°C) 125 150 2 4 6 8 VGS, GATE TO SOURCE VOLTAGE (V) 10 Figure 3. On-Resistance Variation with Temperature Figure 4. On-Resistance Variation with Gate-to-Source Voltage 40 VDS = 5V ID, DRAIN CURRENT (A) 30 IS, REVERSE DRAIN CURRENT (A) 100 VGS = 0V 10 TA = 125°C 1 0.1 0.01 0.001 25°C -55°C 20 TA = 125°C 10 25°C 0 0.5 -55°C 0.0001 1 1.5 2 2.5 3 VGS, GATE TO SOURCE VOLTAGE (V) 3.5 2 0.2 0.4 0.6 0.8 1 VGS, BODY DIODE FORWARD VOLTAGE (V) 1.2 Figure 5. Transfer Characteristics Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature 3 FDM6296 Rev. D www.fairchildsemi.com FDM6296 Single N-Channel, Logic-Level, PowerTrench® MOSFET Typical Characteristics 10 VGS, GATE-SOURCE VOLTAGE (V) ID = 11.5V 8 VDS = 10V 6 15V CAPACTIANCE (pF) 20V 1500 1200 900 Coss 600 300 2.5V 0 0 5 10 15 QG, GATE CHARGE (nC) 20 25 0 0 16 4 8 12 VDS, DRAIN TO SOURCE VOLTAGE (V) 20 Crss Ciss 1800 f = 1 MHz VSS = 0V 4 2 Figure 7. Gate Charge Characteristics Figure 8. Capacitance Characteristics 100 P(pk), PEAK TRANSIENT POWER (W) RDS(ON) LIMIT 100µs 50 SINGLE PULSE RθJA = 108°C/W TA = 25°C ID, DRAIN-CURRENT (A) 40 10 1ms 1 10ms 100ms 0.1 VGS = 10.0V SINGLE PULSE RθJA = 108°C/W TA = 25°C 1 10 VDS, DRAIN-SOURCE VOLTAGE (V) 1s 10s DC 30 20 10 0.01 0.1 100 0 0.001 0.01 0.1 1 tf, TIME (sec) 10 100 1000 Figure 9. Maximum Safe Operating Area Figure 10. Single Pulse Maximum Power Dissipation 1 r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE D = 0.5 0.2 0.1 0.1 0.05 0.02 0.01 0.01 P(pk) t1 t2 TJ – TA = P * RθJA(t) Duty Cycle, D = t1/t2 Single Phase 0.001 0.0001 0.001 0.01 0.1 t1, TIME (sec) 1 10 100 1000 RθJA(t) = r(t) * RθJA RθJA = 108°C/W Figure 5. Transfer Characteristics Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design. 4 FDM6296 Rev. D www.fairchildsemi.com FDM6296 Single N-Channel, Logic-Level, PowerTrench® MOSFET Dimensional Outline and Pad Layout 3.00 ± 0.10 PKG C L 8 5 A B 2.37 MIN 3.00 ± 0.10 (0.45) PKG C L 8 SYM C L 5 2.15 MIN (0.40) 1 (0.37) 0.65 1.95 4 0.32 ± 0.05 0.10 A B 3.50 0.10 C SEE DETAIL A (0.85) 1 0.65 1.95 4 0.42 MIN C 1.50±0.10 8 3.20±0.15 (0.35) (0.30) (0.10) 0.08 C LAND PATTERN RECOMMENDATION (2.27) 1 4 (0.20) PKG C L 3.20±0.15 5 NOTES: UNLESS OTHERWISE SPECIFIED A) NO PACKAGE STANDARD REFERENCE AS OF 29 JUNE 2002. ALL DIMENSIONS ARE IN MILLIMETERS. DIMENSIONS DO NOT INCLUDE BURRS OR MOLD FLASH. DIMENSIONING AND TOLERANCING PER ASME Y14.5M–1994. 0.80 0.85 B) C) D) 1.00 0.85 0.05 0.00 0.20±0.025 SEATING PLANE DETAIL A SCALE: 48:1 5 FDM6296 Rev. D www.fairchildsemi.com FDM6296 Single N-Channel, Logic-Level, PowerTrench® MOSFET TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ FAST ActiveArray™ FASTr™ Bottomless™ FPS™ CoolFET™ FRFET™ CROSSVOLT™ GlobalOptoisolator™ DOME™ GTO™ EcoSPARK™ HiSeC™ E2CMOS™ I2C™ EnSigna™ i-Lo™ FACT™ ImpliedDisconnect™ FACT Quiet Series™ ISOPLANAR™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ OPTOLOGIC Across the board. Around the world.™ OPTOPLANAR™ PACMAN™ The Power Franchise POP™ Programmable Active Droop™ Power247™ PowerEdge™ PowerSaver™ PowerTrench QFET QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ µSerDes™ SILENT SWITCHER SMART START™ SPM™ Stealth™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic TINYOPTO™ TruTranslation™ UHC™ UltraFET UniFET™ VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I14 6 FDM6296 Rev. D www.fairchildsemi.com