FGB30N6S2

FGH30N6S2 / FGP30N6S2 / FGB30N6S2 July 2001 FGH30N6S2 / FGP30N6S2 / FGB30N6S2 600V, SMPS II Series N-Channel IGBT General Description The FGH30N6S2, FGP30N6S2, and FGB30N6S2 are Low Gate Charge, Low Plateau Voltage SMPS II IGBTs combining the fast switching speed of the SMPS IGBTs along with lower gate charge and plateau voltage and avalanche capability (UIS). These LGC devices shorten delay times, and reduce the power requirement of the gate drive. These devices are ideally suited for high voltage switched mode power supply applications where low conduction loss, fast switching times and UIS capability are essential. SMPS II LGC devices have been specially designed for: • • • • • • Power Factor Correction (PFC) circuits Full bridge topologies Half bridge topologies Push-Pull circuits Uninterruptible power supplies Zero voltage and zero current switching circuits Features • 100kHz Operation at 390V, 14A • 200kHZ Operation at 390V, 9A • 600V Switching SOA Capability • Typical Fall Time. . . . . . . . . . . 90ns at TJ = 125oC • Low Gate Charge . . . . . . . . . 23nC at VGE = 15V • Low Plateau Voltage . . . . . . . . . . . . .6.5V Typical • UIS Rated . . . . . . . . . . . . . . . . . . . . . . . . . 150mJ • Low Conduction Loss Formerly Developmental Type TA49367. Package JEDEC STYLE TO-247 Symbol E JEDEC STYLE TO-220AB JEDEC STYLE TO-263AB C C G E C G G E C G E Device Maximum Ratings TC= 25°C unless otherwise noted Symbol BVCES IC25 IC110 ICM VGES VGEM SSOA EAS PD TJ TSTG Parameter Collector to Emitter Breakdown Voltage Collector Current Continuous, TC = 25°C Collector Current Continuous, TC = 110°C Collector Current Pulsed (Note 1) Gate to Emitter Voltage Continuous Gate to Emitter Voltage Pulsed Switching Safe Operating Area at TJ = 150°C, Figure 2 Pulsed Avalanche Energy, ICE = 20A, L = 1.3mH, VDD = 50V Power Dissipation Total TC = 25°C Power Dissipation Derating TC > 25°C Operating Junction Temperature Range Storage Junction Temperature Range Ratings 600 45 20 108 ±20 ±30 60A at 600V 150 167 1.33 -55 to 150 -55 to 150 mJ W W/°C °C °C Units V A A A V V CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. Pulse width limited by maximum junction temperature. ©2001 Fairchild Semiconductor Corporation FGH30N6S2 / FGP30N6S2 / FGB30N6S2 Rev. A FGH30N6S2 / FGP30N6S2 / FGS30N6S2 Package Marking and Ordering Information Device Marking 30N6S2 30N6S2 30N6S2 Device FGH30N6S2 FGP30N6S2 FGB30N6S2 Package TO-247 TO-220AB TO-263AB Tape Width 24mm Quantity 800 Electrical Characteristics TJ = 25°C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Off State Characteristics BVCES BVECS ICES IGES Collector to Emitter Breakdown Voltage Emitter to Collector Breakdown Voltage Collector to Emitter Leakage Current Gate to Emitter Leakage Current IC = 250µA, VGE = 0 IC = 10mA, VGE = 0 VCE = 600V VGE = ± 20V TJ = 25°C TJ = 125°C 600 10 25 100 2 ±250 V V µA mA nA On State Characteristics VCE(SAT) Collector to Emitter Saturation Voltage IC = 12A, VGE = 15V TJ = 25°C TJ = 125°C 2.0 1.7 2.5 2.0 V V Dynamic Characteristics QG(ON) VGE(TH) VGEP Gate Charge Gate to Emitter Threshold Voltage Gate to Emitter Plateau Voltage IC = 12A, VCE = 300V VGE = 15V VGE = 20V 3.5 23 26 4.3 6.5 29 33 5.0 8.0 nC nC V V IC = 250µA, VCE = 600V IC = 12A, VCE = 300V Switching Characteristics SSOA td(ON)I trI td(OFF)I tfI EON1 EON2 EOFF td(ON)I trI td(OFF)I tfI EON1 EON2 EOFF Switching SOA Current Turn-On Delay Time Current Rise Time Current Turn-Off Delay Time Current Fall Time Turn-On Energy (Note 2) Turn-On Energy (Note 2) Turn-Off Energy (Note 3) Current Turn-On Delay Time Current Rise Time Current Turn-Off Delay Time Current Fall Time Turn-On Energy (Note 2) Turn-On Energy (Note 2) Turn-Off Energy (Note 3) IGBT and Diode at TJ = 125°C ICE = 12A, VCE = 390V, VGE = 15V, RG = 10Ω L = 200µH Test Circuit - Figure 20 TJ = 150°C, RG = 10Ω, VGE = 15V, L = 100µH, VCE = 600V IGBT and Diode at TJ = 25°C, ICE = 12A, VCE = 390V, VGE = 15V, RG = 10Ω L = 200µH Test Circuit - Figure 20 60 6 10 40 53 55 110 100 11 17 73 90 55 160 250 150 100 100 200 350 A ns ns ns ns µJ µJ µJ ns ns ns ns µJ µJ µJ Thermal Characteristics RθJC NOTE: 2. Values Thermal Resistance Junction-Case - - 0.75 °C/W for two Turn-On loss conditions are shown for the convenience of the circuit designer. EON1 is the turn-on loss of the IGBT only. EON2 is the turn-on loss when a typical diode is used in the test circuit and the diode is at the same TJ as the IGBT. The diode type is specified in figure 20. 3. Turn-Off Energy Loss (EOFF) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending at the point where the collector current equals zero (ICE = 0A). All devices were tested per JEDEC Standard No. 24-1 Method for Measurement of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss. ©2001 Fairchild Semiconductor Corporation FGH30N6S2 / FGP30N6S2 / FGS30N6S2 Rev. A FGH30N6S2 / FGP30N6S2 / FGS30N6S2 Typical Performance Curves ICE, COLLECTOR TO EMITTER CURRENT (A) 50 ICE , DC COLLECTOR CURRENT (A) 70 60 50 40 30 20 10 0 0 100 200 300 400 500 600 700 VCE, COLLECTOR TO EMITTER VOLTAGE (V) TJ = 150oC, RG = 10Ω, VGE = 15V, L = 100mH 40 30 20 10 0 25 50 75 100 125 150 TC , CASE TEMPERATURE (oC) Figure 1. DC Collector Current vs Case Temperature 1000 fMAX, OPERATING FREQUENCY (kHz) TC 75oC Figure 2. Minimum Switching Safe Operating Area tSC , SHORT CIRCUIT WITHSTAND TIME (µs) VCE = 390V, RG = 10Ω, TJ = 125oC 10 300 VGE = 10V VGE = 15V 8 tSC 6 ISC 250 100 fMAX1 = 0.05 / (td(OFF)I + td(ON)I) fMAX2 = (PD - PC) / (EON2 + EOFF) PC = CONDUCTION DISSIPATION (DUTY FACTOR = 50%) RØJC = 0.49oC/W, SEE NOTES TJ = 125oC, RG = 3Ω, L = 200mH, V CE = 390V 200 4 150 2 9 10 11 12 13 14 15 10 1 10 ICE, COLLECTOR TO EMITTER CURRENT (A) 20 30 100 16 VGE , GATE TO EMITTER VOLTAGE (V) Figure 3. Operating Frequency vs Collector to Emitter Current ICE, COLLECTOR TO EMITTER CURRENT (A) 18 16 14 12 10 8 6 TJ = 150oC 4 2 0 0.50 TJ = 25oC TJ = 125oC DUTY CYCLE < 0.5%, VGE = 10V PULSE DURATION = 250ms ICE, COLLECTOR TO EMITTER CURRENT (A) Figure 4. Short Circuit Withstand Time 18 16 14 12 10 8 6 4 2 0 .5 .75 1 1.25 1.50 TJ = 25oC 1.75 2.0 2.25 TJ = 150oC DUTY CYCLE < 0.5%, VGE =15V PULSE DURATION = 250ms TJ = 125oC 0.75 1.00 1.25 1.50 1.75 2.00 2.25 VCE, COLLECTOR TO EMITTER VOLTAGE (V) VCE, COLLECTOR TO EMITTER VOLTAGE (V) Figure 5. Collector to Emitter On-State Voltage Figure 6. Collector to Emitter On-State Voltage ©2001 Fairchild Semiconductor Corporation FGH30N6S2 / FGP30N6S2 / FGS30N6S2 Rev. A ISC, PEAK SHORT CIRCUIT CURRENT (A) 12 350 FGH30N6S2 / FGP30N6S2 / FGS30N6S2 Typical Performance Curves (Continued) 400 EON2 , TURN-ON ENERGY LOSS (mJ) 350 300 TJ = 125oC, VGE = 10V, VGE = 15V 250 200 150 100 TJ = 25oC, VGE = 10V, VGE = 15V 50 0 0 5 10 15 20 25 ICE , COLLECTOR TO EMITTER CURRENT (A) EOFF TURN-OFF ENERGY LOSS (µJ) RG = 10Ω, L = 500mH, VCE = 390V 600 RG = 10Ω, L = 500mH, VCE = 390V 500 400 TJ = 125oC, VGE = 10V, VGE = 15V 300 200 100 TJ = 25oC, VGE = 10V, VGE = 15V 0 0 5 10 15 20 25 ICE , COLLECTOR TO EMITTER CURRENT (A) Figure 7. Turn-On Energy Loss vs Collector to Emitter Current 16 td(ON)I, TURN-ON DELAY TIME (ns) RG = 10Ω, L = 500µH, VCE = 390V 14 12 10 TJ = 25oC, TJ = 125oC, VGE = 10V 8 6 4 TJ = 25oC, TJ = 125oC, VGE = 15V 2 0 Figure 8. Turn-Off Energy Loss vs Collector to Emitter Current 40 RG = 10Ω, L = 500mH, VCE = 390V 35 trI , RISE TIME (ns) 30 25 TJ = 125oC, VGE = 15V, VGE = 10V 20 15 10 TJ = 25oC, VGE = 10V, VGE =15V 5 0 0 5 10 15 20 25 0 5 10 15 20 25 ICE , COLLECTOR TO EMITTER CURRENT (A) ICE , COLLECTOR TO EMITTER CURRENT (A) Figure 9. Turn-On Delay Time vs Collector to Emitter Current 90 td(OFF) TURN-OFF DELAY TIME (ns) RG = 10Ω, L = 500µH, VCE = 390V 80 70 60 50 40 30 20 0 5 10 15 20 25 ICE , COLLECTOR TO EMITTER CURRENT (A) Figure 10. Turn-On Rise Time vs Collector to Emitter Current 120 RG = 10Ω, L = 500µH, VCE = 390V tfI , FALL TIME (ns) 100 TJ = 125oC, VGE = 10V OR 15V 80 60 TJ = 25oC, VGE = 10V OR 15V 40 0 5 10 15 20 25 ICE , COLLECTOR TO EMITTER CURRENT (A) Figure 11. Turn-Off Delay Time vs Collector to Emitter Current Figure 12. Fall Time vs Collector to Emitter Current ©2001 Fairchild Semiconductor Corporation FGH30N6S2 / FGP30N6S2 / FGS30N6S2 Rev. A FGH30N6S2 / FGP30N6S2 / FGS30N6S2 Typical Performance Curves (Continued) ICE, COLLECTOR TO EMITTER CURRENT (A) 175 150 125 TJ = 25 C 100 75 50 25 0 5 6 7 8 9 10 11 12 13 14 15 16 VGE , GATE TO EMITTER VOLTAGE (V) TJ = 125oC TJ = -55 C o o 16 PULSE DURATION = 250µs VGE, GATE TO EMITTER VOLTAGE (V) DUTY CYCLE < 0.5%, VCE = 10V IG(REF) = 1mA, RL = 25Ω, TJ = 25oC 14 12 VCE = 600V 10 8 6 VCE = 400V 4 VCE = 200V 2 0 0 2 4 6 8 10 12 14 16 18 20 22 24 QG , GATE CHARGE (nC) Figure 13. Transfer Characteristic ETOTAL, TOTAL SWITCHING ENERGY LOSS (mJ) ETOTAL, TOTAL SWITCHING ENERGY LOSS (mJ) Figure 14. Gate Charge 1.2 RG = 10Ω, L = 500mH, VCE = 390V, VGE = 15V 10 TJ = 125oC, L = 500µH, VCE = 390V, VGE = 15V ETOTAL = EON2 + EOFF ETOTAL = EON2 + EOFF 1.0 ICE = 24A 0.8 0.6 1 ICE = 24A 0.4 ICE = 12A ICE = 12A 0.2 ICE = 6A ICE = 6A 0.1 0 25 50 75 100 o 125 150 1.0 10 100 1000 TC , CASE TEMPERATURE ( C) RG, GATE RESISTANCE (Ω) Figure 15. Total Switching Loss vs Case Temperature VCE, COLLECTOR TO EMITTER VOLTAGE (V) 1.4 FREQUENCY = 1MHz 1.2 C, CAPACITANCE (nF) 1.0 0.8 CIES 0.6 0.4 0.2 CRES 0.0 0 10 20 30 40 50 60 70 80 90 100 Figure 16. Total Switching Loss vs Gate Resistance 3.5 DUTY CYCLE < 0.5% PULSE DURATION = 250µs, TJ = 25oC 3.0 2.5 ICE = 24A ICE = 12A 2.0 ICE = 6A COES 1.5 6 7 8 9 10 11 12 13 14 15 16 VGE, GATE TO EMITTER VOLTAGE (V) VCE, COLLECTOR TO EMITTER VOLTAGE (V) Figure 17. Capacitance vs Collector to Emitter Voltage Figure 18. Collector to Emitter On-State Voltage vs Gate to Emitter Voltage ©2001 Fairchild Semiconductor Corporation FGH30N6S2 / FGP30N6S2 / FGS30N6S2 Rev. A FGH30N6S2 / FGP30N6S2 / FGS30N6S2 Typical Performance Curves (Continued) ZθJC , NORMALIZED THERMAL RESPONSE 100 0.50 0.20 0.10 10-1 0.05 0.02 0.01 SINGLE PULSE 10-2 10-5 10-4 10-3 10-2 10-1 100 101 PD t2 DUTY FACTOR, D = t1 / t2 PEAK TJ = (PD X ZθJC X RθJC) + TC t1 t1 , RECTANGULAR PULSE DURATION (s) Figure 19. IGBT Normalized Transient Thermal Impedance, Junction to Case Test Circuit and Waveforms FGP30N6S2D DIODE TA4949390 90% VGE L = 200mH 10% EON2 EOFF VCE RG = 10Ω 90% + FGP30N6S2 VDD = 390V ICE 10% td(OFF)I tfI trI td(ON)I Figure 20. Inductive Switching Test Circuit Figure 21. Switching Test Waveforms ©2001 Fairchild Semiconductor Corporation FGH30N6S2 / FGP30N6S2 / FGS30N6S2 Rev. A FGH30N6S2 / FGP30N6S2 / FGS30N6S2 Handling Precautions for IGBTs Insulated Gate Bipolar Transistors are susceptible to gate-insulation damage by the electrostatic discharge of energy through the devices. When handling these devices, care should be exercised to assure that the static charge built in the handler’s body capacitance is not discharged through the device. With proper handling and application procedures, however, IGBTs are currently being extensively used in production by numerous equipment manufacturers in military, industrial and consumer applications, with virtually no damage problems due to electrostatic discharge. IGBTs can be handled safely if the following basic precautions are taken: 1. Prior to assembly into a circuit, all leads should be kept shorted together either by the use of metal shorting springs or by the insertion into conductive material such as “ECCOSORBD™ LD26” or equivalent. 2. When devices are removed by hand from their carriers, the hand being used should be grounded by any suitable means - for example, with a metallic wristband. 3. Tips of soldering irons should be grounded. 4. Devices should never be inserted into or removed from circuits with power on. 5. Gate Voltage Rating - Never exceed the gatevoltage rating of VGEM. Exceeding the rated VGE can result in permanent damage to the oxide layer in the gate region. 6. Gate Termination - The gates of these devices are essentially capacitors. Circuits that leave the gate open-circuited or floating should be avoided. These conditions can result in turn-on of the device due to voltage buildup on the input capacitor due to leakage currents or pickup. 7. Gate Protection - These devices do not have an internal monolithic Zener diode from gate to emitter. If gate protection is required an external Zener is recommended. Operating Frequency Information Operating frequency information for a typical device (Figure 3) is presented as a guide for estimating device performance for a specific application. Other typical frequency vs collector current (ICE) plots are possible using the information shown for a typical unit in Figures 5, 6, 7, 8, 9 and 11. The operating frequency plot (Figure 3) of a typical device shows fMAX1 or fMAX2; whichever is smaller at each point. The information is based on measurements of a typical device and is bounded by the maximum rated junction temperature. fMAX1 is defined by fMAX1 = 0.05/(td(OFF)I+ td(ON)I). Deadtime (the denominator) has been arbitrarily held to 10% of the on-state time for a 50% duty factor. Other definitions are possible. td(OFF)I and td(ON)I are defined in Figure 21. Device turn-off delay can establish an additional frequency limiting condition for an application other than TJM . td(OFF)I is important when controlling output ripple under a lightly loaded condition. fMAX2 is defined by fMAX2 = (PD - PC)/(EOFF + EON2). The allowable dissipation (PD) is defined by PD = (TJM - TC)/RθJC. The sum of device switching and conduction losses must not exceed PD. A 50% duty factor was used (Figure 3) and the conduction losses (PC) are approximated by PC = (VCE x ICE)/2. EON2 and EOFF are defined in the switching waveforms shown in Figure 21. EON2 is the integral of the instantaneous power loss (ICE x VCE) during turn-on and EOFF is the integral of the instantaneous power loss (ICE x VCE) during turn-off. All tail losses are included in the calculation for EOFF; i.e., the collector current equals zero (ICE = 0) ECCOSORBD is a Trademark of Emerson and Cumming, Inc. ©2001 Fairchild Semiconductor Corporation FGH30N6S2 / FGP30N6S2 / FGS30N6S2 Rev. A FGH30N6S2 / FGP30N6S2 / FGS30N6S2 TO-247 3 LEAD JEDEC STYLE TO-247 PLASTIC PACKAGE E A ØS Q ØR D TERM. 4 ØP INCHES SYMBOL A b b1 b2 c D MIN 0.180 0.046 0.060 0.095 0.020 0.800 0.605 MAX 0.190 0.051 0.070 0.105 0.026 0.820 0.625 MILLIMETERS MIN 4.58 1.17 1.53 2.42 0.51 20.32 15.37 MAX 4.82 1.29 1.77 2.66 0.66 20.82 15.87 NOTES 2, 3 1, 2 1, 2 1, 2, 3 4 4 5 1 - L1 L b1 b2 c b 1 2 3 J1 3 2 1 E e e1 J1 L L1 ØP Q ØR ØS 0.219 TYP 0.438 BSC 0.090 0.620 0.145 0.138 0.210 0.195 0.260 0.105 0.640 0.155 0.144 0.220 0.205 0.270 5.56 TYP 11.12 BSC 2.29 15.75 3.69 3.51 5.34 4.96 6.61 2.66 16.25 3.93 3.65 5.58 5.20 6.85 e e1 BACK VIEW NOTES: 1. Lead dimension and finish uncontrolled in L1. 2. Lead dimension (without solder). 3. Add typically 0.002 inches (0.05mm) for solder coating. 4. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D. 5. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D. 6. Controlling dimension: Inch. 7. Revision 1 dated 1-93. ©2001 Fairchild Semiconductor Corporation FGH30N6S2 / FGP30N6S2 / FGS30N6S2 Rev. A FGH30N6S2 / FGP30N6S2 / FGS30N6S2 TO-263AB SURFACE MOUNT JEDEC TO-263AB PLASTIC PACKAGE INCHES MILLIMETERS NOTE SYMBOL MIN MAX MIN MAX S A 0.170 0.180 4.32 4.57 0.048 0.052 1.22 1.32 4, 5 A1 b 0.030 0.034 0.77 0.86 4, 5 b1 0.045 0.055 1.15 1.39 4, 5 0.310 7.88 2 b2 c 0.018 0.022 0.46 0.55 4, 5 D 0.405 0.425 10.29 10.79 E 0.395 0.405 10.04 10.28 e 0.100 TYP 2.54 TYP 7 e1 0.200 BSC 5.08 BSC 7 0.045 0.055 1.15 1.39 H1 J1 0.095 0.105 2.42 2.66 L 0.175 0.195 4.45 4.95 L1 0.090 0.110 2.29 2.79 4, 6 L2 0.050 0.070 1.27 1.77 3 0.315 8.01 2 L3 NOTES: 1. These dimensions are within allowable dimensions of Rev. C of JEDEC TO-263AB outline dated 2-92. 2. L3 and b2 dimensions established a minimum mounting surface for terminal 4. 3. Solder finish uncontrolled in this area. 4. Dimension (without solder). 5. Add typically 0.002 inches (0.05mm) for solder plating. 6. L1 is the terminal length for soldering. 7. Position of lead to be measured 0.120 inches (3.05mm) from bottom of dimension D. 8. Controlling dimension: Inch. 9. Revision 10 dated 5-99. E H1 A A1 TERM. 4 D L2 L1 1 3 L b e e1 TERM. 4 b1 J1 0.450 (11.43) c L3 b2 0.350 (8.89) 0.700 (17.78) 3 1 0.080 TYP (2.03) 0.062 TYP (1.58) 0.150 (3.81) MINIMUM PAD SIZE RECOMMENDED FOR SURFACE-MOUNTED APPLICATIONS TO-263AB 24mm TAPE REEL 1.5mm DIA. HOLE 4.0mm USER DIRECTION OF FEED 2.0mm 1.75mm C L 24mm 16mm COVER TAPE 40mm MIN. ACCESS HOLE 30.4mm 13mm 330mm 100mm GENERAL INFORMATION 1. 800 PIECES PER REEL. 2. ORDER IN MULTIPLES OF FULL REELS ONLY. 3. MEETS EIA-481 REVISION "A" SPECIFICATIONS. 24.4mm ©2001 Fairchild Semiconductor Corporation FGH30N6S2 / FGP30N6S2 / FGS30N6S2 Rev. A FGH30N6S2 / FGP30N6S2 / FGS30N6S2 TO-220AB 3 LEAD JEDEC TO-220AB PLASTIC PACKAGE A ØP Q H1 D E1 45o D1 TERM. 4 E A1 INCHES SYMBOL A A1 b b1 c D D1 E MIN 0.170 0.048 0.030 0.045 0.014 0.590 0.395 MAX 0.180 0.052 0.034 0.055 0.019 0.610 0.160 0.410 0.030 0.100 TYP 0.200 BSC 0.235 0.100 0.530 0.130 0.149 0.102 0.255 0.110 0.550 0.150 0.153 0.112 MILLIMETERS MIN 4.32 1.22 0.77 1.15 0.36 14.99 10.04 MAX 4.57 1.32 0.86 1.39 0.48 15.49 4.06 10.41 0.76 2.54 TYP 5.08 BSC 5.97 2.54 13.47 3.31 3.79 2.60 6.47 2.79 13.97 3.81 3.88 2.84 NOTES 3, 4 2, 3 2, 3, 4 5 5 6 2 - L1 b1 b c L 60o 1 2 3 E1 e e1 J1 e e1 H1 J1 L L1 ØP Q NOTES: 1. These dimensions are within allowable dimensions of Rev. J of JEDEC TO220AB outline dated 3-24-87. 2. Lead dimension and finish uncontrolled in L1. 3. Lead dimension (without solder). 4. Add typically 0.002 inches (0.05mm) for solder coating. 5. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D. 6. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D. 7. Controlling dimension: Inch. 8. Revision 2 dated 7-97. ©2001 Fairchild Semiconductor Corporation FGH30N6S2 / FGP30N6S2 / FGS30N6S2 Rev. A TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOS™ Ensigna™ FACT™ FACT Quiet Series™ DISCLAIMER FAST® FASTr™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench® QFET™ QS™ QT Optpelectronics™ Quiet Series™ SILENT SWITCHER® SMART START™ STAR*POWER™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ TruTranslation™ UHC™ UltraFET® VCX™ STAR*POWER is used under license FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design First Production Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Preliminary No Identification Needed Full Production Obsolete Not In Production ©2001 Fairchild Semiconductor Corporation Rev. H3