FM24C03UEM8X

FM24C02U/03U – 2K-Bit Standard 2-Wire Bus Interface Serial EEPROM General Description Features The FM24C02U/03U devices are 2048 bits of CMOS non-volatile electrically erasable memory. These devices conform to all specifications in the Standard IIC 2-wire protocol. They are designed to minimize device pin count and simplify PC board layout requirements. ■ Extended operating voltage 2.7V – 5.5V ■ 400 KHz clock frequency (F) at 2.7V - 5.5V ■ 200µA active current typical 10µA standby current typical 1µA standby current typical (L) 0.1µA standby current typical (LZ) The upper half (upper 1Kbit) of the memory of the FM24C03U can be write protected by connecting the WP pin to VCC. This section of memory then becomes unalterable unless WP is switched to VSS. ■ IIC compatible interface – Provides bi-directional data transfer protocol ■ Sixteen byte page write mode – Minimizes total write time per byte This communications protocol uses CLOCK (SCL) and DATA I/O (SDA) lines to synchronously clock data between the master (for example a microprocessor) and the slave EEPROM device(s). The Standard IIC protocol allows for a maximum of 16K of EEPROM memory which is supported by the Fairchild family in 2K, 4K, 8K, and 16K devices, allowing the user to configure the memory as the application requires with any combination of EEPROMs. In order to implement higher EEPROM memory densities on the IIC bus, the Extended IIC protocol must be used. (Refer to the FM24C32 or FM24C65 datasheets for more information.) ■ Self timed write cycle Typical write cycle time of 6ms ■ Hardware Write Protect for upper half (FM24C03U only) ■ Endurance: 1,000,000 data changes ■ Data retention greater than 40 years ■ Packages available: 8-pin DIP, 8-pin SO, and 8-pin TSSOP ■ Available in three temperature ranges - Commercial: 0° to +70°C - Extended (E): -40° to +85C - Automotive (V): -40° to +125°C Fairchild EEPROMs are designed and tested for applications requiring high endurance, high reliability and low power consumption. Block Diagram VCC VSS WP H.V. GENERATION TIMING &CONTROL START STOP LOGIC SDA CONTROL LOGIC SLAVE ADDRESS REGISTER & COMPARATOR SCL XDEC A2 A1 A0 E2PROM ARRAY WORD ADDRESS COUNTER R/W YDEC CK DATA REGISTER DIN © 2002 Fairchild Semiconductor International FM24C02U/03U Rev. A.3 1 DOUT www.fairchildsemi.com FM24C02U/03U – 2K-Bit Standard 2-Wire Bus Interface Serial EEPROM September 2002 FM24C02U/03U – 2K-Bit Standard 2-Wire Bus Interface Serial EEPROM Connection Diagrams Dual-in-Line Package (N), SO Package (M8) and TSSOP Package (MT8) A0 1 A1 2 8 VCC 7 NC 24C02 A2 3 6 SCL VSS 4 5 SDA See Package Number N08E, M08A and MTC08 Pin Names A0,A1,A2 Device Address Inputs VSS Ground SDA Serial Data I/O SCL Serial Clock Input NC No Connection VCC Power Supply Dual-in-Line Package (N), SO Package (M8) and TSSOP Package (MT8) A0 1 A1 2 8 VCC 7 WP 24C03 A2 3 6 SCL VSS 4 5 SDA See Package Number N08E, M08A and MTC08 Pin Names A0,A1,A2 Device Address Inputs VSS Ground SDA Serial Data I/O SCL Serial Clock input WP Write Protect VCC Power Supply 2 FM24C02U/03U Rev. A.3 www.fairchildsemi.com FM 24 C XX U F LZ E XXX Letter Description N M8 MT8 8-pin DIP 8-pin SOIC 8-pin TSSOP Temp. Range Blank V E 0 to 70°C -40 to +125°C -40 to +85°C Voltage Operating Range Blank L LZ 4.5V to 5.5V 2.7V to 5.5V 2.7V to 5.5V and