FSQ500L_09

FSQ500L — Compact, Green Mode, Fairchild Power Switch (FPS™) February 2009 FSQ500L Compact, Green Mode, Fairchild Power Switch (FPS™) Features Single Chip 700V SenseFET Power Switch Precision Fixed Operating Frequency: 130kHz No-load consumption 250mW at 265VAC with Burst Mode and Down to 60mW with External Bias Internal Startup Switch Soft-Start Time Tuned by External Capacitor Under-Voltage Lockout (UVLO) with Hysteresis Pulse-by-Pulse Current Limit Overload Protection (OLP) and Internal Thermal Shutdown Function (TSD) with Hysteresis Auto-Restart Mode No Need for Auxiliary Bias Winding Description The FSQ500L is specially designed for a replacement of linear power supplies with low cost. This device combines current-mode Pulse Width Modulator (PWM) with a senseFET. The integrated PWM controller features include: a fixed oscillator, Under Voltage Lockout (UVLO) protection, Overload Protection (OLP), Leading-Edge Blanking (LEB), an optimized gate turnon/turn-off driver, Thermal Shutdown (TSD) protection with hysteresis, and temperature-compensated precision-current sources for loop compensation. When compared to a linear power supply, the FSQ500L device reduces total size and weight, while increasing efficiency, productivity, and system reliability. This device provides a basic platform for cost-effective flyback converters. Applications Cost-Effective Linear Power Supplies Replacement Charger and Adapter for Mobile Phone, PDA, MP3, and Cordless Phone Maximum Output Power 230Vac ± 15% Adapter 2.5W (3) (2) (1) 85-265VAC Adapter 2.0W (3) Related Application Notes AN-4137, AN-4141, AN-4147,AN-6075 (Flyback) AN-4138 (Charger) Open (4) Frame 3.0W Open (4) Frame 2.5W Notes: 1. The junction temperature can limit the maximum output power. 2. 230VAC or 100/115VAC with doubler. 3. Typical continuous power in a non-ventilated enclosed adapter measured at 50°C ambient. 4. Maximum practical continuous power in an open frame design at 50°C ambient. Ordering Information Part Number FSQ500L Operating Temperature Range -40°C to +85°C Eco Status RoHS Package 4-Lead, Small Outline Package (SOT223-4L) Packing Method Tape & Reel For Fairchild’s definition of “green” Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. © 2008 Fairchild Semiconductor Corporation FSQ500L • Rev. 1.0.1 www.fairchildsemi.com FSQ500L — Compact, Green Mode, Fairchild Power Switch (FPS™) Application Circuit Diagram AC IN DC OUT D PWM VFB VCC GND Figure 1. Typical Application Circuit Internal Block Diagram Figure 2. Internal Block Diagram © 2008 Fairchild Semiconductor Corporation FSQ500L • Rev. 1.0.1 www.fairchildsemi.com 2 FSQ500L — Compact, Green Mode, Fairchild Power Switch (FPS™) Pin Assignments GND FSQ500L D VCC VFB Figure 3. Package / Pin Diagram Pin Definitions Pin # 1 Name GND Description This pin is the control ground and the senseFET source. High-voltage power senseFET drain connection. In addition, at startup, the internal high-voltage current source supplies internal bias and charges the external capacitor connected to the VCC pin. Once VCC reaches 6.0V, all internal blocks are activated. The internal high-voltage current source is alive until VCC reaches 6.5V. After that, the internal high voltage current source turns on and off irregularly to maintain VCC at 6.5V. This pin is connected to a storage capacitor. A high-voltage regulator connected between pin 2 (D) and this pin provides the supply voltage to the FSQ500L at startup and when switching during normal operation. The FSQ500L eliminates the need for auxiliary bias winding and associated external components. This pin is internally connected to the non-inverting input of the PWM comparator. The collector of an opto-coupler is typically tied to this pin. For stable operation, a capacitor should be placed between this pin and GND. If the voltage of this pin reaches 4.5V, the overload protection triggers, which shuts down the FPS. 2 D 3 VCC 4 VFB © 2008 Fairchild Semiconductor Corporation FSQ500L • Rev. 1.0.1 www.fairchildsemi.com 3 FSQ500L — Compact, Green Mode, Fairchild Power Switch (FPS™) Absolute Maximum Ratings The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table defines the conditions for actual device operation. Symbol VDS VCC VFB PD IDM TJ TSTG Parameter Drain Pin Voltage Supply Voltage Feedback Voltage Range Total Power Dissipation Drain Current Pulsed (6) (5) Min. 700 Max. 10 Unit V V V W A °C °C -0.3 VCC 0.78 0.41 Operating Junction Temperature Storage Temperature -40 -55 Internally Limited +150 Notes: 5. LDMOS available drain voltage is -0.3V ~ 700V. 6. Repetitive rating: pulse width is limited by maximum junction temperature. Thermal Impedance Symbol Parameter (7) Value +160 Unit °C/W θJA Junction-to-Ambient Thermal Resistance Note: 7. Free-standing with no heat sink; minimum land pattern. © 2008 Fairchild Semiconductor Corporation FSQ500L • Rev. 1.0.1 www.fairchildsemi.com 4 FSQ500L — Compact, Green Mode, Fairchild Power Switch (FPS™) Electrical Characteristics TJ = 25°C unless otherwise specified. Symbol SenseFET Section BVDSS IDSS RDS(ON) CISS COSS tr tf fS ΔfS IFB(Burst) IFB(Normal) DMAX DMIN VSTART VSTOP VDLY_EN Parameter Drain-Source Breakdown Voltage Zero-Gate-Voltage Drain Current Drain-Source On-State Resistance Input Capacitance Rise Time Fall Time (8) (8) (8) Test Conditions VCC = 6.5V, VFB = 0V, ID = 150μA VCC = 6.5V, VFB = 0V, VDS = 560V TJ = 25°C, ID = 25mA TJ = 100°C, ID = 25mA VGS = 6.5V VDS = 40V, fS = 1MHz VDS = 350V, ID = 25mA VDS = 350V, lD = 25mA VCC = 6.5V, VFB = 1.0V (8) Min. 700 Typ. Max. Unit V 150 25 35 42 25 100 50 29 41 μA Ω Ω pF pF ns ns 140 ±7 122 250 66 0 6.5 5.5 7.0 kHz % μA μA % % V V V Output Capacitance (8) Control Section Switching Frequency Switching Frequency Variation Feedback Source Current Maximum Duty Ratio Minimum Duty Ratio UVLO Threshold Voltage Shutdown Delay Current Enable Voltage 120 98 200 54 5.5 4.5 6.0 130 ±5 110 225 60 6.0 5.0 6.5 -25°C < TJ < 125°C VCC = 6.5V, VFB = 0V VCC = 6.5V VCC = 6.5V, VFB = 4.0V VCC = 6.5V, VFB = 0V VFB = 0V, VCC Sweep After Turn-on, VFB = 0V, VCC Sweep VFB = VSD, VCC Sweep from 6V Burst-Mode Section VBURH VBURL HYS Protection Section ILIM VSD IDELAY tLEB tCLD TDS HYS Peak Current Limit Shutdown Feedback Voltage Shutdown Delay Current Leading Edge Blanking Time Current Limit Delay Time (8) (8) 0.75 Burst Mode Voltage VCC = 6.5V, VFB Sweep 0.70 30 di/dt = 150mA/µs VCC = 6.5V, VFB Sweep VCC = 6.5V, VFB = 4.0V 245 4.1 4 0.80 0.75 50 280 4.5 5 250 100 0.85 0.80 80 315 4.9 6 V V mV mA V μA ns ns Thermal Shutdown Temperature (8) 130 140 80 150 °C °C Total Device Section IOP-BURST Operating Supply Current (Control Part Only) IOP-FB ICH VCCREG VCCREG_ TSD VCC = 6.5V, VFB = 0V VCC = 6.5V, VFB = 4V VCC = VFB = 0V, VDS = 40V VDS = 40V, VFB = 0V 360 640 3.3 6.0 5.2 430 760 6.5 5.7 500 880 7.0 6.2 μA μA mA V V Startup Charging Current Supply Shunt Regulator Supply Shunt Regulator During (8) TSD Note: 8. These parameters, although guaranteed, are not 100% tested in production. © 2008 Fairchild Semiconductor Corporation FSQ500L • Rev. 1.0.1 www.fairchildsemi.com 5 FSQ500L — Compact, Green Mode, Fairchild Power Switch (FPS™) Typical Performance Characteristics These characteristic graphs are measured at TA = 25°C. Operating Supply Current (IOP) vs Temperature 490 470 450 430 410 390 370 -40 -25 -10 5 20 35 50 65 80 95 110 125 135 140 Switching Frequency (fS) vs Temperature fS (KHZ) IOP (μA) 130 125 120 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature (℃ ) Temperature (℃ ) Figure 4. Operating Supply Current (IOP_Burst) vs. Temperature Figure 5. Switching Frequency (fS) vs. Temperature UVLO Threshold Voltage (VSTART) vs Temperature 6.5 6.3 5.5 5.3 UVLO Threshold Voltage (VSTOP) vs Temperature VSTART (V) VSTOP (V) -40 -25 -10 5 20 35 50 65 80 95 110 125 6.1 5.9 5.7 5.5 5.1 4.9 4.7 4.5 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature (℃ ) Temperature (℃ ) Figure 6. UVLO Threshold Voltage (VSTART) vs. Temperature Figure 7. UVLO Threshold Voltage (VSTOP) vs. Temperature Burst Mode Voltage (VBURH) vs Temperature 850 830 800 780 Burst Mode Voltage (VBURL) vs Temperature VBURH (mV) VBURL (mV) 810 790 770 750 -40 -25 -10 5 20 35 50 65 80 95 110 125 760 740 720 700 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature (℃ ) Temperature (℃ ) Figure 8. Burst-Mode Voltage (VBURH) vs. Temperature Figure 9. Burst-Mode Voltage (VBURL) vs. Temperature © 2008 Fairchild Semiconductor Corporation FSQ500L • Rev. 1.0.1 www.fairchildsemi.com 6 FSQ500L — Compact, Green Mode, Fairchild Power Switch (FPS™) Typical Performance Characteristics (Continued) These characteristic graphs are measured at TA = 25°C. Maximum Duty Ratio (DMAX) vs Temperature 64.0 63.0 62.0 5.0 4.8 4.6 4.4 4.2 4.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 Shutdown Feedback Voltage (VSD) vs Temperature DMAx (%) 60.0 59.0 58.0 57.0 56.0 VSD (V) 61.0 -25 -10 5 20 35 50 65 80 95 110 125 Temperature (℃ ) Temperature (℃ ) Figure 10. Maximum Duty Ratio (DMAX) vs. Temperature Figure 11. Shutdown Feedback Voltage (VSD) vs. Temperature Peak Current Limit (ILIM ) vs Temperature 310.0 300.0 290.0 5.5 5.3 Shutdown Delay Current (IDELAY) vs Temperature IDELAY (μA) -40 -25 -10 5 20 35 50 65 80 95 110 125 ILIM (mA) 280.0 270.0 260.0 250.0 240.0 5.1 4.9 4.7 4.5 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature (℃ ) Temperature (℃ ) Figure 12. Peak Current Limit (ILIM) vs. Temperature Figure 13. Shutdown Delay Current (IDELAY) vs. Temperature Supply Shunt Regulator (VCCREG) vs Temperature 7.0 6.8 VCCRGE (V) 6.6 6.4 6.2 6.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature (℃ ) Figure 14. Supply Shunt Regulator (VCCREG) vs. Temperature © 2008 Fairchild Semiconductor Corporation FSQ500L • Rev. 1.0.1 www.fairchildsemi.com 7 FSQ500L — Compact, Green Mode, Fairchild Power Switch (FPS™) Functional Description 1. Startup and VCC Regulation: At startup, an internal high-voltage current source supplies the internal bias and charges the external capacitor (CA) connected to the VCC pin, as illustrated in Figure 15. An internal highvoltage regulator (HV/REG) located between the D and VCC pins regulates the VCC to be 6.5V and supplies operating current. Therefore, FSQ500L needs no auxiliary bias winding. VCC VCC IFB OSC IDELAY VO FOD817A VFB CB 2 SenseFET D1 D2 + VFB* 8R Gate driver R KA431 - Transformer D VCC CA VREF 6.5V VSD OLP Rsense ICH HV/REG ISTART UVLO 2 Figure 16. Pulse Width Modulation (PWM) Circuit 3 Figure 15. Startup Block 2. Feedback Control: FSQ500L employs current mode control, as shown in Figure 16. An opto-coupler (such as the FOD817A) and shunt regulator (such as the KA431) are typically used to implement the feedback network. Comparing the feedback voltage with the voltage across the Rsense resistor makes it possible to control the switching duty cycle. When the reference pin voltage of the regulator exceeds the internal reference voltage of 2.5V, the opto-coupler LED current increases, pulling down the feedback voltage and reducing the duty cycle. This typically happens when the line input voltage increases or the output load current decreases. 2.1 Pulse-by-Pulse Current Limit: Because current mode control is employed, the peak current through the senseFET is limited by the non-inverting input of PWM comparator (VFB*), as shown in Figure 16. Assuming that 225µA current source flows only through the internal resistor (8R + R = 12kΩ), the cathode voltage of diode D2 is about 2.7V. Since D1 is blocked when the feedback voltage (VFB) exceeds 2.7V, the maximum voltage of the cathode of D2 is clamped at this voltage, clamping VFB*. Therefore, the peak value of the current through the senseFET is limited. 2.2 Leading-Edge Blanking (LEB): At the instant the internal senseFET is turned on, a high-current spike occurs through the senseFET, caused by primary-side capacitance and secondary-side rectifier reverse recovery. Excessive voltage across the Rsense resistor would lead to incorrect feedback operation in the current mode PWM control. To counter this effect, the FPS employs a leading-edge blanking (LEB) circuit. This circuit inhibits the PWM comparator for a short time (tLEB = 250ns) after the senseFET turns on. 3. Protection Circuits: The FSQ500L has two selfprotective functions: overload protection (OLP) and thermal shutdown (TSD). While OLP is implemented as auto-restart mode, there is no switching when TSD triggers. Once the overload condition is detected, switching is terminated, the senseFET remains off, and HV/REG turns off. This causes VCC to fall. When VCC falls below the under voltage lockout (UVLO) stop voltage of 5.0V, the protection is reset and the startup circuit charges the VCC capacitor. When VCC reaches the start voltage of 6.0V, the FSQ500L resumes its normal operation. If the fault condition is still not removed, the senseFET and HV/REG remain off and VCC drops to VSTOP again. In this manner, the autorestart can alternately enable and disable the switching of the power senseFET until the fault condition is eliminated, as shown in Figure 17. Because these protection circuits are fully integrated into the IC without external components, reliability is improved without increasing cost. VDS Power on OLP occurs OLP removed VCC 6.5V 6.0V 5.0V t Normal operation Fault situation Normal operation Figure 17. Auto Restart Protection Waveforms © 2008 Fairchild Semiconductor Corporation FSQ500L • Rev. 1.0.1 www.fairchildsemi.com 8 FSQ500L — Compact, Green Mode, Fairchild Power Switch (FPS™) 3.1 Overload Protection (OLP): Overload is defined as the load current exceeding its normal level due to an unexpected abnormal event. In this situation, the protection circuit should trigger to protect the SMPS. However, even when the SMPS is in the normal operation, the overload protection circuit can be triggered during the load transition. To avoid this undesired operation, the overload protection circuit is designed to trigger after a specified time to determine whether the situation is transient or a true overload. Because of the pulse-by-pulse current limit capability, the maximum peak current through the senseFET is limited and, therefore, the maximum input power is restricted with a given input voltage. If the output consumes more than this maximum power, the output voltage (VO) decreases below the set voltage. This reduces the current through the opto-coupler LED, which also reduces the opto-coupler transistor current, thus increasing the feedback voltage (VFB). If VFB exceeds 2.7V, D1 is blocked and the 5µA current source starts to charge CB slowly up to VCC. In this condition, VFB continues increasing until it reaches 4.5V, when the switching operation is terminated, as shown in Figure 18. The delay time for shutdown is the time required to charge CB from 2.7V to 4.5V with 5µA. In general, a 10 ~ 50ms delay time is typical for most applications. This protection is implemented in auto restart mode. VFB 4.5V VDS Power on TSD occurs TSD removed VCC 6.5V 6.0V 5.7V t Normal operation Fault situation Normal operation Figure 19. Over-Temperature Protection (OTP) 4. Soft-Start: The soft-start time is tuned by an external VCC capacitor (CA), which increases PWM comparator non-inverting input voltage together with the senseFET current slowly after it starts up. Before VCC reaches VSTART, CA is charged by the current ICH-ISTART, where ICH and ISTART are described in Figure 15. After VCC reaches VSTART, all internal blocks are activated, so that the current consuming inside IC becomes IOP. Therefore, CA is charged by the current ICH-IOP, which makes the increasing slope of VCC become sluggish. VCC is shifted by 6.0V negatively (it is performed in softstart block in Figure 2), and then VCC -6.0V is an input of one of the input terminals of the PWM comparator. The drain current follows VCC -6.0V instead of the VFB* because of the low-dominant feature of the PWM comparator. The soft-start time can be made long or short by selecting CA, as described in Figure 20. During tS/S, IDELAY is disabled to avoid unwanted OLP. Typically, tS/S is around 4.6ms with 27µF of CA. VCC tS/S VCCREG VSTART VSTOP Overload protection 2.7V T12= CB*(4.5-2.7)/IDELAY 6.5V 6V T1 Figure 18. Overload Protection T2 t 5V 3.2 Thermal Shutdown (TSD): The senseFET and the control IC in one package makes it easy for the control IC to detect an abnormal over temperature of the senseFET. When the temperature exceeds approximately 140°C, the thermal shutdown triggers. When TSD triggers, delay current is disabled, switching operation stops, and VCC through the internal highvoltage current source is set to 5.7V from 6.5V, as shown in Figure 19. Since TSD signal prohibits the senseFET from switching, there is no switching until the junction temperature decreases sufficiently. If the junction temperature is lower than 60°C typically, TSD signal is removed and VCC is set to 6.5V again. While VCC increases from 5.7V to 6.5V, the soft-start function makes the senseFET turn on and off with no voltage and/or current stress. © 2008 Fairchild Semiconductor Corporation FSQ500L • Rev. 1.0.1 t1 t1=CA×6V/(ICH-ISTART) t2 tS/S=CA×0.5V/(ICH-IOP) t Figure 20. Soft-Start Function The peak value of the drain current of the power switching device is progressively increased to establish the correct working conditions for transformers, inductors, and capacitors. The voltage on the output capacitors is progressively increased with the intention of smoothly establishing the required output voltage. It also helps to prevent transformer saturation and reduce stress on the secondary diode during startup. www.fairchildsemi.com 9 FSQ500L — Compact, Green Mode, Fairchild Power Switch (FPS™) 5. Burst Operation: To minimize power dissipation in standby mode, the FPS enters burst-mode operation. During the burst mode operation, IFB(Burst) decreases half of IFB(Normal). As the load decreases, the feedback voltage decreases. As shown in Figure 21, the device automatically enters burst mode when the feedback voltage drops below VBURL (750mV). At this point, switching stops and the output voltages start to drop at a rate dependent on standby current load. This causes the feedback voltage to rise. Once it passes VBURH (800mV), switching resumes. The feedback voltage then falls and the process repeats. Burst mode alternately enables and disables switching of the power senseFET, reducing switching loss in standby mode. Vo Voset VFB 0.80V 0.75V IDS VDS time t1 Switching disabled t2 t3 Switching disabled t4 Figure 21. Burst-Mode Operation © 2008 Fairchild Semiconductor Corporation FSQ500L • Rev. 1.0.1 www.fairchildsemi.com 10 FSQ500L — Compact, Green Mode, Fairchild Power Switch (FPS™) Package Dimensions Figure 22. 4-Lead, Small Outline Package (SOT223-4L) Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2008 Fairchild Semiconductor Corporation FSQ500L • Rev. 1.0.1 www.fairchildsemi.com 11 FSQ500L — Compact, Green Mode, Fairchild Power Switch (FPS™) © 2008 Fairchild Semiconductor Corporation FSQ500L • Rev. 1.0.1 www.fairchildsemi.com 12