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MM74C908N

MM74C908N

  • 厂商:

    FAIRCHILD(仙童半导体)

  • 封装:

  • 描述:

    MM74C908N - Dual CMOS 30-Volt Relay Driver - Fairchild Semiconductor

  • 数据手册
  • 价格&库存
MM74C908N 数据手册
MM74C908 Dual CMOS 30-Volt Relay Driver October 1987 Revised January 1999 MM74C908 Dual CMOS 30-Volt Relay Driver General Description The MM74C908 is a general purpose dual high voltage driver capable of sourcing a minimum of 250 mA at VOUT = VCC − 3V, and TJ = 65°C. The MM74C908 consists of two CMOS NAND gates driving an emitter follower Darlington output to achieve high current drive and high voltage capabilities. In the “OFF” state the outputs can withstand a maximum of −30V across the device. These CMOS drivers are useful in interfacing normal CMOS voltage levels to driving relays, regulators, lamps, etc. Features s Wide supply voltage range: s High noise immunity: s High voltage: −30V s High current: 250 mA 3V to 18V 0.45 VCC (typ.) s Low output “ON” resistance: 8Ω (typ.) Ordering Code: Order Number MM74C908N Package Number N08E Package Description 8-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Connection Diagram Pin Assignments for DIP Top View © 1999 Fairchild Semiconductor Corporation DS005912.prf www.fairchildsemi.com MM74C908 Absolute Maximum Ratings(Note 1) Voltage at any Input Pin Voltage at any Output Pin Operating Temperature Range Operating VCC Range Absolute Maximum VCC ISOURCE Storage Temperature Range (TS) −0.3V to VCC +0.3V 32V −40°C to +85°C 4V to 18V 19V 500 mA +150°C −65°C to +150°C Lead Temperature (TL) (Soldering, 10 seconds) Power Dissipation (PD) 260°C Refer to Maximum Power Dissipation vs Ambient Temperature Graph Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. Except for “Operating Temperature Range” they are not meant to imply that the devices should be operated at these limits. The Electrical Characteristics table provides conditions for actual device operation. DC Electrical Characteristics Min/Max limits apply across temperature range, unless otherwise noted Symbol CMOS TO CMOS VIN(1) VIN(0) IIN(1) IIN(0) ICC Logical “1” Input Voltage Logical “0” Input Voltage Logical “1” Input Current Logical “0” Input Current Supply Current Output “OFF” Voltage CMOS/LPTTL INTERFACE VIN(1) VIN(0) VOUT Logical “1” Input Voltage Logical “0” Input Voltage Output Voltage VCC = 4.75V VCC = 4.75V IOUT = −300 mA, VCC ≥ 5V, TJ = 25°C IOUT = −250 mA, VCC ≥ 5V, TJ = 65°C IOUT = −175 mA, VCC ≥ 5V, TJ = 150°C RON Output Resistance IOUT = −300 mA, VCC ≥ 5V, TJ = 25°C IOUT = −250 mA, VCC ≥ 5V, TJ = 65°C IOUT = −175 mA, VCC ≥ 5V, TJ = 150°C Output Resistance Coefficient θJA Thermal Resistance MM74C908 (Note 2) (Note 2) 100 45 110 55 °C/W °C/W VCC−2.7 VCC−3.0 VCC−3.15 VCC−1.8 VCC−1.9 VCC−2.0 6.0 7.5 10 0.55 9.0 12 18 0.80 VCC − 1.5 0.8 V V V V V Ω Ω Ω %/°C VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 15V, VIN = 15V VCC = 15V, VIN = 0V VCC = 15V, Outputs Open Circuit VIN = VCC, IOUT = −200 µA −1.0 0.005 −0.005 0.05 −30 15 3.5 8.0 1.5 2.0 1.0 V V V V µA µA µA V Parameter Conditions Min Typ Max Units OUTPUT DRIVE Note 2: θJA measured in free air with device soldered into printed circuit board. AC Electrical Characteristics Symbol tpd1 Parameter Propagation Delay to a Logical “1” (Note 3) Conditions Min Typ 150 65 2.0 4.0 5.0 Max 300 120 10 20 Units ns ns µs µs pF VCC = 5V, RL = 50Ω, CL = 50 pF, TA = 25°C VCC = 10V, RL = 50Ω, CL = 50 pF, TA = 25°C tpd0 Propagation Delay to a Logic “0” VCC = 5V, RL = 50Ω, CL = 50 pF, TA = 25°C VCC = 10V, RL = 50Ω, CL = 50 pF, TA = 25°C CIN Input Capacitance (Note 4) Note 3: AC Parameters are guaranteed by DC correlated testing. Note 4: Capacitance is guaranteed by periodic testing. www.fairchildsemi.com 2 MM74C908 Typical Performance Characteristics Maximum Power Dissipation vs Ambient Temperature Typical IOUT vs Typical VOUT Maximum VCC − VOUT vs IOUT Typical IOUT vs Typical VOUT Typical IOUT vs Typical VOUT AC Test Circuit Switching Time Waveforms tr = tf = 20 ns 3 www.fairchildsemi.com MM74C908 Power Considerations Calculating Output “ON” Resistance (RL > 18Ω) The output “ON” resistance, RON, is a function of the junction temperature, TJ, and is given by: RON = 9 (TJ − 25) (0.008) + 9: and TJ is given by: TJ = TA + PDAV θJA,: (2) where TA = ambient temperature, θJA = thermal resistance, and PDAV is the average power dissipated within the device. PDAV consists of normal CMOS power terms (due to leakage currents, internal capacitance, switching, etc.) which are insignificant when compared to the power dissipated in the outputs. Thus, the output power term defines the allowable limits of operation and includes both outputs, A and B. PD is given by: PD = IOA2RON + IOB2 RON, (3) (1) Equations (1), (4), and (6b) can be used in an iterative method to determine the output current, output resistance and junction temperature. where IO is the output current, given by: For example, let VCC = 15V, RLA = 100Ω, RLB = 100Ω, VL = 0V, TA = 25°C, θJA = 110°C/W, Duty CycleA = 50%, Duty CycleB = 75%. Assuming RON = 11Ω, then: (4) VL is the load voltage. The average power dissipation, PDAV, is a function of the duty cycle: PDAV = IOA2RON (Duty CycleA) + IOB2 RON(Duty CycleB) where the duty cycle is the % time in the current source state. Substituting equations (1) and (5) into (2) yields: TJ = TA + θJA [9 (TJ − 25) (0.008) + 9]: (6a) [IOA2 (Duty CycleA) + IOB2 (Duty CycleB)] simplifying: (5) and and RON = 9 (TJ − 25) (0.008) + 9 = 9(52.6 − 25) (0.008) + 9 = 11Ω Applications (See AN-177 for applications) www.fairchildsemi.com 4 MM74C908 Dual CMOS 30-Volt Relay Driver Physical Dimensions inches (millimeters) unless otherwise noted 8-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Package Number N08E LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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