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NDS9958

NDS9958

  • 厂商:

    FAIRCHILD(仙童半导体)

  • 封装:

  • 描述:

    NDS9958 - Dual N & P-Channel Enhancement Mode Field Effect Transistor - Fairchild Semiconductor

  • 数据手册
  • 价格&库存
NDS9958 数据手册
February 1996 NDS9958 Dual N & P-Channel Enhancement Mode Field Effect Transistor General Description These dual N- and P-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes. These devices are particularly suited for low voltage applications such as notebook computer power management, Half bridge motor control, cellular phone, and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed. Features N-Channel 3.5A, 20V, RDS(ON) = 0.1Ω @ VGS = 10V. P-Channel -3.5A , -20V, RDS(ON) = 0.1Ω @ VGS = -10V. High density cell design for extremely low RDS(ON). High power and current handling capability in a widely used surface mount package. Dual (N & P-Channel) MOSFET in surface mount package. _______________________________________________________________________________ 5 4 3 2 1 6 7 8 Absolute Maximum Ratings Symbol VDSS VGSS ID Parameter Drain-Source Voltage Gate-Source Voltage T A = 25°C unless otherwise noted N-Channel 20 ± 20 (Note 1a) (Note 1a) P-Channel -20 ± 20 ± 3.5 ± 2.8 ± 14 2 Units V V A Drain Current - Continuous TA = 25°C - Continuous TA = 70°C - Pulsed TA = 25°C ± 3.5 ± 2.8 ± 14 PD Power Dissipation for Dual Operation Power Dissipation for Single Operation (Note 1a) (Note 1b) (Note 1c) W 1.6 1 0.9 -55 to 150 °C TJ,TSTG Operating and Storage Temperature Range THERMAL CHARACTERISTICS RθJA RθJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1) 78 40 °C/W °C/W © 1997 Fairchild Semiconductor Corporation NDS9958.SAM Electrical Characteristics (TA= 25°C unless otherwise noted) Symbol BVDSS IDSS Parameter Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Conditions VGS = 0 V, ID = 250 µA VGS = 0 V, ID = -250 µA VDS = 16 V, VGS = 0 V TJ = 70°C VDS = -16 V, VGS = 0 V TJ = 70°C IGSSF IGSSR VGS(th) Gate - Body Leakage, Forward Gate - Body Leakage, Reverse Gate Threshold Voltage VGS = 20 V, VDS = 0 V VGS = -20 V, VDS= 0 V VDS = VGS, ID = 250 µA TJ = 125°C VDS = VGS, ID = -250 µA TJ = 125°C RDS(ON) Static Drain-Source On-Resistance VGS = 10 V, ID = 3.5 A TJ = 125°C VGS = -10 V, ID = -3.5 A TJ = 125°C VGS = 6V, ID = 3.0 A VGS = -6 V, ID = -3.0 A VGS = 4.5 V, ID = 1.0 A VGS = -4.5 V, ID = -1.0 A ID(on) On-State Drain Current VGS = 10 V, VDS = 5 V VGS = -10 V, VDS = -5 V VGS = 4.5 V, VDS = 5 V VGS = -4.5 V, VDS = -5 V gFS Forward Transconductance VDS = 15 V, ID = 3.5 A VDS = -15 V, ID = -3.5 A DYNAMIC CHARACTERISTICS Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance N-Channel VDS = 10V, VGS = 0 V, f = 1.0 MHz P-Channel VDS = -10 V, VGS = 0 V, f = 1.0 MHz N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch 525 785 315 500 185 245 pF pF pF N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch 14 -14 3.5 -2.5 7 5 S P-Ch N-Ch P-Ch All All N-Ch 1 0.7 -1 -0.8 1.5 1.1 -2.2 -1.9 0.062 0.085 0.08 0.11 0.073 0.112 0.08 0.165 P-Ch Type N-Ch P-Ch N-Ch Min 20 -20 1 5 -1 -5 100 -100 3 2.2 -3 -2.5 0.1 0.14 0.1 0.16 0.12 0.12 0.15 0.19 A µA µA µA µA nA nA V Typ Max Units V OFF CHARACTERISTICS ON CHARACTERISTICS (Note 2) Ω NDS9958.SAM Electrical Characteristics (TA = 25°C unless otherwise noted) Symbol tD(on) tr tD(off) tf Qg Qgs Qgd Parameter Turn - On Delay Time Turn - On Rise Time Turn - Off Delay Time Turn - Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge N-Channel VDS = 10 V, ID = 3.5 A, VGS = 10 V P-Channel VDS = -10 V, ID = -3.5 A, VGS = -10 V Conditions N-Channel VDD = 10 V, ID = 1 A, VGEN = 10 V, RGEN = 6 Ω P-Channel VDD = -10 V, ID = -1 A, VGEN = -10 V, RGEN = 6 Ω Type N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS VSD trr Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. Min Typ 6 9 12 17 22 26 8 13 17 19 1.2 3 5 9 Max 10 40 25 25 30 30 20 20 30 30 6 6 12 12 1.7 -1.7 Units ns ns ns ns nC nC nC SWITCHING CHARACTERISTICS (Note 2) Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage Reverse Recovery Time VGS = 0 V, IS = 1.7 A VGS = 0 V, IS = -1.7 A N-Ch P-Ch (Note 2) (Note 2) A V ns N-Ch P-Ch N-Ch P-Ch 0.86 -0.9 1.2 -1.2 100 100 VGS = 0V, IF = 3.5 A, dIF / dt = 100 A/µs PD (t ) = R θJ At ) ( T J−TA = R θJ C RθCA t ) + ( T J−TA = I 2 (t ) × RDS(ON ) D TJ Typical RθJA for single device operation using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment: a. 78oC/W when mounted on a 0.5 in2 pad of 2oz cpper. b. 125oC/W when mounted on a 0.02 in2 pad of 2oz cpper. c. 135oC/W when mounted on a 0.003 in2 pad of 2oz cpper. 1a 1b 1c Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%. NDS9958.SAM Typical Electrical Characteristics: N-Channel 18 2 VGS = 10V , DRAIN-SOURCE CURRENT (A) 6.0 5 .0 4 .5 DRAIN-SOURCE ON-RESISTANCE 4 .0 R DS(on) , NORMALIZED 1.8 VGS = 3.5V 4 .0 4 .5 5 .0 12 1.6 1.4 3 .5 6 3 .0 1.2 1 6 .0 10 0 2 4 6 I D , DRAIN CURRENT (A) 8 10 I 2 .5 0 0 1 2 V DS , DRAIN-SOURCE VOLTAGE (V) 3 D 0.8 Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Gate Voltage and Drain Current. 1.6 2 DRAIN-SOURCE ON-RESISTANCE I D = 3.5A 1.4 R DS(on) , NORMALIZED VGS = 10 V DRAIN-SOURCE ON-RESISTANCE R DS(ON) , NORMALIZED V G S = 10V TJ = 125°C 1.5 1.2 1 25°C 1 0.8 -55°C 0.6 -50 -25 0 25 50 75 100 T , JUNCTION TEMPERATURE (°C) J 125 150 0.5 0 3 I D 6 9 12 15 , DRAIN CURRENT (A) Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Drain Current and Temperature. 10 V DS = 10V 8 ID , DRAIN CURRENT (A) TJ = -55°C 1.2 25 GATE-SOURCE THRESHOLD VOLTAGE 125 Vth , NORMALIZED 1.1 V DS = V GS I D = 250µA 1 6 0.9 4 0.8 2 0.7 0 1 1.5 2 2.5 3 V GS , GATE TO SOURCE VOLTAGE (V) 3.5 4 0.6 -50 -25 0 25 50 75 100 125 150 T , JUNCTION TEMPERATURE (°C) J Figure 5. Transfer Characteristics. Figure 6. Gate Threshold Variation with Temperature. NDS9958.SAM Typical Electrical Characteristics: N-Channel (continued) DRAIN-SOURCE BREAKDOWN VOLTAGE 1.15 I D = 250µA 10 5 IS , REVERSE DRAIN CURRENT (A) 2 1 0.5 V GS = 0 V BV DSS , NORMALIZED 1.1 1.05 TJ = 125°C 25°C 1 0.2 0.1 0.05 0.02 0.01 0.2 0.4 0.6 0.8 - 55°C 0.95 0.9 -50 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (°C) 125 150 1 1.2 VSD , BODY DIODE FORWARD VOLTAGE (V) Figure 7. Breakdown Voltage Variation with Temperature. Figure 8. Body Diode Forward Voltage Variation with Current and Temperature 2000 10 I D = 3.5A VGS , GATE-SOURCE VOLTAGE (V) 1000 CAPACITANCE (pF) 8 VDS = 10V 500 C i ss 6 300 200 4 f = 1 MHz V GS = 0V C o ss C r ss 1 2 5 10 20 30 2 100 0.1 0.2 0.5 0 0 4 V DS , DRAIN TO SOURCE VOLTAGE (V) 8 Q g , GATE CHARGE (nC) 12 16 Figure 9. Capacitance Characteristics. Figure 10. Gate Charge Characteristics. 12 , TRANSCONDUCTANCE (SIEMENS) 10 VDS =10V T J = -55°C 8 2 5°C 6 1 25°C 4 2 g 0 0 FS 2 4 6 8 10 I D , DRAIN CURRENT (A) Figure 11. Transconductance Variation with Drain Current and Temperature. NDS9958.SAM Typical Electrical Characteristics: P-Channel -20 3.5 V I D , DRAIN-SOURCE CURRENT (A) -15 GS = - 10V -8.0 DRAIN-SOURCE ON-RESISTANCE - 7.0 , NORMALIZED VGS = - 4.0V - 4.5 3 - 5.0 - 5.5 - 6.0 - 5.5 2.5 - 6.0 2 -10 DS(on) - 5.0 - 4.5 1.5 1 - 7.0 - 8.0 - 10 -5 - 4.0 0 R -5 0 -1 -2 -3 VDS , DRAIN-SOURCE VOLTAGE (V) -4 0.5 0 -4 -8 -12 I D , DRAIN CURRENT (A) -16 -20 Figure 12. On-Region Characteristics. Figure 13. On-Resistance Variation with Gate Voltage and Drain Current. DRAIN-SOURCE ON-RESISTANCE (OHMS) 1.5 DRAIN-SOURCE ON-RESISTANCE 2 1.4 1.3 I D = -3.5A V GS = -10V , NORMALIZED RDS(ON) , NORMALIZED V G S = - 10V T J = 125°C 1.2 1.1 1 0.9 0.8 0.7 -50 -25 0 25 50 75 100 T J, JUNCTION TEMPERATURE (°C) 125 150 1.5 DS(on) 2 5°C 1 - 55°C R 0.5 0 -5 -10 I D , DRAIN CURRENT (A) -15 -20 Figure 14. On-Resistance Variation with Temperature. Figure 15. On-Resistance Variation with Drain Current and Temperature. -10 1.1 V DS = -10V -8 ID , DRAIN CURRENT (A) TJ = -55°C 25°C 125°C GATE-SOURCE THRESHOLD VOLTAGE (V) 1.05 VDS = VGS I D = -250µA V th , NORMALIZED 1 -6 0.95 -4 0.9 -2 0.85 0 -1 -2 V GS -3 -4 -5 , GATE TO SOURCE VOLTAGE (V) -6 0.8 -50 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (°C) 125 150 Figure 16. Drain Current Variation with Gate Voltage and Temperature. Figure 17. Gate Threshold Variation with Temperature. NDS9958.SAM Typical Electrical Characteristics: P-Channel (continued) 1.1 DRAIN-SOURCE BREAKDOWN VOLTAGE (V) 10 I D = -250µA -I S , REVERSE DRAIN CURRENT (A) 5 V GS = 0 V T J = 125°C 25°C - 55°C BV DSS , NORMALIZED 1 0.5 1.05 0.1 1 0.01 0.95 -50 -25 0 T J 25 50 75 100 , JUNCTION TEMPERATURE (°C) 125 150 0.001 0.3 0.6 -V SD 0.9 1.2 1.5 1.8 , BODY DIODE FORWARD VOLTAGE (V) Figure 18. Breakdown Voltage Variation with Temperature. Figure 19. Body Diode Forward Voltage Variation with Current and Temperature 1500 1000 -10 , GATE-SOURCE VOLTAGE (V) C i ss C o ss I DS = -3.5A -8 V DS = -5V -10V -15V CAPACITANCE (pF) 500 -6 300 200 C r ss f = 1 MHz V GS = 0V -4 100 0.1 V 0.5 1 2 5 10 20 0 0.2 -V DS GS -2 0 5 10 Q g , GATE CHARGE (nC) 15 20 , DRAIN TO SOURCE VOLTAGE (V) Figure 20. Capacitance Characteristics. Figure 21. Gate Charge Characteristics 8 , TRANSCONDUCTANCE (SIEMENS) V DS = -15V 6 T J = -55°C 2 5°C 1 25°C 4 2 g FS 0 0 -3 I D -6 -9 , DRAIN CURRENT (A) -12 -15 Figure 22. Transconductance Variation with Drain Current and Temperature. NDS9958.SAM Typical Electrical Characteristic: N & P-Channel (continued) 20 10 RD S(O LIM N) IT 10 10 1m ms s s ±I D , DRAIN CURRENT (A) 3 1 0.3 0.1 0.03 0.01 0.1 0m 1s 10 DC V GS = s ±20V SINGLE PULSE T A = 25°C 0.2 0.5 1 2 5 10 20 30 ± V DS , DRAIN-SOURCE VOLTAGE (V) Figure 23. Maximum Safe Operating Area. 1 0 .5 r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE D = 0 .5 0 .2 0 .1 0 .05 0 .02 0 .01 S ingle Pulse P(pk) 0 .2 0 .1 0 .0 5 0 .0 2 0 .0 1 0 .0 0 5 0 .0 0 2 0 .0 0 1 0 .0001 R JA ( t) = r(t) * R JA θ θ R JA = See Note 1c θ t1 TJ - T A t2 = P * R JA (t) θ D uty Cycle, D = t 1 / t 2 0 .001 0 .0 1 0 .1 1 10 100 300 t 1 , TIME (sec) Figure 24. Transient Thermal Response Curve. Note: Thermal characterization performed using the conditions described in note 1c. Transient thermal response will change depending on the circuit board design. VDD V IN D t on t off tr 90% RL V OUT DUT t d(on) t d(off) 90% tf VGS VOUT R GEN 10% 10% 90% G S V IN 10% 50% 50% PULSE WIDTH Figure 25. N or P-Channel Switching Test Circuit Figure 26. N or P-Channel Switching Waveforms NDS9958.SAM SO-8 Tape and Reel Data and Package Dimensions SOIC(8lds) Packaging Configuration: Figure 1.0 Packaging Description: EL ECT ROST AT IC SEN SIT IVE DEVICES DO NO T SHI P OR STO RE N EAR ST RO NG EL ECT ROST AT IC EL ECT RO M AGN ETI C, M AG NET IC O R R ADIO ACT IVE FI ELD S TNR D ATE PT NUMB ER PEEL STREN GTH MIN ___ __ ____ __ ___gms MAX ___ ___ ___ ___ _ gms Antistatic Cover Tape ESD Label SOIC-8 parts are shipped in tape. The carrier tape is made from a dissipative (carbon filled) polycarbonate resin. The cover tape is a multilayer film (Heat Activated Adhesive in nature) primarily composed of polyester film, adhesive layer, sealant, and anti-static sprayed agent. These reeled parts in standard option are shipped with 2,500 units per 13" or 330cm diameter reel. The reels are dark blue in color and is made of polystyrene plastic (antistatic coated). Other option comes in 500 units per 7" or 177cm diameter reel. This and some other options are further described in the Packaging Information table. These full reels are individually barcode labeled and placed inside a standard intermediate box (illustrated in figure 1.0) made of recyclable corrugated brown paper. One box contains two reels maximum. And these boxes are placed inside a barcode labeled shipping box which comes in different sizes depending on the number of parts shipped. Static Dissipative Embossed Carrier Tape F63TNR Label Customized Label F852 NDS 9959 F852 NDS 9959 F852 NDS 9959 F852 NDS 9959 SOIC (8lds) Packaging Information Packaging Option Packaging type Qty per Reel/Tube/Bag Reel Size Box Dimension (mm) Max qty per Box Weight per unit (gm) Weight per Reel (kg) Note/Comments Standard (no flow code) TNR 2,500 13" Dia 343x64x343 5,000 0.0774 0.6060 L86Z Rail/Tube 95 530x130x83 30,000 0.0774 F011 TNR 4,000 13" Dia 343x64x343 8,000 0.0774 0.9696 D84Z TNR 500 7" Dia 184x187x47 1,000 0.0774 0.1182 F852 NDS 9959 Pin 1 SOIC-8 Unit Orientation 343mm x 342mm x 64mm Standard Intermediate box ESD Label F63TNR Label sample LOT: CBVK741B019 FSID: FDS9953A QTY: 2500 SPEC: F63TNLabel F63TN Label ESD Label (F63TNR)3 D/C1: D9842 D/C2: QTY1: QTY2: SPEC REV: CPN: N/F: F SOIC(8lds) Tape Leader and Trailer Configuration: Figure 2.0 Carrier Tape Cover Tape Components Trailer Tape 640mm minimum or 80 empty pockets Leader Tape 1680mm minimum or 210 empty pockets July 1999, Rev. B SO-8 Tape and Reel Data and Package Dimensions, continued SOIC(8lds) Embossed Carrier Tape Configuration: Figure 3.0 T E1 P0 D0 F K0 Wc B0 E2 W Tc A0 P1 D1 User Direction of Feed Dimensions are in millimeter Pkg type SOIC(8lds) (12mm) A0 6.50 +/-0.10 B0 5.30 +/-0.10 W 12.0 +/-0.3 D0 1.55 +/-0.05 D1 1.60 +/-0.10 E1 1.75 +/-0.10 E2 10.25 min F 5.50 +/-0.05 P1 8.0 +/-0.1 P0 4.0 +/-0.1 K0 2.1 +/-0.10 T 0.450 +/0.150 Wc 9.2 +/-0.3 Tc 0.06 +/-0.02 Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481 rotational and lateral movement requirements (see sketches A, B, and C). 20 deg maximum Typical component cavity center line 0.5mm maximum B0 20 deg maximum component rotation 0.5mm maximum Sketch A (Side or Front Sectional View) Component Rotation A0 Sketch B (Top View) Typical component center line Sketch C (Top View) Component lateral movement SOIC(8lds) Reel Configuration: Figure 4.0 Component Rotation W1 Measured at Hub Dim A Max Dim A max Dim N See detail AA 7" Diameter Option B Min Dim C See detail AA W3 Dim D min 13" Diameter Option W2 max Measured at Hub DETAIL AA Dimensions are in inches and millimeters Tape Size 12mm Reel Option 7" Dia Dim A 7.00 177.8 13.00 330 Dim B 0.059 1.5 0.059 1.5 Dim C 512 +0.020/-0.008 13 +0.5/-0.2 512 +0.020/-0.008 13 +0.5/-0.2 Dim D 0.795 20.2 0.795 20.2 Dim N 2.165 55 7.00 178 Dim W1 0.488 +0.078/-0.000 12.4 +2/0 0.488 +0.078/-0.000 12.4 +2/0 Dim W2 0.724 18.4 0.724 18.4 Dim W3 (LSL-USL) 0.469 – 0.606 11.9 – 15.4 0.469 – 0.606 11.9 – 15.4 12mm 13" Dia © 1998 Fairchild Semiconductor Corporation July 1999, Rev. B SO-8 Tape and Reel Data and Package Dimensions, continued SOIC-8 (FS PKG Code S1) 1:1 Scale 1:1 on letter size paper Dimensions shown below are in: inches [millimeters] Part Weight per unit (gram): 0.0774 9 September 1998, Rev. A TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ E2CMOSTM FACT™ FACT Quiet Series™ FAST FASTr™ GTO™ DISCLAIMER HiSeC™ ISOPLANAR™ MICROWIRE™ POP™ PowerTrench  QFET™ QS™ Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ VCX™ FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. E
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