MC9S08SF4

Freescale Semiconductor Data Sheet: Technical Data Document Number: MC9S08SF4 Rev. 2, 4/2009 MC9S08SF4 MC9S08SF4 Series Features • 8-Bit S08 Central Processor Unit (CPU) – Up to 40 MHz CPU at 2.7 V to 5.5 V across temperature range of –40 °C to 125 °C – HC08 instruction set with added BGND instruction – Support for up to 32 interrupt/reset sources • On-Chip Memory – 4 KB flash read/program/erase over full operating voltage and temperature – 128-byte random-access memory (RAM) – Security circuitry to prevent unauthorized access to RAM and flash contents • Power-Saving Modes – Two low power stop modes; reduced power wait mode – Allows clocks to remain enabled to specific peripherals in stop3 mode • Clock Source Options – Internal Clock Source (ICS) — Internal clock source module containing a frequency-locked-loop (FLL) controlled by internal or external reference; precision trimming of internal reference allows 0.2% resolution and 1% deviation over 0–70 °C and voltage, 2% deviation over –40–85 °C and voltage, or 3% deviation over –40–125 °C and voltage; supporting bus frequencies up to 20 MHz • System Protection – Watchdog computer operating properly (COP) reset with option to run from dedicated 1 kHz internal clock source or bus clock – Low-voltage detection with reset or interrupt; selectable trip points – Illegal opcode detection with reset – Illegal address detection with reset – Flash block protection • Development Support – Single-wire background debug interface – Breakpoint capability to allow single breakpoint setting during in-circuit debugging (plus two more breakpoints) – On-chip in-circuit emulator (ICE) debug module containing two comparators and nine trigger modes 20-Pin TSSOP Case 948E 16-Pin TSSOP Case 948F • Peripherals – IPC — Prioritize interrupt sources besides inherent CPU interrupt table; support up to 32 interrupt sources and up to 4-level preemptive interrupt nesting – ADC — 8-channel, 10-bit resolution; 2.5 μs conversion time; automatic compare function; temperature sensor; internal bandgap reference channel; operation in stop; fully functional from 2.7 V to 5.5 V – TPM — One 40 MHz 6-channel and one 40 MHz 1-channel timer/pulse-width modulators (TPM) modules; selectable input capture, output compare, or buffered edge- or center-aligned PWM on each channel – MTIM16 — Two 16-bit modulo timers – PWT — Two 16-bit pulse width timers (PWT); selectable driving clock, positive/negative/period capture – PRACMP — Two programmable reference analog comparators with eight optional inputs for both positive and negative inputs; 32-level internal reference voltages scaled by selectable reference inputs – IIC — Inter-integrated circuit bus module capable of operation up to 100 kbps with maximum bus loading; multi-master operation; programmable slave address; interrupt-driven byte-by-byte data transfer; broadcast mode; 10-bit addressing – KBI — 4-pin keyboard interrupt module with software selectable polarity on edge or edge/level modes – FDS — Shut down output pin upon fault detection; the fault sources can be optional enabled separately; the output pin can be configured as output 1,0 and high impedance when a fault occurs based on module configuration • Input/Output – 18 GPIOs including one input-only pin and one output-only pin – Hysteresis and configurable pullup device on all input pins; schmitt trigger on PWT input pins; configurable slew rate and drive strength on all output pins. • Package Options – 16-pin TSSOP – 20-pin TSSOP This document contains information on a product under development. Freescale reserves the right to change or discontinue this product without notice. © Freescale Semiconductor, Inc., 2009. All rights reserved. Table of Contents 1 2 3 MCU Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . 5 3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.2 Parameter Classification . . . . . . . . . . . . . . . . . . . 5 3.3 Absolute Maximum Ratings. . . . . . . . . . . . . . . . . 5 3.4 Thermal Characteristics. . . . . . . . . . . . . . . . . . . . 6 3.5 ESD Protection and Latch-Up Immunity . . . . . . . 7 3.6 DC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . 8 3.7 Supply Current Characteristics . . . . . . . . . . . . . 14 3.8 ICS Characteristics . . . . . . . . . . . . . . . . . . . . . . 16 3.9 AC Characteristics. . . . . . . . . . . . . . . . . . . . . . . 17 3.9.1 Control Timing . . . . . . . . . . . . . . . . . . . . . 18 3.9.2 Timer/PWM (TPM) Module Timing . . . . . 19 3.10 ADC Characteristics . . . . . . . . . . . . . . . . . . . . . 20 4 5 3.11 PRACMP Characteristics . . . . . . . . . . . . . . . . . .21 3.12 Flash Specifications . . . . . . . . . . . . . . . . . . . . . .22 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . .23 Package Information . . . . . . . . . . . . . . . . . . . . . . . . . .23 5.1 Mechanical Drawings . . . . . . . . . . . . . . . . . . . . .23 Revision History The following revision history table summarizes changes contained in this document. Revision 2 Date 4/30/2009 Initial public release. Description of Changes Related Documentation Reference Manual (MC9S08SF4RM) Contains extensive product information including modes of operation, memory, resets and interrupts, register definition, port pins, CPU, and all module information. MC9S08SF4 Series MCU Data Sheet, Rev. 2 2 Freescale Semiconductor 1 MCU Block Diagram DEBUG MODULE (DBG) INTERRUPT PRIORITY CONTROLLER (IPC) 16-BIT MODULO TIMER (MTIM16-1) PTA1/KBI1/RESET 16-BIT MODULO TIMER HCS08 CORE (MTIM16-2) TCLK PTA2/KBI2/TPM1C0/FDSOUT0 TCLK PTA0/KBI0/TCLK/IRQ The block diagram, Figure 1, shows the structure of the MC9S08SF4 MCU. PORT A PTA3/KBI3/TPM1C1/FDSOUT1 PTA4/TPM1C2/FDSOUT2 PTA5/TPM1C3/FDSOUT3 PTA6/TPM1C4/FDSOUT4 PTA7/TPM1C5/FDSOUT5 4-PIN KEYBOARD CPU BDC INTERRUPT (KBI) 6-CH TIMER/PWM HCS08 SYSTEM CONTROL RESETS AND INTERRUPTS MODES OF OPERATION POWER MANAGEMENT COP WAKEUP IRQ LVD 1-CH TIMER/PWM USER Flash 4096 BYTES USER RAM 128 BYTES MODULE (TPM2) PULSE WIDTH TIMER (PWT1) PULSE WIDTH TIMER (PWT2) ANALOG COMPARATOR (PRACMP1) ANALOG COMPARATOR (PRACMP2) VDD VSS VOLTAGE REGULATOR RESET IRQ FAULT DETECTION & SHUTDOWN (FDS) MODULE (TPM1) KBI[3:0] TPM1C[5:0] TCLK FDSOUT[6:0] PTB0/TPM2C0/FDSOUT6 PTB1/PWTI1/ADC0 PTB2/PWTI2/ADC1 TPM2C0 TCLK PORT B PWTI1 TCLK PWTI2 TCLK ACMP3 ACMP2 ACMP1 ACMP0 ACMP3 ACMP2 ACMP1 ACMP0 PTB3/ACMP3/ADC2 PTB4/ACMP2/ADC3 PTB5/ACMP1/ADC4 PTB6/ACMP0/ADC5 PTB7/BKGD/MS 40 MHz INTERNAL CLOCK SOURCE (ICS) PORT C 8-CH 10-BIT ANALOG-TO-DIGITAL CONVERTER(ADC) INTER-INTERGRATED CIRCUIT (IIC) ADP[5:0] ADP[6:7] PTC0/ADC6/SCL PTC1/ADC7/SDA SCL SDA = Not Available in 16-pin TSSOP package Figure 1. MC9S08SF4 Series Block Diagram 2 Pin Assignments This section shows the pin assignments for the MC9S08SF4 series devices. MC9S08SF4 Series MCU Data Sheet, Rev. 2 Freescale Semiconductor 3 VDD PTA0/KBI0/TCLK/IRQ PTA1/KBI1/RESET PTA2/KBI2/TPM1C0/FDSOUT0 PTA3/KBI3/TPM1C1/FDSOUT1 PTA4/TPM1C2/FDSOUT2 PTA5/TPM1C3/FDSOUT3 PTA6/TPM1C4/FDSOUT4 PTA7/TPM1C5/FDSOUT5 PTB0/TPM2C0/FDSOUT6 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VSS PTC1/SDA/ADC7 PTC0/SCL/ADC6 PTB7/BKGD/MS PTB6/ACMP0/ADC5 PTB5/ACMP1/ADC4 PTB4/ACMP2/ADC3 PTB3/ACMP3/ADC2 PTB2/PWTI2/ADC1 PTB1/PWTI1/ADC0 Figure 2. MC9S08SF4 in 20-pin TSSOP Package VDD PTA0/KBI0/TCLK/IRQ PTA1/KBI1/RESET PTA2/KBI2/TPM1C0/FDSOUT0 PTA3/KBI3/TPM1C1/FDSOUT1 PTA4/TPM1C2/FDSOUT2 PTA5/TPM1C3/FDSOUT3 PTB0/TPM2C0/FDSOUT6 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VSS PTB7/BKGD/MS PTB6/ACMP0/ADC5 PTB5/ACMP1/ADC4 PTB4/ACMP2/ADC3 PTB3/ACMP3/ADC2 PTB2/PWTI2/ADC1 PTB1/PWTI1/ADC0 Figure 3. MC9S08SF4 in 16-pin TSSOP Package MC9S08SF4 Series MCU Data Sheet, Rev. 2 4 Freescale Semiconductor Introduction 3 3.1 Electrical Characteristics Introduction This section contains electrical and timing specifications for the MC9S08SF4 series of microcontrollers available at the time of publication. 3.2 Parameter Classification The electrical parameters shown in this supplement are guaranteed by various methods. To give the customer a better understanding the following classification is used and the parameters are tagged accordingly in the tables where appropriate: Table 1. Parameter Classifications P C Those parameters are guaranteed during production testing on each individual device. Those parameters are achieved by the design characterization by measuring a statistically relevant sample size across process variations. Those parameters are achieved by design characterization on a small sample size from typical devices under typical conditions unless otherwise noted. All values shown in the typical column are within this category. Those parameters are derived mainly from simulations. T D NOTE The classification is shown in the column labeled “C” in the parameter tables where appropriate. 3.3 Absolute Maximum Ratings Absolute maximum ratings are stress ratings only, and functional operation at the maxima is not guaranteed. Stress beyond the limits specified in Table 2 may affect device reliability or cause permanent damage to the device. For functional operating conditions, refer to the remaining tables in this section. This device contains circuitry protecting against damage due to high static voltage or electrical fields; however, it is advised that normal precautions be taken to avoid application of any voltages higher than maximum-rated voltages to this high-impedance circuit. Reliability of operation is enhanced if unused inputs are tied to an appropriate logic voltage level (for instance, either VSS or VDD) or the programmable pullup resistor associated with the pin is enabled. MC9S08SF4 Series MCU Data Sheet, Rev. 2 Freescale Semiconductor 5 Thermal Characteristics Table 2. Absolute Maximum Ratings Rating Supply voltage Maximum current into VDD Digital input voltage Instantaneous maximum current Single pin limit (applies to all port pins)1, 2, 3 Storage temperature range 1 Symbol VDD IDD VIn ID Tstg Value –0.3 to 5.8 120 –0.3 to VDD + 0.3 ±25 –55 to 150 Unit V mA V mA °C Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate resistance values for positive (VDD) and negative (VSS) clamp voltages, then use the larger of the two resistance values. 2 All functional non-supply pins are internally clamped to VSS and VDD. 3 Power supply must maintain regulation within operating V DD range during instantaneous and operating maximum current conditions. If positive injection current (VIn > VDD) is greater than IDD, the injection current may flow out of VDD and could result in external power supply going out of regulation. Ensure external VDD load will shunt current greater than maximum injection current. This will be the greatest risk when the MCU is not consuming power. Examples are: if no system clock is present, or if the clock rate is very low (which would reduce overall power consumption). 3.4 Thermal Characteristics This section provides information about operating temperature range, power dissipation, and package thermal resistance. Power dissipation on I/O pins is usually small compared to the power dissipation in on-chip logic and voltage regulator circuits and it is user-determined rather than being controlled by the MCU design. In order to take PI/O into account in power calculations, determine the difference between actual pin voltage and VSS or VDD and multiply by the pin current for each I/O pin. Except in cases of unusually high pin current (heavy loads), the difference between pin voltage and VSS or VDD will be very small. Table 3. Thermal Characteristics Rating Operating temperature range (packaged) Thermal resistance (single-layer board) 20-pin TSSOP 16-pin TSSOP Thermal resistance (four-layer board) 20-pin TSSOP 16-pin TSSOP Symbol TA Value TL to TH –40 to 125 115 123 76 75 Unit °C θJA °C/W θJA °C/W The average chip-junction temperature (TJ) in °C can be obtained from: TJ = TA + (PD × θJA) Eqn. 1 where: MC9S08SF4 Series MCU Data Sheet, Rev. 2 6 Freescale Semiconductor ESD Protection and Latch-Up Immunity TA = Ambient temperature, °C θJA = Package thermal resistance, junction-to-ambient, °C/W PD = Pint + PI/O Pint = IDD × VDD, Watts — chip internal power PI/O = Power dissipation on input and output pins — user determined For most applications, PI/O VDD Single pin limit Total MCU limit, includes sum of all stressed pins Input capacitance (all non-supply pins) — — — — — — — — — — — — — — — — — — 1.5 0.8 0.8 1.5 0.8 0.8 V OH VDD – 1.5 VDD – 0.8 VDD – 0.8 — — — V OL — — — — — — — D 13 D |IOHT| 100 60 100 60 mA |IOLT| mA 14 D |IIC| — — — — — — 0.2 5 7 mA mA pF 15 1 D CIn Maximum leakage current occurs at maximum operating temperature. Current decreases by approximately one-half for each 8 °C to 12 °C in the temperature range from 50 °C to 125 °C. MC9S08SF4 Series MCU Data Sheet, Rev. 2 Freescale Semiconductor 9 DC Characteristics 2 3 Measurement condition for pull resistors: VIn = VSS for pullup and VIn = VDD for pulldown. All functional non-supply pins are internally clamped to VSS and VDD. 4 Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate resistance values for positive and negative clamp voltages, then use the larger of the two values. 5 Power supply must maintain regulation within operating VDD range during instantaneous and operating maximum current conditions. If positive injection current (VIn > VDD) is greater than IDD, the injection current may flow out of VDD and could result in external power supply going out of regulation. Ensure external VDD load will shunt current greater than maximum injection current. This will be the greatest risk when the MCU is not consuming power. Examples are: if no system clock is present, or if clock rate is very low (which would reduce overall power consumption). Typical Low-Side Driver (LDS) Characteristics VDD = 5 V, PORTA, VOL Vs IOL 6 5 4 T=-40C T=0C T=25C T=85C T=105C T=125C V OL(V) 3 2 1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 IOL(mA) Figure 4. Typical Low-Side Driver (Sink) Characteristics Low Drive (PTxDSn = 0), VDD = 5.0 V, VOL vs. IOL MC9S08SF4 Series MCU Data Sheet, Rev. 2 10 Freescale Semiconductor DC Characteristics Typical Low-Side Driver (LDS) Characteristics VDD = 3 V, PORTA, VOL Vs IOL 3.5 3 2.5 T=-40C T=0C 2 1.5 1 0.5 0 1 2 3 4 5 T=25C T=85C T=105C T=125C V OL(V) IOL(mA) Figure 5. Typical Low-Side Driver (Sink) Characteristics Low Drive (PTxDSn = 0), VDD = 3.0 V, VOL vs. IOL Typical Low-Side Driver (HDS) Characteristics VDD = 5 V, PORTA, VOL Vs IOL 1.20 1.00 T=-40C 0.80 V OL(V) T=0C T=25C T=85C T=105C T=125C 0.60 0.40 0.20 0.00 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 IOL(mA) Figure 6. Typical Low-Side Driver (Sink) Characteristics High Drive (PTxDSn = 1), VDD = 5.0 V, VOL vs. IOL MC9S08SF4 Series MCU Data Sheet, Rev. 2 Freescale Semiconductor 11 DC Characteristics Typical Low-Side Driver (HDS) Characteristics VDD = 3 V, PORTA, VOL Vs IOL 1.8 1.6 1.4 T=-40C T=0C T=25C T=85C T=85 T=125C 1.2 1 0.8 0.6 0.4 0.2 0 1 2 3 4 5 6 7 8 9 10 11 12 13 V OL(V) IOL(mA) Figure 7. Typical Low-Side Driver (Sink) Characteristics High Drive (PTxDSn = 1), VDD = 3.0 V, VOL vs. IOL Typical High-Side Driver (LDS) Characteristics VDD = 5 V, PORTA, VOH Vs IOH 6.00 5.00 T=-40C 4.00 T=0C T=25C T=85C T=105C T=125C V OH(V) 3.00 2.00 1.00 0.00 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 IOH(mA) Figure 8. Typical High-Side Driver (Source) Characteristics Low Drive (PTxDSn = 0), VDD = 5.0 V, VOH vs. IOH MC9S08SF4 Series MCU Data Sheet, Rev. 2 12 Freescale Semiconductor DC Characteristics T ypical High-Side Driver (LDS) Characteristics VDD = 3 V, PORTA, VOH Vs IOH 3.5 3 2.5 T=-40C T=0C T=25C T=85C T=105C 1 0.5 0 0 -1 -2 -3 T=125C V OH(V) 2 1.5 IOH(mA) Figure 9. Typical High-Side Driver (Source) Characteristics Low Drive (PTxDSn = 0), VDD = 3.0 V, VOH vs. IOH Typical High-Side Driver (HDS) Characteristics VDD = 5 V, PORTA, VOH Vs IOH 5.20 5.00 4.80 4.60 T=-40C T=0C T=25C T=85C T=105C T=125C 4.40 4.20 4.00 3.80 3.60 3.40 3.20 3.00 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15 -16 -17 -18 -19 -20 V OH(V) IOH(mA) Figure 10. Typical High-Side Driver (Source) Characteristics High Drive (PTxDSn = 1), VDD = 5.0 V, VOH vs. IOH MC9S08SF4 Series MCU Data Sheet, Rev. 2 Freescale Semiconductor 13 Supply Current Characteristics Typical High-Side Driver (HDS) Characteristics VDD = 3 V, PORTA, VOH Vs IOH 3.5 3 2.5 T=-40C T=0C 2 1.5 1 0.5 0 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15 T=25C T=85C T=105C T=125C V OH(V) IOH(mA) Figure 11. Typical High-Side Driver (Source) Characteristics High Drive (PTxDSn = 1), VDD = 3.0 V, VOH vs. IOH 3.7 Supply Current Characteristics Table 7. Supply Current Characteristics This section includes information about power supply current in various operating modes. Num 1 C P D P D P D P D P D P Parameter Run supply current3 measured at (CPU clock = 2 MHz, fBus = 1 MHz) Run supply current3 measured at (CPU clock = 16 MHz, fBus = 8 MHz) Run mode supply current3 measured at (CPU clock = 40 MHz, fBus = 20 MHz) Wait mode supply current4 measured at (fBus = 8 MHz) Wait mode supply current4 measured at ( fBus = 20 MHz) Stop2 mode supply current –40 to 85 °C –40 to 125 °C –40 to 85°C –40 to 125°C Symbol RIDD RIDD RIDD WIDD WIDD VDD (V) 5 3 5 3 5 3 5 3 5 3 5 Typical1 1.75 1.71 5.69 4.63 11.53 10.39 3.95 3.58 8.36 7.97 1.99 Max2 1.77 1.73 6.25 4.66 12.00 11.00 4.54 4.00 9.62 8.07 18.47 100 Unit mA 2 mA 3 mA 4 mA mA 5 6 P D D S2IDD 3 1.95 μA 16.9 90 MC9S08SF4 Series MCU Data Sheet, Rev. 2 14 Freescale Semiconductor Supply Current Characteristics Table 7. Supply Current Characteristics (continued) Num C P 7 P D D 8 D D D D D D D D D D D D D D D D D D D D D D Parameter Stop3 mode supply current –40 to 85 °C –40 to 125 °C –40 to 85 °C –40 to 125 °C PRACMP (PRG disabled) adder to stop3, 25 °C PRACMP (PRG enabled) adder to stop3, 25 °C ADC adder to stop2 or stop3, 25 °C Symbol VDD (V) 5 Typical1 2 Max2 18.4 100 Unit S3IDD 3 5 3 5 3 5 3 5 3 5 3 5 3 5 3 5 3 5 3 5 3 5 3 1.97 28.87 27.06 79.42 57.4 25 6 83.52 83.52 0.03 0.01 0.16 0.18 0.43 0.41 0.35 0.35 0.26 0.24 0.42 0.32 0.56 0.53 μA 16.82 90 — — — — — — — — — — — — — — — — — — — — — — nA nA nA nA nA nA nA nA μA μA mA mA mA mA mA mA mA mA mA mA mA mA — 9 — 10 — 11 LVD adder to stop3 (LVDE = LVDSE = 1) Adder to stop3 for oscillator enabled (IREFSTEN = 1) TPM1 and TPM2 adder to run mode, 25 °C (CPU clock = 40 MHz, fBus = 20 MHz) PWT1 and PWT2 adder to run mode, 25 °C (CPU clock = 40 MHz, fBus = 20 MHz) PRACMP adder to run mode, 25 °C (CPU clock = 40 MHz, fBus = 20 MHz) MTIM1 and MTIM2 adder to run mode, 25 °C (CPU clock = 40 MHz, fBus = 20 MHz) ADC adder to run mode, 25 °C (CPU clock = 40 MHz, fBus = 20 MHz) IIC adder to run mode, 25 °C (CPU clock = 40 MHz, fBus = 20 MHz) — 12 — 13 — 14 — 15 — 16 — 17 — 18 1 2 — Typicals are measured at 25 °C. Values given here are preliminary estimates prior to completing characterization. 3 All modules except ADC active, and does not include any dc loads on port pins. 4 Most customers are expected to find that the auto-wakeup from a stop mode can be used instead of the higher current wait mode. MC9S08SF4 Series MCU Data Sheet, Rev. 2 Freescale Semiconductor 15 ICS Characteristics Typical RIDD (VDD = 5 V, ADC off) Vs Bus Frequency 12.0000 10.0000 8.0000 mA 6.0000 4.0000 2.0000 0.0000 1 4 8 20 Bus Frequency Figure 12. Typical Run IDD vs. Bus Freq. (FEI) (ADC off) T=-40C T=0C T=25C T=85C T=125C 3.8 ICS Characteristics Table 8. ICS Specifications (Temperature Range = –40 to 125 °C Ambient ) Num 1 2 3 C Characteristic Symbol tIRST fint_t fdco_t Min — — 16 32 Typical1 60 39.0625 — — Max 100 — 20 MHz 40 Unit μs kHz Refer to Figure 13 for crystal or resonator circuits. T Internal reference start-up time P Average internal reference frequency — trimmed P DCO output frequency range — trimmed P Low range (DRS = 00) Middle range (DRS = 10) 4 Total deviation of DCO output from trimmed 2 P frequency Over full voltage and temperature range of –40°C to 125°C Total deviation of DCO output from trimmed frequency D Over full voltage and temperature range of –40°C to 85°C Total deviation of DCO output from trimmed frequency D Over fixed voltage and temperature range of 0 to 70°C C FLL acquisition time 2,3 C Long term jitter of DCO output clock (averaged over 2 ms interval) 4 tAcquire CJitter — — Δfdco_t –1.0 to 0.5 ±3 5 — –1.0 to 0.5 ±2 %fdco 6 ±0.5 ±1 7 8 — 0.02 1 0.2 ms %fdco MC9S08SF4 Series MCU Data Sheet, Rev. 2 16 Freescale Semiconductor AC Characteristics Data in Typical column was characterized at 5.0 V, 25 °C or is typical recommended value. This parameter is characterized and not tested on each device. 3 This specification applies to any time the FLL reference source or reference divider is changed, trim value changed, DMX32 bit is changed, DRS bit is changed, or changing from FLL disabled (FBELP, FBILP) to FLL enabled (FEI, FEE, FBE, FBI). If a crystal/resonator is being used as the reference, this specification assumes it is already running. 4 Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum f Bus. Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal. Noise injected into the FLL circuitry via VDD and VSS and variation in crystal oscillator frequency increase the CJitter percentage for a given interval. 1 2 1.00% 0.50% 0.00% Deviation (%) -60 -40 -20 -0.50% 0 20 40 60 80 100 120 -1.00% TBD Temperature -1.50% -2.00% Figure 13. Deviation of DCO Output from Trimmed Frequency (20 MHz, 5.0 V) 3.9 AC Characteristics This section describes AC timing characteristics for each peripheral system. MC9S08SF4 Series MCU Data Sheet, Rev. 2 Freescale Semiconductor 17 AC Characteristics 3.9.1 Control Timing Table 9. Control Timing Parameter Symbol fBus textrst tILIH, tIHIL Min 1 100 100 1.5 tcyc 100 1.5 tcyc — — 500 100 Typical1 — — Max 20 — Unit MHz ns Bus frequency (tcyc = 1/fBus) External reset pulse width IRQ pulse width Asynchronous path2 Synchronous path3 KBIPx pulse width Asynchronous path2 Synchronous path3 Port rise and fall time (load = 50 pF)4 Slew rate control disabled (PTxSE = 0) Slew rate control enabled (PTxSE = 1) BKGD/MS setup time after issuing background debug force reset to enter user or BDM modes BKGD/MS hold time after issuing background debug force reset to enter user or BDM modes 5 1 2 2 — — ns tILIH, tIHIL — — ns tRise, tFall 3 30 — — — — — — ns tMSSU tMSH ns μs Data in Typical column was characterized at 5.0 V, 25 °C. This is the shortest pulse that is guaranteed to be recognized. 3 This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or may not be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized in that case. 4 Timing is shown with respect to 20% V DD and 80% VDD levels. Temperature range –40°C to 125°C. 5 To enter BDM mode following a POR, BKGD/MS should be held low during the power-up and for a hold time of t MSH after VDD rises above VLVD. textrst RESET PIN Figure 14. Reset Timing tIHIL IRQ/KBIPx IRQ/KBIPx tILIH Figure 15. IRQ/KBIPx Timing MC9S08SF4 Series MCU Data Sheet, Rev. 2 18 Freescale Semiconductor AC Characteristics 3.9.2 Timer/PWM (TPM) Module Timing Synchronizer circuits determine the shortest input pulses that can be recognized or the fastest clock that can be used as the optional external source to the timer counter. These synchronizers operate from the current bus rate clock. Table 10. TPM/MTIM Input Timing Function External clock frequency External clock period External clock high time External clock low time Input capture pulse width for TPM Timer clock frequency Symbol fTCLK tTCLK tclkh tclkl tICPW ftimer Min dc 4 1.5 1.5 1.5 — Max ftimer/4 — — — — 40 Unit MHz tcyc tcyc tcyc tcyc MHz tText tclkh TCLK tclkl Figure 16. Timer External Clock tICPW TPMCHn TPMCHn tICPW Figure 17. Timer Input Capture Pulse MC9S08SF4 Series MCU Data Sheet, Rev. 2 Freescale Semiconductor 19 ADC Characteristics 3.10 Num ADC Characteristics Table 11. ADC Characteristics C D Characteristic Supply current ADLPC = 1 ADLSMP = 1 ADCO = 1 Supply current ADLPC = 1 ADLSMP = 0 ADCO = 1 Supply current ADLPC = 0 ADLSMP = 1 ADCO = 1 Supply current ADLPC = 0 ADLSMP = 0 ADCO = 1 Supply current Ref voltage high Ref coltage low ADC conversion clock Conditions VDDA ≤ 3.6 V (3.0 V Typ) VDDA ≤ 5.5 V (5.0 V Typ) VDDA ≤ 3.6 V (3.0 V Typ) VDDA ≤ 5.5 V (5.0 V Typ) VDDA ≤ 3.6 V (3.0 V Typ) VDDA ≤ 5.5 V (5.0 V Typ) VDDA ≤ 3.6V (3.0 V Typ) VDDA ≤ 5.5V (5.0 V Typ) Stop, Reset, Module Off — — High speed (ADLPC = 0) Low power (ADLPC = 1) High speed (ADLPC = 0) Low power (ADLPC = 1) Short sample (ADLSMP = 0) Long sample (ADLSMP = 1) Short sample (ADLSMP = 0) Long sample (ADLSMP = 1) — — — — Symb Min — IDDA — — IDDA — — IDDA — — IDDA — IDDA VREFH VREFL — 2.7 VSSA 0.4 fADCK 0.4 2.5 fADACK 1.25 20 tADC 40 4 tADS 24 VADIN CADIN RADIN RAS VREFL — — — 24 — 7 5 — 24 VREFH 10 15 102 40 4 43 4 2 20 3.3 23 — 4 4.0 6.6 MHz 660