IRFSL3806PBF

PD - 97310 Applications l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits G IRFB3806PbF IRFS3806PbF IRFSL3806PbF HEXFET® Power MOSFET D Benefits l Improved Gate, Avalanche and Dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche SOA l Enhanced body diode dV/dt and dI/dt Capability S VDSS RDS(on) typ. max. ID D 60V 12.6mΩ 15.8mΩ 43A D D S G D G S G S D TO-220AB IRFB3806PbF D2Pak IRFS3806PbF TO-262 IRFSL3806PbF G D S Gate Drain Max. 43 31 170 71 0.47 ± 20 24 -55 to + 175 300 10lbxin (1.1Nxm) Source Units A W W/°C V V/ns °C Absolute Maximum Ratings Symbol ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS dv/dt TJ TSTG Parameter Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current c Maximum Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery e Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case) Mounting torque, 6-32 or M3 screw Avalanche Characteristics EAS (Thermally limited) IAR EAR Single Pulse Avalanche Energy d Avalanche Current c Repetitive Avalanche Energy f 73 25 7.1 mJ A mJ Thermal Resistance Symbol RθJC RθCS RθJA RθJA Parameter Junction-to-Case j Case-to-Sink, Flat Greased Surface, TO-220 Junction-to-Ambient, TO-220 ij Junction-to-Ambient (PCB Mount) , D Pak ij 2 Typ. ––– 0.50 ––– ––– Max. 2.12 ––– 62 40 Units °C/W www.irf.com 1 02/29/08 IRFB/S/SL3806PbF Static @ TJ = 25°C (unless otherwise specified) Symbol V(BR)DSS ∆V(BR)DSS/∆TJ RDS(on) VGS(th) IDSS IGSS Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. Typ. Max. Units 60 ––– ––– ––– 0.075 ––– ––– 12.6 15.8 2.0 ––– 4.0 ––– ––– 20 ––– ––– 250 ––– ––– 100 ––– ––– -100 Conditions V VGS = 0V, ID = 250µA V/°C Reference to 25°C, ID = 5mAc mΩ VGS = 10V, ID = 25A f V VDS = VGS, ID = 50µA µA VDS = 60V, VGS = 0V VDS = 48V, VGS = 0V, TJ = 125°C nA VGS = 20V VGS = -20V Dynamic @ TJ = 25°C (unless otherwise specified) Symbol gfs Qg Qgs Qgd Qsync RG(int) td(on) tr td(off) tf Ciss Coss Crss Coss eff. (ER) Coss eff. (TR) Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Total Gate Charge Sync. (Qg - Qgd) Internal Gate Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Min. Typ. Max. Units 41 ––– ––– ––– ––– ––– Conditions VDS = 10V, ID = 25A ID = 25A VDS = 30V VGS = 10V f ID = 25A, VDS =0V, VGS = 10V ––– 22 5.0 6.3 28.3 0.79 6.3 40 49 47 1150 130 67 190 230 ––– 30 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– S nC Ω ––– ––– ––– ––– ––– ––– ––– Effective Output Capacitance (Energy Related)h ––– ––– Effective Output Capacitance (Time Related)g ns pF VDD = 39V ID = 25A RG = 20Ω VGS = 10V f VGS = 0V VDS = 50V ƒ = 1.0MHz VGS = 0V, VDS = 0V to 60V h VGS = 0V, VDS = 0V to 60V g Diode Characteristics Symbol IS ISM VSD trr Qrr IRRM ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) c Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Forward Turn-On Time Min. Typ. Max. Units ––– ––– ––– ––– 43 170 A Conditions MOSFET symbol showing the integral reverse G S D ––– ––– 1.3 V ––– 22 33 ns ––– 26 39 ––– 17 26 nC TJ = 125°C ––– 24 36 ––– 1.4 ––– A TJ = 25°C Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) p-n junction diode. TJ = 25°C, IS = 25A, VGS = 0V f VR = 51V, TJ = 25°C IF = 25A TJ = 125°C di/dt = 100A/µs f TJ = 25°C Notes:  Repetitive rating; pulse width limited by max. junction temperature. ‚ Limited by TJmax, starting TJ = 25°C, L = 0.23mH RG = 25Ω, IAS = 25A, VGS =10V. Part not recommended for use above this value. ƒ ISD ≤ 25A, di/dt ≤ 1580A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C. „ Pulse width ≤ 400µs; duty cycle ≤ 2%. … Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. † Coss eff. (ER) is a fixed capacitance that gives the same energy as ‡ When mounted on 1" square PCB (FR-4 or G-10 Material). For recom mended footprint and soldering techniques refer to application note #AN-994. Coss while VDS is rising from 0 to 80% VDSS. ˆ Rθ is measured at TJ approximately 90°C. 2 www.irf.com IRFB/S/SL3806PbF 1000 TOP VGS 15V 10V 8.0V 6.0V 5.5V 5.0V 4.8V 4.5V 1000 TOP VGS 15V 10V 8.0V 6.0V 5.5V 5.0V 4.8V 4.5V ID, Drain-to-Source Current (A) 100 BOTTOM ID, Drain-to-Source Current (A) 100 BOTTOM 4.5V 10 10 4.5V ≤60µs PULSE WIDTH Tj = 25°C 1 0.1 1 10 100 V DS, Drain-to-Source Voltage (V) 1 0.1 1 ≤60µs PULSE WIDTH Tj = 175°C 10 100 V DS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics 1000 RDS(on) , Drain-to-Source On Resistance Fig 2. Typical Output Characteristics 2.5 ID = 25A VGS = 10V 2.0 (Normalized) ID, Drain-to-Source Current (A) 100 T J = 175°C 10 T J = 25°C 1 VDS = 25V ≤60µs PULSE WIDTH 0.1 2 3 4 5 6 7 8 9 1.5 1.0 0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 T J , Junction Temperature (°C) VGS , Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics 10000 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, C ds SHORTED Crss = Cgd Coss = Cds + Cgd Fig 4. Normalized On-Resistance vs. Temperature 12.0 ID= 25A VGS , Gate-to-Source Voltage (V) 10.0 VDS= 48V VDS= 30V VDS= 12V C, Capacitance (pF) 1000 Ciss Coss Crss 8.0 6.0 100 4.0 2.0 10 1 10 VDS, Drain-to-Source Voltage (V) 100 0.0 0 5 10 15 20 25 Q G , Total Gate Charge (nC) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage www.irf.com 3 IRFB/S/SL3806PbF 1000 1000 OPERATION IN THIS AREA LIMITED BY R DS(on) ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) 100 T J = 175°C 10 T J = 25°C 100 1msec 100µsec 10 10msec 1 VGS = 0V 0.1 0.0 0.5 1.0 1.5 2.0 VSD, Source-to-Drain Voltage (V) 1 Tc = 25°C Tj = 175°C Single Pulse 0.1 1 10 VDS, Drain-to-Source Voltage (V) 100 DC Fig 7. Typical Source-Drain Diode Forward Voltage V(BR)DSS , Drain-to-Source Breakdown Voltage (V) 45 40 35 ID, Drain Current (A) Fig 8. Maximum Safe Operating Area 80 Id = 5mA 75 30 25 20 15 10 5 0 25 50 75 100 125 150 175 T C , Case Temperature (°C) 70 65 60 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 T J , Temperature ( °C ) Fig 9. Maximum Drain Current vs. Case Temperature 0.4 0.3 0.3 Energy (µJ) Fig 10. Drain-to-Source Breakdown Voltage 300 EAS , Single Pulse Avalanche Energy (mJ) 250 ID 2.8A 5.1A BOTTOM 25A TOP 200 0.2 0.2 0.1 0.1 0.0 -10 0 10 20 30 40 50 60 70 150 100 50 0 25 50 75 100 125 150 175 Starting T J , Junction Temperature (°C) VDS, Drain-to-Source Voltage (V) Fig 11. Typical COSS Stored Energy Fig 12. Maximum Avalanche Energy vs. DrainCurrent 4 www.irf.com IRFB/S/SL3806PbF 10 Thermal Response ( Z thJC ) °C/W 1 D = 0.50 0.20 0.10 0.05 0.02 0.01 τJ τJ τ1 τ1 0.1 R1 R1 τ2 R2 R2 R3 R3 τ3 τC τ τ3 Ri (°C/W) τi (sec) 0.6086 0.00026 0.9926 0.5203 0.001228 0.00812 τ2 0.01 SINGLE PULSE ( THERMAL RESPONSE ) 1E-005 0.0001 Ci= τi/Ri Ci τi/Ri Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc 0.001 0.01 0.1 0.001 1E-006 t1 , Rectangular Pulse Duration (sec) Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case 100 Duty Cycle = Single Pulse 0.01 Avalanche Current (A) 10 0.05 0.10 1 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ∆Τ j = 25°C and Tstart = 150°C. 0.1 1.0E-06 1.0E-05 1.0E-04 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ∆ Tj = 150°C and Tstart =25°C (Single Pulse) 1.0E-03 tav (sec) 1.0E-02 1.0E-01 Fig 14. Typical Avalanche Current vs.Pulsewidth 80 TOP Single Pulse BOTTOM 1.0% Duty Cycle ID = 25A 60 Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 14, 15). tav = Average time in avalanche. D = Duty cycle in avalanche = tav ·f ZthJC(D, tav) = Transient thermal resistance, see Figures 13) EAR , Avalanche Energy (mJ) 40 20 0 25 50 75 100 125 150 175 Starting T J , Junction Temperature (°C) PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC Iav = 2DT/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav Fig 15. Maximum Avalanche Energy vs. Temperature www.irf.com 5 IRFB/S/SL3806PbF 4.0 VGS(th) , Gate threshold Voltage (V) 14 12 10 IF = 17A V R = 51V TJ = 25°C TJ = 125°C 3.5 3.0 IRR (A) 8 6 4 2 0 2.5 ID = 50µA ID = 250µA ID = 1.0mA ID = 1.0A 2.0 1.5 1.0 -75 -50 -25 0 25 50 75 100 125 150 175 200 T J , Temperature ( °C ) 0 200 400 600 800 1000 diF /dt (A/µs) Fig 16. Threshold Voltage vs. Temperature 14 12 10 IRR (A) Fig. 17 - Typical Recovery Current vs. dif/dt 260 IF = 17A V R = 51V TJ = 25°C TJ = 125°C IF = 25A V R = 51V TJ = 25°C TJ = 125°C Q RR (A) 210 8 6 4 160 110 60 2 0 0 200 400 600 800 1000 diF /dt (A/µs) 10 0 200 400 600 800 1000 diF /dt (A/µs) Fig. 18 - Typical Recovery Current vs. dif/dt 260 IF = 25A V R = 51V TJ = 25°C TJ = 125°C Fig. 19 - Typical Stored Charge vs. dif/dt 210 Q RR (A) 160 110 60 10 0 200 400 600 800 1000 diF /dt (A/µs) 6 Fig. 20 - Typical Stored Charge vs. dif/dt www.irf.com IRFB/S/SL3806PbF D.U.T Driver Gate Drive + P.W. Period D= P.W. Period VGS=10V ƒ + Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt ‚ - „ +  RG • • • • dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test VDD VDD + - Re-Applied Voltage Body Diode Forward Drop Inductor Curent Inductor Current Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 20. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs V(BR)DSS 15V tp DRIVER VDS L RG VGS 20V D.U.T IAS tp + V - DD A 0.01Ω I AS Fig 21a. Unclamped Inductive Test Circuit LD VDS Fig 21b. Unclamped Inductive Waveforms VDS 90% + VDD - D.U.T VGS Pulse Width < 1µs Duty Factor < 0.1% 10% VGS td(on) tr td(off) tf Fig 22a. Switching Time Test Circuit Fig 22b. Switching Time Waveforms Id Vds Vgs L VCC 0 DUT 1K Vgs(th) Qgs1 Qgs2 Qgd Qgodr Fig 23a. Gate Charge Test Circuit www.irf.com Fig 23b. Gate Charge Waveform 7 IRFB/S/SL3806PbF TO-220AB Package Outline (Dimensions are shown in millimeters (inches)) TO-220AB Part Marking Information @Y6HQG@) UCDTÃDTÃ6IÃDSA  à GPUÃ8P9@à &'( 6TT@H7G@9ÃPIÃXXà (à ((& DIÃUC@Ã6TT@H7G`ÃGDI@ÃÅ8Å Note: "P" in assembly line position indicates "Lead-Free" DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G` GPUÃ8P9@ Q6SUÃIVH7@S 96U@Ã8P9@ `@6SÃ&Ã2à ((& X@@Fà ( GDI@Ã8 TO-220AB packages are not recommended for Surface Mount Application. Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 8 www.irf.com IRFB/S/SL3806PbF D2Pak (TO-263AB) Package Outline Dimensions are shown in millimeters (inches) D2Pak (TO-263AB) Part Marking Information UCDTÃDTÃ6IÃDSA$"TÃXDUC GPUÃ8P9@Ã'!# 6TT@H7G@9ÃPIÃXXÃ!Ã! DIÃUC@Ã6TT@H7G`ÃGDI@ÃÅGÅ DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G` GPUÃ8P9@ Q6SUÃIVH7@S A$"T 96U@Ã8P9@ `@6SÃÃ2Ã! X@@FÃ! GDI@ÃG 25 DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G` GPUÃ8P9@ Q6SUÃIVH7@S A$"T 96U@Ã8P9@ QÃ2Ã9@TDBI6U@TÃG@69ÃÃAS@@ QSP9V8UÃPQUDPI6G `@6SÃÃ2Ã! X@@FÃ! 6Ã2Ã6TT@H7G`ÃTDU@Ã8P9@ 9 Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ www.irf.com IRFB/S/SL3806PbF TO-262 Package Outline Dimensions are shown in millimeters (inches) TO-262 Part Marking Information @Y6HQG@) UCDTÃDTÃ6IÃDSG" "G GPUÃ8P9@à &'( 6TT@H7G@9ÃPIÃXXà (à ((& DIÃUC@Ã6TT@H7G`ÃGDI@ÃÅ8Å DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G` GPUÃ8P9@ Q6SUÃIVH7@S 96U@Ã8P9@ `@6SÃ&Ã2à ((& X@@Fà ( GDI@Ã8 25 DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G` GPUÃ8P9@ Q6SUÃIVH7@S 96U@Ã8P9@ QÃ2Ã9@TDBI6U@TÃG@69AS@@ QSP9V8UÃPQUDPI6G `@6SÃ&Ã2à ((& X@@Fà ( 6Ã2Ã6TT@H7G`ÃTDU@Ã8P9@ Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 10 www.irf.com IRFB/S/SL3806PbF D2Pak (TO-263AB) Tape & Reel Information Dimensions are shown in millimeters (inches) TRR 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) 1.60 (.063) 1.50 (.059) 0.368 (.0145) 0.342 (.0135) FEED DIRECTION 1.85 (.073) 1.65 (.065) 11.60 (.457) 11.40 (.449) 15.42 (.609) 15.22 (.601) 24.30 (.957) 23.90 (.941) TRL 10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 16.10 (.634) 15.90 (.626) 4.72 (.136) 4.52 (.178) FEED DIRECTION 13.50 (.532) 12.80 (.504) 27.40 (1.079) 23.90 (.941) 4 330.00 (14.173) MAX. 60.00 (2.362) MIN. NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. 26.40 (1.039) 24.40 (.961) 3 30.40 (1.197) MAX. 4 Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 02/08 www.irf.com 11