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IS62WV2568ALL-70HI

IS62WV2568ALL-70HI

  • 厂商:

    ISSI(芯成半导体)

  • 封装:

  • 描述:

    IS62WV2568ALL-70HI - 256K x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM - Integrated Silicon Solu...

  • 数据手册
  • 价格&库存
IS62WV2568ALL-70HI 数据手册
IS62WV2568ALL IS62WV2568BLL 256K x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM FEATURES • High-speed access time: 55ns, 70ns • CMOS low power operation – 36 mW (typical) operating – 9 µW (typical) CMOS standby • TTL compatible interface levels • Single power supply – 1.65V--2.2V VCC (62WV2568ALL) – 2.5V--3.6V VCC (62WV2568BLL) • Fully static operation: no clock or refresh required • Three state outputs • Industrial temperature available • Lead-free available ISSI JUNE 2005 ® DESCRIPTION The ISSI IS62WV2568ALL / IS62WV2568BLL are highspeed, 2M bit static RAMs organized as 256K words by 8 bits. It is fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields highperformance and low power consumption devices. When CS1 is HIGH (deselected) or when CS2 is LOW (deselected) or when CS1 is LOW, CS2 is HIGH, the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs. The active LOW Write Enable (WE) controls both writing and reading of the memory. The IS62WV2568ALL and IS62WV2568BLL are packaged in the JEDEC standard 32-pin TSOP (TYPE I), sTSOP (TYPE I), and 36-pin mini BGA. FUNCTIONAL BLOCK DIAGRAM A0-A17 DECODER 256K x 8 MEMORY ARRAY VCC GND I/O DATA CIRCUIT I/O0-I/O7 COLUMN I/O CS2 CS1 OE WE CONTROL CIRCUIT Copyright © 2002 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 06/20/05 1 IS62WV2568ALL, PIN DESCRIPTIONS A0-A17 CS1 CS2 OE WE I/O0-I/O7 NC Vcc GND IS62WV2568BLL ISSI ® Address Inputs Chip Enable 1 Input Chip Enable 2 Input Output Enable Input Write Enable Input Input/Output No Connection Power Ground PIN CONFIGURATION 36-pin mini BGA (B) (6mm x 8mm) 32-pin TSOP (TYPE I), sTSOP (TYPE I) 1 2 3 4 5 6 A B C D E F G H A0 I/O4 I/O5 GND Vcc I/O6 I/O7 A9 A1 A2 CS2 WE NC A3 A4 A5 A6 A7 A8 I/O0 I/O1 Vcc GND NC OE A10 CS1 A11 A17 A16 A12 A15 A13 I/O2 I/O3 A14 A11 A9 A8 A13 WE CS2 A15 VCC A17 A16 A14 A12 A7 A6 A5 A4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 OE A10 CS1 I/O7 I/O6 I/O5 I/O4 I/O3 GND I/O2 I/O1 I/O0 A0 A1 A2 A3 2 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 06/20/05 IS62WV2568ALL, IS62WV2568BLL ISSI Value –0.2 to Vcc+0.3 –65 to +150 1.0 Unit V °C W ® ABSOLUTE MAXIMUM RATINGS(1) Symbol VTERM TSTG PT Parameter Terminal Voltage with Respect to GND Storage Temperature Power Dissipation Note: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. OPERATING RANGE (Vcc) Range Commercial Industrial Ambient Temperature 0°C to +70°C –40°C to +85°C IS62WV2568ALL 1.65V - 2.2V 1.65V - 2.2V IS62WV2568BLL 2.5V - 3.6V 2.5V - 3.6V DC ELECTRICAL CHARACTERISTICS (Over Operating Range) Symbol VOH VOL VIH VIL(1) ILI ILO Parameter Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input Leakage Output Leakage GND ≤ VIN ≤ VCC GND ≤ VOUT ≤ VCC, Outputs Disabled Test Conditions IOH = -0.1 mA IOH = -1 mA IOL = 0.1 mA IOL = 2.1 mA Vcc 1.65-2.2V 2.5-3.6V 1.65-2.2V 2.5-3.6V 1.65-2.2V 2.5-3.6V 1.65-2.2V 2.5-3.6V Min. 1.4 2.2 — — 1.4 2.2 –0.2 –0.2 –1 –1 Max. — — 0.2 0.4 VCC + 0.2 VCC + 0.3 0.4 0.6 1 1 Unit V V V V V V V V µA µA Notes: 1. VIL (min.) = –1.0V for pulse width less than 10 ns. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 06/20/05 3 IS62WV2568ALL, CAPACITANCE(1) Symbol CIN COUT Parameter IS62WV2568BLL ISSI Max. 8 10 Unit pF pF ® Conditions VIN = 0V VOUT = 0V Input Capacitance Input/Output Capacitance Note: 1. Tested initially and after any design or process changes that may affect these parameters. AC TEST CONDITIONS Parameter Input Pulse Level Input Rise and Fall Times Input and Output Timing and Reference Level Output Load 62WV2568ALL (Unit) 0.4V to Vcc-0.2V 5 ns VREF See Figures 1 and 2 62WV2568BLL (Unit) 0.4V to Vcc-0.3V 5ns VREF See Figures 1 and 2 1.65-2.2V R1(Ω) R2(Ω) VREF VTM 3070 3150 0.9V 1.8V 2.5V - 3.6V 3070 3150 1.5V 2.8V AC TEST LOADS R1 VTM VTM R1 OUTPUT 30 pF Including jig and scope R2 OUTPUT 5 pF Including jig and scope R2 Figure 1 4 Figure 2 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 06/20/05 IS62WV2568ALL, IS62WV2568BLL ISSI Max. 70 ns 15 15 3 3 0.3 0.3 Unit mA mA mA ® POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range) 62WV2568ALL (1.65V - 2.2V) Symbol Parameter ICC ICC1 ISB1 Vcc Dynamic Operating Supply Current Operating Supply Current TTL Standby Current (TTL Inputs) Test Conditions VCC = Max., Com. IOUT = 0 mA, f = fMAX Ind. VCC = Max., Com. IOUT = 0 mA, f = 0 Ind. VCC = Max., Com. VIN = VIH or VIL Ind. CS1 = VIH , CS2 = VIL, f = 1 MHZ VCC = Max., CS1 ≥ VCC – 0.2V, CS2 ≤ 0.2V, VIN ≥ VCC – 0.2V, or VIN ≤ 0.2V, f = 0 Com. Ind. ISB2 CMOS Standby Current (CMOS Inputs) 5 10 µA POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range) 62WV2568BLL (2.5V - 3.6V) Symbol Parameter ICC ICC1 ISB1 Vcc Dynamic Operating Supply Current Operating Supply Current TTL Standby Current (TTL Inputs) Test Conditions VCC = Max., Com. IOUT = 0 mA, f = fMAX Ind. VCC = Max., Com. IOUT = 0 mA, f = 0 Ind. VCC = Max., Com. VIN = VIH or VIL Ind. CS1 = VIH , CS2 = VIL, f = 1 MHZ VCC = Max., CS1 ≥ VCC – 0.2V, CS2 ≤ 0.2V, VIN ≥ VCC – 0.2V, or VIN ≤ 0.2V, f = 0 Com. Ind. Max. 55 ns 30 35 3 3 0.3 0.3 Max. 70 ns 25 30 3 3 0.3 0.3 Unit mA mA mA ISB2 CMOS Standby Current (CMOS Inputs) 10 10 10 10 µA Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 06/20/05 5 IS62WV2568ALL, IS62WV2568BLL ISSI 70 ns Min. Max. 70 — 10 — — — 5 0 10 — 70 — 70 35 25 — 25 — Unit ns ns ns ns ns ns ns ns ns — 55 — 55 25 20 — 20 — ® READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range) Symbol Parameter Read Cycle Time Address Access Time Output Hold Time CS1/CS2 Access Time OE Access Time OE to High-Z Output OE to Low-Z Output (2) 55 ns Min. Max. 55 — 10 — — — 5 0 10 tRC tAA tOHA tACS1/tACS2 tDOE tHZOE(2) tLZOE(2) tHZCS1/tHZCS2 tLZCS1/tLZCS2 (2) CS1/CS2 to High-Z Output CS1/CS2 to Low-Z Output Notes: 1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9V, input pulse levels of 0.4 to 1.4V and output loading specified in Figure 1. 2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested. AC WAVEFORMS READ CYCLE NO. 1(1,2) (Address Controlled) (CS1 = OE = VIL, CS2 = WE = VIH) tRC ADDRESS tAA tOHA tOHA DATA VALID DOUT PREVIOUS DATA VALID 6 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 06/20/05 IS62WV2568ALL, AC WAVEFORMS IS62WV2568BLL ISSI tRC ® READ CYCLE NO. 2(1,3) (CS1, CS2, OE Controlled) ADDRESS tAA tOHA OE tDOE tHZOE CS1 tACS1/tACS2 tLZOE CS2 tLZCS1/ tLZCS2 HIGH-Z tHZCS DATA VALID DOUT Notes: 1. WE is HIGH for a Read Cycle. 2. The device is continuously selected. OE, CS1= VIL. CS2=WE=VIH. 3. Address is valid prior to or coincident with CS1 LOW and CS2 HIGH transition. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 06/20/05 7 IS62WV2568ALL, IS62WV2568BLL ISSI 55 ns Min. Max. 55 45 45 0 0 40 25 0 — 5 — — — — — — — — 20 — 70 ns Min. Max. 70 60 60 0 0 50 30 0 — 5 — — — — — — — — 20 — Unit ns ns ns ns ns ns ns ns ns ns ® WRITE CYCLE SWITCHING CHARACTERISTICS(1,2) (Over Operating Range) Symbol Parameter Write Cycle Time tWC tSCS1/tSCS2 CS1/CS2 to Write End tAW Address Setup Time to Write End tHA tSA tPWE tSD tHD tHZWE(3) tLZWE(3) Notes: Address Hold from Write End Address Setup Time WE Pulse Width Data Setup to Write End Data Hold from Write End WE LOW to High-Z Output WE HIGH to Low-Z Output 1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9V, input pulse levels of 0.4V to 1.4V and output loading specified in Figure 1. 2. The internal write time is defined by the overlap of CS1 LOW, CS2 HIGH and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the write. 3. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested. AC WAVEFORMS WRITE CYCLE NO. 1 (CS1/CS2 Controlled, OE = HIGH or LOW) tWC ADDRESS tSCS1 tHA CS1 tSCS2 CS2 tAW tPWE tSA tHZWE HIGH-Z WE tLZWE DOUT DATA UNDEFINED tSD tHD DIN DATA-IN VALID 8 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 06/20/05 IS62WV2568ALL, AC WAVEFORMS IS62WV2568BLL ISSI tWC ® WRITE CYCLE NO. 2 (WE Controlled: OE is HIGH During Write Cycle) ADDRESS OE tSCS1 tHA CS1 tSCS2 CS2 tAW tPWE tSA tHZWE HIGH-Z WE tLZWE DOUT DATA UNDEFINED tSD tHD DIN DATA-IN VALID WRITE CYCLE NO. 3 (WE Controlled: OE is LOW During Write Cycle) tWC ADDRESS OE tSCS1 tHA CS1 tSCS2 CS2 tAW tPWE tSA tHZWE HIGH-Z WE tLZWE DOUT DATA UNDEFINED tSD tHD DIN DATA-IN VALID Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 06/20/05 9 IS62WV2568ALL, IS62WV2568BLL ISSI Min. 1.0 — 0 tRC Max. 3.6 10 — — Unit V µA ns ns ® DATA RETENTION SWITCHING CHARACTERISTICS Symbol VDR IDR tSDR tRDR Parameter Vcc for Data Retention Data Retention Current Data Retention Setup Time Recovery Time Test Condition See Data Retention Waveform Vcc = 1.0V, CS1/CS2 ≥ Vcc – 0.2V See Data Retention Waveform See Data Retention Waveform DATA RETENTION WAVEFORM (CS1 Controlled) tSDR VCC Data Retention Mode tRDR 3.0V 2.2V VDR CS1 ³ VCC CS1 GND - 0.2V DATA RETENTION WAVEFORM (CS2 Controlled) Data Retention Mode VCC tSDR tRDR 3.0 CS2 2.2V VDR 0.4V GND CS2 ≤ 0.2V 10 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 06/20/05 IS62WV2568ALL, IS62WV2568BLL ISSI A2 A A1 ® PLASTIC sTSOP - 32 PINS Package Code: H (Type 1) 1 N E b e D1 D S SEATING PLANE L α C PLASTIC sTSOP (H-TYPE 1) MILLIMETERS Symbol REF. STD N0. Leads A A1 A2 b C D D1 E e L S α — 0.05 0.95 0.17 0.142 13.2 11.7 7.9 0.50 0.30 0.278 0 0 INCHES Min. 32 Max. Notes: 1. Controlling dimension: millimeters, unless otherwise specified. 2. BSC = Basic lead spacing between centers. 3. Dimensions D1 and E do not include mold flash protrusion and should be measured from the bottom of the package. 4. Formed leads shall be planar with respect to one another within 0.004 inches at the seating plane. Min. Max. 1.25 — 1.05 0.23 0.158 13.6 11.9 8.1 BSC 0.70 TYP. 5 0 — 0.002 0.037 0.007 0.0056 0.520 0.461 0.311 0.020 0.012 0.0109 0 0 0.049 — 0.041 0.009 0.0082 0.535 0.469 0.319 BSC 0.028 TYP. 50 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 06/20/05 11 IS62WV2568ALL, IS62WV2568BLL ISSI ® PLASTIC TSOP - 32 PINS Package Code: T (Type 1) 1 E H N D SEATING PLANE S A e B L A1 α C PLASTIC TSOP (T-TYPE 1) Notes: MILLIMETERS Symbol REF. STD N0. Leads A A1 B C D E H e L α — 0.05 0.17 0.12 7.90 18.30 19.80 0.50 0.40 0 0 INCHES Min. 32 Max. Min. Max. 1.20 0.25 0.23 0.17 8.10 18.50 20.20 BSC 0.60 8 0 — 0.002 0.007 0.006 0.308 0.714 0.722 0.020 0.016 0 0 0.047 0.010 0.009 0.014 0.316 0.722 0.788 BSC 0.024 80 1. Controlling dimension: millimeters, unless otherwise specified. 2. BSC = Basic lead spacing between centers. 3. Dimensions D1 and E do not include mold flash protrusion and should be measured from the bottom of the package. 4. Formed leads shall be planar with respect to one another within 0.004 inches at the seating plane. 12 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 06/20/05 IS62WV2568ALL, IS62WV2568BLL ISSI 4 3 2 1 ® Mini Ball Grid Array Package Code: B (36-pin) (6mm x 8mm, 8mm x 10 mm) 6 5 e A B C D D D1 E F G H e E E1 A2 SEATING PLANE A1 A Notes: 1. 2. 3. 4. Controlling dimension: millimeters, unless otherwise specified. BSC = Basic lead spacing between centers. Dimensions D1 and E do not include mold flash protrusion and should be measured from the bottom of the package. Formed leads shall be planar with respect to one another within 0.004 inches at the seating plane. Mini Ball Grid Array - 6mm x 8mm MILLIMETERS Sym. REF. STD N0. Leads A A1 A2 D D1 E E1 e 1.00 0.24 .600 36 — — — 5.25BSC 5.90 6.00 0.75BSC 6.10 .232 3.75BSC 1.35 .030 — 8.10 .039 .009 .023 .311 — — — .314 .206BSC .236 .240 .147BSC .029BSC .053 .011 — .318 Mini Ball Grid Array - 8mm x 10mm MILLIMETER Sym. REF. STD N0. Leads A A1 A2 D D1 E E1 e 7.90 1.00 0.24 .600 36 — — — 5.25BSC 8.00 3.75BSC 0.75BSC 8.10 .311 1.35 0.030 — .039 .009 .023 .389 — — — .393 .206BSC .314 .147BSC .029BSC .318 .053 .011 — .397 INCHES Min. Typ Max. INCHES Min. Typ Max. Min. Typ. Max. Min. Typ. Max. 7.90 8.00 9.90 10.00 10.10 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 06/20/05 13 IS62WV2568ALL, IS62WV2568BLL ISSI ® ORDERING INFORMATION IS62WV2568ALL (1.65V - 2.2V) Commercial Range: 0°C to +70°C Speed (ns) 70 Order Part No. IS62WV2568ALL-70T Package TSOP, TYPE I, Industrial Range: –40°C to +85°C Speed (ns) 70 70 70 Order Part No. IS62WV2568ALL-70TI IS62WV2568ALL-70BI IS62WV2568ALL-70HI Package TSOP, TYPE I mini BGA (6mm x 8mm) sTSOP, TYPE I IS62WV2568BLL (2.5V - 3.6V) Commercial Range: 0°C to +70°C Speed (ns) 70 70 70 Order Part No. IS62WV2568BLL-70T IS62WV2568BLL-70B IS62WV2568BLL-70H Package TSOP, TYPE I mini BGA (6mm x 8mm) sTSOP, TYPE I Industrial Range: –40°C to +85°C Speed (ns) 55 55 55 55 55 55 70 70 70 Order Part No. IS62WV2568BLL-55TI IS62WV2568BLL-55TLI IS62WV2568BLL-55BI IS62WV2568BLL-55BLI IS62WV2568BLL-55HI IS62WV2568BLL-55HLI IS62WV2568BLL-70TI IS62WV2568BLL-70BI IS62WV2568BLL-70HI Package TSOP, TYPE I TSOP, TYPE I, Lead-free mini BGA (6mm x 8mm) mini BGA (6mm x 8mm), Lead-free sTSOP, TYPE I sTSOP, TYPE I, Lead-free TSOP, TYPE I mini BGA (6mm x 8mm) sTSOP, TYPE I 14 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 06/20/05
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