LTC1435A
High Efficiency Low Noise
Synchronous Step-Down
Switching Regulator
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DESCRIPTION
FEATURES
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Dual N-Channel MOSFET Synchronous Drive
Programmable Fixed Frequency
Wide VIN Range: 3.5V to 36V Operation
Low Minimum On-Time (≤ 300ns) for High
Frequency, Low Duty Cycle Applications
Very Low Dropout Operation: 99% Duty Cycle
Low Standby Current
Secondary Feedback Control
Programmable Soft Start
Remote Output Voltage Sense
Logic Controlled Micropower Shutdown: IQ < 25µA
Foldback Current Limiting (Optional)
Current Mode Operation for Excellent Line and Load
Transient Response
Output Voltages from 1.19V to 9V
Available in 16-Lead Narrow SO and SSOP Packages
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APPLICATIONS
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The operating frequency is set by an external capacitor
allowing maximum flexibility in optimizing efficiency. A
secondary winding feedback control pin, SFB, guarantees
regulation regardless of load on the main output by
forcing continuous operation. Burst Mode operation is
inhibited when the SFB pin is pulled low, which reduces
noise and RF interference.
Soft start is provided by an external capacitor that can be
used to properly sequence supplies. The operating current level is user-programmable via an external current
sense resistor. Wide input supply range allows operation
from 3.5V to 30V (36V maximum).
Notebook and Palmtop Computers, PDAs
Cellular Telephones and Wireless Modems
Portable Instruments
Battery-Operated Devices
DC Power Distribution Systems
, LTC and LT are registered trademarks of Linear Technology Corporation.
Burst Mode is a trademark of Linear Technology Corporation.
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The LTC®1435A is a synchronous step-down switching
regulator controller that drives external N-channel power
MOSFETs using a fixed frequency architecture. A wide
duty cycle range of 5% to 99% allows high VIN to low VOUT
DC/DC conversion, as well as low dropout operation that
extends operating time in battery-operated systems. Burst
ModeTM operation provides high efficiency at low load
currents.
TYPICAL APPLICATION
VIN
4.5V TO 22V
COSC
43pF
CSS
0.1µF
CC
330pF
COSC
VIN
RUN/SS
TG
ITH
SW
M1
Si4412DY
SGND
BOOST
+
4.7µF
VOSENSE
SENSE –
BG
RSENSE
0.033Ω
VOUT
1.6V/3A
R1
35.7k
CB
0.1µF
INTVCC
100pF
CIN
22µF
35V
×2
L1
4.7µH
DB
CMDSH-3
LTC1435A
RC
10k
+
M2
Si4412DY
R2
102k
D1
MBRS140T3
OUT
+ C100µF
6.3V
×2
PGND
SENSE +
1000pF
1435A F01
Figure 1. High Efficiency Step-Down Converter
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LTC1435A
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SYMBOL
PARAMETER
Main Control Loop
IIN VOSENSE
Feedback Current
VOSENSE
Feedback Voltage
∆VLINEREG
Reference Voltage Line Regulation
∆VLOADREG
Output Voltage Load Regulation
VSFB
ISFB
VOVL
IQ
Secondary Feedback Threshold
Secondary Feedback Current
Output Overvoltage Lockout
Input DC Supply Current
Normal Mode
Shutdown
VRUN/SS
Run Pin Threshold
IRUN/SS
Soft Start Current Source
∆VSENSE(MAX) Maximum Current Sense Threshold
tON(MIN)
Minimum On-Time
TG Transition Time
Rise Time
Fall Time
BG Transition Time
BG tr
Rise Time
Fall Time
BG t f
Internal VCC Regulator
VINTVCC
Internal VCC Voltage
VLDO INT
INTVCC Load Regulation
VLDO EXT
EXTVCC Voltage Drop
VEXTVCC
EXTVCC Switchover Voltage
TG t r
TG t f
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ELECTRICAL CHARACTERISTICS
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Input Supply Voltage (VIN)......................... 36V to – 0.3V
Topside Driver Supply Voltage (BOOST)....42V to – 0.3V
Switch Voltage (SW)............................. VIN + 5V to – 5V
EXTVCC Voltage ........................................ 10V to – 0.3V
SENSE +, SENSE – Voltages ...... INTVCC + 0.3V to – 0.3V
ITH, VOSENSE Voltages .............................. 2.7V to – 0.3V
SFB, Run/SS Voltages .............................. 10V to – 0.3V
Peak Driver Output Current < 10µs (TG, BG) ............. 2A
INTVCC Output Current ........................................ 50mA
Operating Ambient Temperature Range
LTC1435AC ............................................ 0°C to 70°C
LTC1435AI ......................................... – 40°C to 85°C
Junction Temperature (Note 1)............................. 125°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
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ABSOLUTE MAXIMUM RATINGS
PACKAGE/ORDER INFORMATION
ORDER PART
NUMBER
TOP VIEW
COSC 1
RUN/SS 2
16 TG
15 BOOST
ITH 3
14 SW
SFB 4
13 VIN
SGND 5
12 INTVCC
VOSENSE 6
11 BG
SENSE–
10 PGND
7
SENSE+ 8
LTC1435ACG
LTC1435ACS
LTC1435AIG
LTC1435AIS
9
EXTVCC
G PACKAGE
S PACKAGE
16-LEAD PLASTIC SSOP 16-LEAD PLASTIC SO
TJMAX = 125°C, θJA = 130°C/ W (G)
TJMAX = 125°C, θJA = 110°C/ W (S)
Consult factory for Military grade parts.
TA = 25°C, VIN = 15V, VRUN/SS = 5V unless otherwise noted.
CONDITIONS
TYP
MAX
UNITS
10
1.19
0.002
0.5
– 0.5
1.19
–1
1.28
50
1.202
0.01
0.8
– 0.8
1.22
–2
1.32
nA
V
%/V
%
%
V
µA
V
280
16
1.3
3
150
250
25
2
4.5
180
300
µA
µA
V
µA
mV
ns
CLOAD = 3000pF
CLOAD = 3000pF
50
50
150
150
ns
ns
CLOAD = 3000pF
CLOAD = 3000pF
50
40
150
150
ns
ns
5.0
– 0.2
130
4.7
5.2
–1
230
V
%
mV
V
(Note 2)
(Note 2)
VIN = 3.6V to 20V (Note 2)
ITH Sinking 5µA (Note 2)
ITH Sourcing 5µA
VSFB Ramping Negative
VSFB = 1.5V
MIN
●
1.178
●
●
●
1.16
1.24
EXTVCC = 5V (Note 3)
3.6V < VIN < 30V
VRUN/SS = 0V, 3.6V < VIN < 15V
●
VRUN/SS = 0V
VOSENSE = 0V, 5V
Tested with Square Wave, SENSE – = 1.6V,
∆VSENSE = 20mV (Note 5
)
6V < VIN < 30V, VEXTVCC = 4V
IINTVCC = 15mA, VEXTVCC = 4V
IINTVCC = 15mA, VEXTVCC = 5V
IINTVCC = 15mA, VEXTVCC Ramping Positive
0.8
1.5
130
●
4.8
●
4.5
LTC1435A
ELECTRICAL CHARACTERISTICS
TA = 25°C, VIN = 15V, VRUN/SS = 5V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Oscillator
fOSC
Oscillator Frequency
COSC = 100pF (Note 4)
112
125
138
kHz
The ● denotes specifications which apply over the full operating
temperature range.
LTC1435ACG/LTC1435ACS: 0°C ≤ TA ≤ 70°C
LTC1435AIG/LTC1435AIS: – 40°C ≤ TA ≤ 85°C
Note 1: TJ is calculated from the ambient temperature TA and power
dissipation PD according to the following formula:
LTC1435ACG/LTC1435AIG: TJ = TA + (PD)(130°C/W)
LTC1435ACS/LTC1435AIS: TJ = TA + (PD)(110°C/W)
Note 2: The LTC1435A is tested in a feedback loop which servos VOSENSE
to the balance point for the error amplifier (VITH = 1.19V).
Note 3: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.
Note 4: Oscillator frequency is tested by measuring the COSC charge and
discharge currents and applying the formula:
(
)(
)
8.4(108)
1 + 1 –1
fOSC (kHz) = C
(pF)
+
11
I
OSC
CHG IDIS
Note 5: The minimum on-time test condition corresponds to an inductor
peak-to-peak ripple current ≥ 40% of IMAX (see Minimum On-Time
Considerations in the Applications Information section).
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TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs Input Voltage
VOUT = 3.3V
Efficiency vs Input Voltage
VOUT = 5V
VOUT = 3.3V
VOUT = 5V
90
ILOAD = 1A
ILOAD = 1A
85
ILOAD = 100mA
80
90
EFFICIENCY (%)
EFFICIENCY (%)
90
ILOAD = 100mA
85
80
85
80
75
Burst Mode
OPERATION
70
CONTINUOUS
MODE
65
60
75
75
VIN = 10V
VOUT = 5V
RSENSE = 0.033Ω
95
95
95
EFFICIENCY (%)
Efficiency vs Load Current
100
100
100
55
70
70
0
5
10
15
20
INPUT VOLTAGE (V)
25
0
30
5
10
15
20
INPUT VOLTAGE (V)
50
0.001
30
VIN – VOUT Dropout Voltage
vs Load Current
Load Regulation
VITH Pin Voltage vs Output Current
3.0
RSENSE = 0.033Ω
∆VOUT (%)
0.4
0.3
0.2
0.1
– 0.25
2.5
– 0.50
2.0
VITH (V)
RSENSE = 0.033Ω
VOUT DROP OF 5%
– 0.75
0.5
1.0
1.5
2.0
LOAD CURRENT (A)
2.5
3.0
1435A G04
1.5
Burst Mode
OPERATION
–1.00
1.0
–1.25
0.5
–1.50
0
0
10
1435A G03
0
0.5
1
0.01
0.1
LOAD CURRENT (A)
1435A G02
1435A G01
VIN – VOUT (V)
25
CONTINUOUS
MODE
0
0
0.5
1.0
1.5
2.0
LOAD CURRENT (A)
2.5
3.0
1435A G05
0
10 20 30 40 50 60 70 80 90 100
OUTPUT CURRENT (%)
1435A G06
3
LTC1435A
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TYPICAL PERFORMANCE CHARACTERISTICS
Input Supply and Shutdown
Current vs Input Voltage
100
VOUT = 5V
EXTVCC = VOUT
60
VOUT = 3.3V
EXTVCC = OPEN
1.0
40
0.5
20
200
VEXTVCC = 0V
180
70°C
0
25°C
– 0.3
10
15
20
INPUT VOLTAGE (V)
25°C
120
100
– 55°C
80
60
20
0
5
140
40
SHUTDOWN
0
0
70°C
160
0.3
EXTVCC – INTVCC (mV)
SUPPLY CURRENT (mA)
80
SHUTDOWN CURRENT (µA)
2.0
0.5
∆INTVCC (%)
2.5
1.5
EXTVCC Switch Drop
vs INTVCC Load Current
INTVCC Regulation
vs INTVCC Load Current
25
– 0.5
30
0
0
10
15
5
INTVCC LOAD CURRENT (mA)
1435A G07
20
0
2
4 6 8 10 12 14 16 18 20
INTVCC LOAD CURRENT (mA)
1435A G09
1435A G08
RUN/SS Pin Current
vs Temperature
Normalized Oscillator Frequency
vs Temperature
10
4
5
3
SFB Pin Current vs Temperature
0
fO
–5
SFB CURRENT (µA)
RUN/SS CURRENT (µA)
FREQUENCY (%)
– 0.25
2
– 0.50
– 0.75
–1.00
1
–1.25
–10
– 40 –15
60
35
85
10
TEMPERATURE (°C)
110
135
0
– 40 –15
85
10
35
60
TEMPERATURE (°C)
110
135
–1.50
– 40 –15
60
35
85
10
TEMPERATURE (°C)
1435A G11
1435A G10
Maximum Current Sense
Threshold Voltage vs Temperature
110
135
1435A G12
Transient Response
Transient Response
CURRENT SENSE THRESHOLD (mV)
154
152
VOUT
50mV/DIV
VOUT
50mV/DIV
150
148
ILOAD = 50mA to 1A
146
– 40 –15
85
10
35
60
TEMPERATURE (°C)
110
135
1435A G13
4
1435A G14
ILOAD = 1A to 3A
1435A G15
LTC1435A
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TYPICAL PERFORMANCE CHARACTERISTICS
Soft Start: Load Current vs Time
Burst Mode Operation
VOUT
20mV/DIV
RUN/SS
5V/DIV
INDUCTOR
CURRENT
1A/DIV
VITH
200mV/DIV
ILOAD = 50mA
1435A G16
1435A G17
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PIN FUNCTIONS
COSC (Pin 1): External capacitor COSC from this pin to
ground sets the operating frequency.
RUN/SS (Pin 2): Combination of Soft Start and Run
Control Inputs. A capacitor to ground at this pin sets the
ramp time to full current output. The time is approximately
0.5s/µF. Forcing this pin below 1.3V causes the device to
be shut down. In shutdown all functions are disabled.
ITH (Pin 3): Error Amplifier Compensation Point. The
current comparator threshold increases with this control
voltage. Nominal voltage range for this pin is 0V to 2.5V.
SFB (Pin 4): Secondary Winding Feedback Input. Normally connected to a feedback resistive divider from the
secondary winding. This pin should be tied to: ground to
force continuous operation; INTVCC in applications that
don’t use a secondary winding; and a resistive divider from
the output in applications using a secondary winding.
SGND (Pin 5): Small-Signal Ground. Must be routed
separately from other grounds to the (–) terminal of COUT.
VOSENSE (Pin 6): Receives the feedback voltage from an
external resistive divider across the output.
SENSE – (Pin 7): The (–) Input to the Current Comparator.
SENSE + (Pin 8): The (+) Input to the Current Comparator.
Built-in offsets between SENSE– and SENSE+ pins in
conjunction with RSENSE set the current trip thresholds.
EXTVCC (Pin 9): Input to the Internal Switch Connected to
INTVCC. This switch closes and supplies VCC power when-
ever EXTVCC is higher than 4.7V. See EXTVCC connection
in Applications Information section. Do not exceed 10V on
this pin. Connect to VOUT if VOUT ≥ 5V.
PGND (Pin 10): Driver Power Ground. Connects to source
of bottom N-channel MOSFET and the (–) terminal of CIN.
BG (Pin 11): High Current Gate Drive for Bottom
N-Channel MOSFET. Voltage swing at this pin is from
ground to INTVCC.
INTVCC (Pin 12): Output of the Internal 5V Regulator and
EXTVCC Switch. The driver and control circuits are powered from this voltage. Must be closely decoupled to power
ground with a minimum of 2.2µF tantalum or electrolytic
capacitor.
VIN (Pin 13): Main Supply Pin. Must be closely decoupled
to the IC’s signal ground pin.
SW (Pin 14): Switch Node Connection to Inductor. Voltage swing at this pin is from a Schottky diode (external)
voltage drop below ground to VIN.
BOOST (Pin 15): Supply to Topside Floating Driver. The
bootstrap capacitor is returned to this pin. Voltage swing
at this pin is from INTVCC to VIN + INTVCC.
TG (Pin 16): High Current Gate Drive for Top N-Channel
MOSFET. This is the output of a floating driver with a
voltage swing equal to INTVCC superimposed on the
switch node voltage SW.
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LTC1435A
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FUNCTIONAL DIAGRA
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VIN
+
CIN
COSC
1 COSC
4 SFB
13 VIN
SGND 5
INTVCC
1.19V
REF
1µA
DB
BOOST
15
–
1.19V
CB
+
SHUTDOWN
OSC
+
TG
16
DROP
OUT
DET
OV
S
Q
R
–
1.28V
0.6V
SWITCH
LOGIC
+
–
VOSENSE
6
VFB
–
–
I1
EA
R2
+
Ω
1.19V
gm = 1m
180k
VSEC
D1
4k
+
SW
14
I2
–
+
VIN
+
INTVCC
INTVCC
CSEC
+
12
+
R1
5V
LDO
REG
–
SHUTDOWN
3µA
RUN
SOFT
START
6V
+
4.8V
30k
BG
11
8k
VOUT
–
RC
2 RUN/SS
CSS
3 ITH
CC
SENSE+ 8
7 SENSE
DFB*
–
9 EXTVCC
COUT
PGND
10
+
RSENSE
1435A • FD
* FOLDBACK CURRENT LIMITING OPTION
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OPERATION
(Refer to Functional Diagram)
Main Control Loop
The LTC1435A uses a constant frequency, current mode
step-down architecture. During normal operation, the top
MOSFET is turned on each cycle when the oscillator sets
the RS latch, and turned off when the main current comparator I1 resets the RS latch. The peak inductor current at
which I1 resets the RS latch is controlled by the voltage on
the ITH pin , which is the output of error amplifier EA. The
VOSENSE pin, described in the Pin Functions section, allows
EA to receive an output feedback voltage VFB from an external resistive divider. When the load current increases,
it causes a slight decrease in VFB relative to the 1.19V ref-
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erence, which in turn causes the ITH voltage to increase until
the average inductor current matches the new load current.
While the top MOSFET is off, the bottom MOSFET is turned
on until either the inductor current starts to reverse, as
indicated by current comparator I2, or the beginning of the
next cycle.
The top MOSFET driver is biased from floating bootstrap
capacitor CB, which normally is recharged during each off
cycle. However, when VIN decreases to a voltage close to
VOUT, the loop may enter dropout and attempt to turn on
the top MOSFET continuously. The dropout detector counts
the number of oscillator cycles that the top MOSFET remains
LTC1435A
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OPERATION
(Refer to Functional Diagram)
on and periodically forces a brief off period to allow CB to
recharge.
either of which causes drive to be returned to the TG pin
on the next cycle.
The main control loop is shut down by pulling the RUN/SS
pin low. Releasing RUN/SS allows an internal 3µA current
source to charge soft start capacitor CSS. When CSS reaches
1.3V, the main control loop is enabled with the ITH voltage
clamped at approximately 30% of its maximum value. As
CSS continues to charge, ITH is gradually released allowing
normal operation to resume.
Two conditions can force continuous synchronous operation, even when the load current would otherwise dictate
low current operation. One is when the common mode
voltage of the SENSE+ and SENSE – pins is below 1.4V and
the other is when the SFB pin is below 1.19V. The latter
condition is used to assist in secondary winding regulation
as described in the Applications Information section.
Comparator OV guards against transient overshoots
> 7.5% by turning off the top MOSFET and keeping it off
until the fault is removed.
INTVCC/EXTVCC Power
Low Current Operation
The LTC1435A is capable of Burst Mode operation in which
the external MOSFETs operate intermittently based on load
demand. The transition to low current operation begins
when comparator I2 detects current reversal and turns off
the bottom MOSFET. If the voltage across RSENSE does not
exceed the hysteresis of I2 (approximately 20mV) for one
full cycle, then on following cycles the top and bottom drives
are disabled. This continues until an inductor current peak
exceeds 20mV/RSENSE or the ITH voltage exceeds 0.6V,
Power for the top and bottom MOSFET drivers and most
of the other LTC1435A circuitry is derived from the INTVCC
pin. The bottom MOSFET driver supply pin is internally
connected to INTVCC in the LTC1435A. When the EXTVCC
pin is left open, an internal 5V low dropout regulator
supplies INTVCC power. If EXTVCC is taken above 4.8V, the
5V regulator is turned off and an internal switch is turned
on to connect EXTVCC to INTVCC. This allows the INTVCC
power to be derived from a high efficiency external source
such as the output of the regulator itself or a secondary
winding, as described in the Applications Information
section.
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APPLICATIONS INFORMATION
The basic LTC1435A application circuit is shown in Figure
1, High Efficiency Step-Down Converter. External component selection is driven by the load requirement and begins
with the selection of RSENSE. Once RSENSE is known, COSC
and L can be chosen. Next, the power MOSFETs and D1 are
selected. Finally, CIN and COUT are selected. The circuit
shown in Figure 1 can be configured for operation up to an
input voltage of 28V (limited by the external MOSFETs).
RSENSE Selection for Output Current
RSENSE is chosen based on the required output current. The
LTC1435A current comparator has a maximum threshold
of 150mV/RSENSE and an input common mode range of
SGND to INTVCC. The current comparator threshold sets
the peak of the inductor current, yielding a maximum average output current IMAX equal to the peak value less half
the peak-to-peak ripple current ∆IL.
Allowing a margin for variations in the LTC1435A and
external component values yields:
RSENSE =
100mV
IMAX
The LTC1435A works well with RSENSE values ≥ 0.005Ω.
COSC Selection for Operating Frequency
The LTC1435A uses a constant frequency architecture with
the frequency determined by an external oscillator capacitor COSC. Each time the topside MOSFET turns on, the
voltage COSC is reset to ground. During the on-time, COSC
is charged by a fixed current. When the voltage on the capacitor reaches 1.19V, COSC is reset to ground. The process
then repeats.
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LTC1435A
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APPLICATIONS INFORMATION
The value of COSC is calculated from the desired operating
frequency:
1.37(104 )
– 11
COSC (pF) =
Frequency (kHz)
A graph for selecting COSC vs frequency is given in Figure
2. As the operating frequency is increased the gate charge
losses will be higher, reducing efficiency (see Efficiency
Considerations). The maximum recommended switching
frequency is 400kHz.
300
The inductor value also has an effect on low current operation. The transition to low current operation begins when
the inductor current reaches zero while the bottom MOSFET
is on. Lower inductor values (higher ∆IL) will cause this to
occur at higher load currents, which can cause a dip in
efficiency in the upper range of low current operation. In
Burst Mode operation, lower inductance values will cause
the burst frequency to decrease.
The Figure 3 graph gives a range of recommended inductor values vs operating frequency and VOUT.
250
200
60
150
50
100
50
0
0
100
200
300
400
OPERATING FREQUENCY (kHz)
500
INDUCTOR VALUE (µH)
COSC VALUE (pF)
greater core losses. A reasonable starting point for setting
ripple current is ∆IL = 0.4(IMAX). Remember, the maximum
∆IL occurs at the maximum input voltage.
VOUT = 5.0V
VOUT = 3.3V
VOUT ≤ 2.5V
40
30
20
10
1435A F02
0
Figure 2. Timing Capacitor Value
0
250
100
150
200
50
OPERATING FREQUENCY (kHz)
Inductor Value Calculation
The operating frequency and inductor selection are interrelated in that higher operating frequencies allow the use
of smaller inductor and capacitor values. So why would
anyone ever choose to operate at lower frequencies with
larger components? The answer is efficiency. A higher
frequency generally results in lower efficiency because of
MOSFET gate charge losses. In addition to this basic tradeoff, the effect of inductor value on ripple current and low
current operation must also be considered.
The inductor value has a direct effect on ripple current. The
inductor ripple current ∆IL decreases with higher inductance or frequency and increases with higher VIN or VOUT:
V
1
∆IL =
VOUT 1– OUT
VIN
( f)(L)
Accepting larger values of ∆IL allows the use of low inductances, but results in higher output voltage ripple and
8
300
1435A F03
Figure 3. Recommended Inductor Values
For low duty cycle, high frequency applications where the
required minimum on-time,
tON(MIN) =
(V
VOUT
IN(MAX )
)(f)
,
is less than 350ns, there may be further restrictions on the
inductance to ensure proper operation. See Minimum OnTime Considerations section for more details.
Inductor Core Selection
Once the value for L is known, the type of inductor must be
selected. High efficiency converters generally cannot afford
the core loss found in low cost powdered iron cores, forcing the use of more expensive ferrite, molypermalloy or Kool
Mµ® cores. Actual core loss is independent of core size for
Kool Mµ is a registered trademark of Magnetics, Inc.
LTC1435A
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APPLICATIONS INFORMATION
a fixed inductor value, but it is very dependent on inductance selected. As inductance increases, core losses go
down. Unfortunately, increased inductance requires more
turns of wire and therefore copper losses will increase.
Ferrite designs have very low core loss and are preferred
at high switching frequencies, so design goals can
concentrate on copper loss and preventing saturation.
Ferrite core material saturates “hard,” which means that inductance collapses abruptly when the peak design current
is exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do not
allow the core to saturate!
Molypermalloy (from Magnetics, Inc.) is a very good, low
loss core material for toroids, but it is more expensive than
ferrite. A reasonable compromise from the same manufacturer is Kool Mµ. Toroids are very space efficient, especially
when you can use several layers of wire. Because they
generally lack a bobbin, mounting is more difficult. However, designs for surface mount are available which do not
increase the height significantly.
Power MOSFET and D1 Selection
Two external power MOSFETs must be selected for use with
the LTC1435A: an N-channel MOSFET for the top (main)
switch and an N-channel MOSFET for the bottom (synchronous) switch.
The peak-to-peak gate drive levels are set by the INTVCC
voltage. This voltage is typically 5V during start-up (see
EXTVCC Pin Connection). Consequently, logic level threshold MOSFETs must be used in most LTC1435A applications.
The only exception is applications in which EXTVCC is
powered from an external supply greater than 8V (must be
less than 10V), in which standard threshold MOSFETs
(VGS(TH) < 4V) may be used. Pay close attention to the BVDSS
specification for the MOSFETs as well; many of the logic level
MOSFETs are limited to 30V or less.
Selection criteria for the power MOSFETs include the “ON”
resistance RDS(ON), reverse transfer capacitance CRSS, input voltage and maximum output current. When the
LTC1435A is operating in continuous mode the duty cycles
for the top and bottom MOSFETs are given by:
V
Main Switch Duty Cycle = OUT
VIN
(V − V )
Synchronous Switch Duty Cycle = IN OUT
VIN
The MOSFET power dissipations at maximum output current are given by:
V
2
PMAIN = OUT (IMAX ) (1 + δ )RDS(ON) +
VIN
k(VIN )
1.85
(IMAX )(CRSS )( f)
V −V
2
PSYNC = IN OUT (IMAX ) (1 + δ )RDS(ON)
VIN
where δ is the temperature dependency of RDS(ON) and k
is a constant inversely related to the gate drive current.
Both MOSFETs have I2R losses while the topside
N-channel equation includes an additional term for transition losses, which are highest at high input voltages.
For VIN < 20V the high current efficiency generally improves with larger MOSFETs, while for VIN > 20V the
transition losses rapidly increase to the point that the use
of a higher RDS(ON) device with lower CRSS actual provides higher efficiency. The synchronous MOSFET losses
are greatest at high input voltage or during a short circuit
when the duty cycle in this switch is nearly 100%. Refer
to the Foldback Current Limiting section for further applications information.
The term (1 + δ) is generally given for a MOSFET in the form
of a normalized R DS(ON) vs Temperature curve, but
δ = 0.005/°C can be used as an approximation for low
voltage MOSFETs. CRSS is usually specified in the MOSFET
characteristics. The constant k = 2.5 can be used to estimate the contributions of the two terms in the main switch
dissipation equation.
The Schottky diode D1 shown in Figure 1 conducts during
the dead-time between the conduction of the two large
power MOSFETs. This prevents the body diode of the bottom MOSFET from turning on and storing charge during the
dead-time, which could cost as much as 1% in efficiency.
A 1A Schottky is generally a good size for 3A regulators.
9
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CIN and COUT Selection
In continuous mode, the source current of the top
N-channel MOSFET is a square wave of duty cycle VOUT/
VIN. To prevent large voltage transients, a low ESR input
capacitor sized for the maximum RMS current must be
used. The maximum RMS capacitor current is given by:
CIN required IRMS ≈ IMAX
[
(
VOUT VIN − VOUT
)]
1/ 2
VIN
This formula has a maximum at V IN = 2V OUT , where
IRMS = IOUT/2. This simple worst-case condition is commonly used for design because even significant deviations
do not offer much relief. Note that capacitor manufacturer’s
ripple current ratings are often based on only 2000 hours
of life. This makes it advisable to further derate the capacitor or to choose a capacitor rated at a higher temperature
than required. Several capacitors may also be paralleled to
meet size or height requirements in the design. Always
consult the manufacturer if there is any question.
The selection of COUT is driven by the required effective
series resistance (ESR). Typically, once the ESR requirement is satisfied the capacitance is adequate for filtering.
The output ripple (∆VOUT) is approximated by:
1
∆VOUT ≈ ∆IL ESR +
4 fC OUT
where f = operating frequency, COUT = output capacitance
and ∆IL= ripple current in the inductor. The output ripple
is highest at maximum input voltage since ∆IL increases
with input voltage. With ∆IL = 0.4IOUT(MAX) the output ripple
will be less than 100mV at max VIN assuming:
COUT required ESR < 2RSENSE
Manufacturers such as Nichicon, United Chemicon and
Sanyo should be considered for high performance throughhole capacitors. The OS-CON semiconductor dielectric
capacitor available from Sanyo has the lowest ESR(size)
product of any aluminum electrolytic at a somewhat
higher price. Once the ESR requirement for COUT has been
met, the RMS current rating generally far exceeds the
IRIPPLE(P-P) requirement.
10
In surface mount applications multiple capacitors may have
to be paralleled to meet the ESR or RMS current handling
requirements of the application. Aluminum electrolytic and
dry tantalum capacitors are both available in surface mount
configurations. In the case of tantalum, it is critical that the
capacitors are surge tested for use in switching power
supplies. An excellent choice is the AVX TPS series of
surface mount tantalum, available in case heights ranging
from 2mm to 4mm. Other capacitor types include Sanyo
OS-CON, Nichicon PL series and Sprague 593D and 595D
series. Consult the manufacturer for other specific recommendations.
INTVCC Regulator
An internal P-channel low dropout regulator produces the
5V supply that powers the drivers and internal circuitry
within the LTC1435A. The INTVCC pin can supply up to
15mA and must be bypassed to ground with a minimum
of 2.2µF tantalum or low ESR electrolytic. Good bypassing
is necessary to supply the high transient currents required
by the MOSFET gate drivers.
High input voltage applications, in which large MOSFETs
are being driven at high frequencies, may cause the maximum junction temperature rating for the LTC1435A to be
exceeded. The IC supply current is dominated by the gate
charge supply current when not using an output derived
EXTVCC source. The gate charge is dependent on operating frequency as discussed in the Efficiency Considerations
section. The junction temperature can be estimated by using
the equations given in Note 1 of the Electrical Characteristics. For example, the LTC1435A is limited to less than
17mA from a 30V supply:
TJ = 70°C + (17mA)(30V)(100°C/W) = 126°C
To prevent maximum junction temperature from being
exceeded, the input supply current must be checked when
operating in continuous mode at maximum VIN.
EXTVCC Connection
The LTC1435A contains an internal P-channel MOSFET
switch connected between the EXTVCC and INTVCC pins. The
switch closes and supplies the INTVCC power whenever the
EXTVCC pin is above 4.8V, and remains closed until EXTVCC
drops below 4.5V. This allows the MOSFET driver and
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control power to be derived from the output during normal
operation (4.8V < VOUT < 9V) and from the internal regulator when the output is out of regulation (start-up, short
circuit). Do not apply greater than 10V to the EXTVCC pin
and ensure that EXTVCC < VIN.
Significant efficiency gains can be realized by powering
INTVCC from the output, since the VIN current resulting from
the driver and control currents will be scaled by a factor of
Duty Cycle/Efficiency. For 5V regulators this supply means
connecting the EXTVCC pin directly to VOUT. However, for
3.3V and other lower voltage regulators, additional circuitry
is required to derive INTVCC power from the output.
+
1N4148
VIN
OPTIONAL
EXT VCC
CONNECTION
5V ≤ VSEC ≤ 9V
R6
4. EXTVCC connected to an external supply. If an external
supply is available in the 5V to 10V range (EXTVCC ≤ VIN),
it may be used to power EXTVCC providing it is compatible with the MOSFET gate drive requirements. When
driving standard threshold MOSFETs, the external supply must always be present during operation to prevent
MOSFET failure due to insufficient gate drive.
Topside MOSFET Driver Supply (CB, DB)
An external bootstrap capacitor CB connected to the Boost
pin supplies the gate drive voltage for the topside MOSFET.
Capacitor CB in the Functional Diagram is charged through
diode DB from INTVCC when the SW pin is low. When the
VSEC
+
L1
1:N
1µF
RSENSE
EXTVCC
VOUT
+
LTC1435A
COUT
SW
SFB
BG
R5
SGND
N-CH
PGND
1435A F04a
Figure 4a. Secondary Output Loop and EXTVCC Connection
+
+
VIN
1µF
CIN
1. EXTVCC left open (or grounded). This will cause INTVCC
to be powered from the internal 5V regulator resulting
in an efficiency penalty of up to 10% at high input voltages.
3. EXTVCC connected to an output-derived boost network.
For 3.3V and other low voltage regulators, efficiency
gains can still be realized by connecting EXTVCC to an
output-derived voltage which has been boosted to
greater than 4.8V. This can be done with either the inductive boost winding as shown in Figure 4a or the
capacitive charge pump shown in Figure 4b. The charge
pump has the advantage of simple magnetics.
N-CH
TG
The following list summarizes the four possible connections
for EXTVCC:
2. EXTVCC connected directly to VOUT. This is the normal
connection for a 5V regulator and provides the highest
efficiency.
VIN
CIN
BAT85
0.22µF
BAT85
VIN
TG
BAT85
N-CH
EXTVCC
VN2222LL
L1
RSENSE
VOUT
LTC1435A
+
SW
BG
COUT
N-CH
1435A F04b
PGND
Figure 4b. Capacitive Charge Pump for EXTVCC
topside MOSFET is to be turned on, the driver places the
CB voltage across the gate source of the MOSFET. This enhances the MOSFET and turns on the topside switch. The
switch node voltage SW rises to VIN and the Boost pin rises
to VIN + INTVCC. The value of the boost capacitor CB needs
to be 100 times greater than the total input capacitance of
the topside MOSFET. In most applications 0.1µF is adequate. The reverse breakdown on DB must be greater than
VIN(MAX).
Output Voltage Programming
The output voltage is set by a resistive divider according
to the following formula:
R2
VOUT = 1.19V 1 + , VOUT ≥ 1.19 V
R1
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The external resistive divider is connected to the output as
shown in Figure 5 allowing remote voltage sensing.
1.19V ≤ VOUT ≤ 9V
R2
VOSENSE
100pF
LTC1435A
SGND
R1
1435A F05
Figure 5. Setting the LTC1435A Output Voltage
Run/ Soft Start Function
The RUN/SS pin is a dual purpose pin that provides the soft
start function and a means to shut down the LTC1435A. Soft
start reduces surge currents from VIN by gradually increasing the internal current limit. Power supply sequencing can
also be accomplished using this pin.
An internal 3µA current source charges up an external
capacitor CSS. When the voltage on RUN/SS reaches 1.3V
the LTC1435A begins operating. As the voltage on RUN/SS
continues to ramp from 1.3V to 2.4V, the internal current
limit is also ramped at a proportional linear rate. The current limit begins at approximately 50mV/RSENSE (at VRUN/
SS = 1.3V) and ends at 150mV/RSENSE (VRUN/SS > 2.7V). The
output current thus ramps up slowly, charging the output
capacitor. If RUN/SS has been pulled all the way to ground
there is a delay before starting of approximately 500ms/µF,
followed by an additional 500ms/µF to reach full current.
tDELAY = 5(10 5)CSS Seconds
Pulling the RUN/SS pin below 1.3V puts the LTC1435A into
a low quiescent current shutdown (IQ < 25µA). This pin can
be driven directly from logic as shown in Figure 6. Diode
D1 in Figure 6 reduces the start delay but allows CSS to ramp
up slowly for the soft start function; this diode and CSS can
be deleted if soft start is not needed. The RUN/SS pin has
an internal 6V Zener clamp (See Functional Diagram).
3.3V OR 5V
RUN/SS
RUN/SS
D1
CSS
CSS
1435 F06
Figure 6. RUN/SS Pin Interfacing
12
Foldback Current Limiting
As described in Power MOSFET and D1 Selection, the worstcase dissipation for either MOSFET occurs with a shortcircuited output, when the synchronous MOSFET conducts
the current limit value almost continuously. In most applications this will not cause excessive heating, even for
extended fault intervals. However, when heat sinking is at
a premium or higher RDS(ON) MOSFETs are being used,
foldback current limiting should be added to reduce the
current in proportion to the severity of the fault.
Foldback current limiting is implemented by adding diode
DFB between the output and the ITH pin as shown in the
Functional Diagram. In a hard short (VOUT = 0V) the current will be reduced to approximately 25% of the maximum
output current. This technique may be used for all applications with regulated output voltages of 1.8V or greater.
SFB Pin Operation
When the SFB pin drops below its ground referenced 1.19V
threshold, continuous mode operation is forced. In continuous mode, the large N-channel main and synchronous
switches are used regardless of the load on the main output.
In addition to providing a logic input to force continuous
synchronous operation, the SFB pin provides a means to
regulate a flyback winding output. Continuous synchronous
operation allows power to be drawn from the auxiliary
windings without regard to the primary output load. The SFB
pin provides a way to force continuous synchronous operation as needed by the flyback winding.
The secondary output voltage is set by the turns ratio of the
transformer in conjunction with a pair of external resistors
returned to the SFB pin as shown in Figure 4a. The secondary regulated voltage, VSEC, in Figure 4a is given by:
R6
VSEC ≈ (N + 1)VOUT > 1.19 1 +
R5
where N is the turns ratio of the transformer and VOUT is
the main output voltage sensed by VOSENSE.
Minimum On-Time Considerations
Minimum on-time, tON(MIN), is the smallest amount of time
that the LTC1435A is capable of turning the top MOSFET
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on and off again. It is determined by internal timing delays
and the gate charge required to turn on the top MOSFET.
Low duty cycle applications may approach this minimum
on-time limit. If the duty cycle falls below what can be
accommodated by the minimum on-time, the LTC1435A
will begin to skip cycles. The output voltage will continue
to be regulated, but the ripple current and ripple voltage will
increase. Therefore this limit should be avoided.
The minimum on-time for the LTC1435A in a properly
configured application is less than 300ns but increases at
low ripple current amplitudes (see Figure 7). If an application is expected to operate close to the minimum on-time
limit, an inductor value must be chosen that is low enough
to provide sufficient ripple amplitude to meet the minimum
on-time requirement. To determine the proper value, use
the following procedure:
1. Calculate on-time at maximum supply, t ON(MIN) =
(1/f)(VOUT/VIN(MAX)).
2. Use Figure 7 to obtain the peak-to-peak inductor ripple
current as a percentage of IMAX necessary to achieve the
calculated tON(MIN).
3. Ripple amplitude ∆IL(MIN) = (% from Figure 7)(IMAX)
where IMAX = 0.1/RSENSE.
VIN(MAX ) – VOUT
4. LMAX = tON(MIN)
∆IL(MIN)
Choose an inductor less than or equal to the calculated LMAX
to ensure proper operation.
MINIMUM ON-TIME (ns)
400
350
RECOMMENDED
REGION FOR MIN
ON-TIME AND
MAX EFFICIENCY
300
250
200
0
50
60
70
10
20
30
40
INDUCTOR RIPPLE CURRENT (% OF IMAX)
1435A F07
Figure 7. Minimum On-Time vs Inductor Ripple Current
Because of the sensitivity of the LTC1435A current comparator when operating close to the minimum on-time limit,
it is important to prevent stray magnetic flux generated by
the inductor from inducing noise on the current sense resistor, which may occur when axial type cores are used. By
orienting the sense resistor on the radial axis of the inductor (see Figure 8), this noise will be minimized.
INDUCTOR
L
1435A F08
Figure 8. Allowable Inductor/RSENSE Layout Orientations
Efficiency Considerations
The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the efficiency and which change would produce the
most improvement. Efficiency can be expressed as:
Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC1435A circuits. LTC1435A VIN current, INTVCC
current, I2R losses, and topside MOSFET transition losses.
1. The VIN current is the DC supply current given in the
electrical characteristics which excludes MOSFET driver
and control currents. V IN current results in a small
(< 1%) loss which increases with VIN.
2. INTVCC current is the sum of the MOSFET driver and
control currents. The MOSFET driver current results from
switching the gate capacitance of the power MOSFETs.
Each time a MOSFET gate is switched from low to high
to low again, a packet of charge dQ moves from INTVCC
to ground. The resulting dQ/dt is a current out of INTVCC
that is typically much larger than the control circuit current. In continuous mode, IGATECHG = f(QT + QB), where
QT and QB are the gate charges of the topside and bottom side MOSFETs.
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By powering EXTVCC from an output-derived source, the
additional VIN current resulting from the driver and
control currents will be scaled by a factor of
Duty Cycle/Efficiency. For example, in a 20V to 5V application, 10mA of INTVCC current results in approximately 3mA of VIN current. This reduces the midcurrent
loss from 10% or more (if the driver was powered directly from VIN) to only a few percent.
3. I2R losses are predicted from the DC resistances of the
MOSFET, inductor and current shunt. In continuous
mode the average output current flows through L and
RSENSE, but is “chopped” between the topside main
MOSFET and the synchronous MOSFET. If the two
MOSFETs have approximately the same RDS(ON), then
the resistance of one MOSFET can simply be summed
with the resistances of L and RSENSE to obtain I2R
losses. For example, if each R DS(ON) = 0.05Ω,
RL = 0.15Ω, and RSENSE = 0.05Ω, then the total resistance is 0.25Ω. This results in losses ranging from 3%
to 10% as the output current increases from 0.5A to
2A. I2R losses cause the efficiency to drop at high output
currents.
4. Transition losses apply only to the topside MOSFET(s),
and only when operating at high input voltages (typically
20V or greater). Transition losses can be estimated from:
Transition Loss = 2.5 (VIN)1.85(IMAX)(CRSS)(f)
Other losses, including CIN and COUT ESR dissipative
losses, Schottky conduction losses during dead-time,
and inductor core losses, generally account for less than
2% total additional loss.
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take several cycles to respond to a step in DC (resistive) load current. When a load step occurs, VOUT immediately shifts by
an amount equal to (∆ILOAD)(ESR), where ESR is the effective series resistance of COUT. ∆ILOAD also begins to
charge or discharge COUT which generates a feedback error
signal. The regulator loop then acts to return VOUT to its
steady-state value. During this recovery time VOUT can be
monitored for overshoot or ringing, which would indicate
a stability problem. The ITH external components shown in
14
the Figure 1 circuit will provide adequate compensation for
most applications.
A second, more severe transient is caused by switching in
loads with large (>1µF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with COUT, causing a rapid drop in VOUT. No regulator can
deliver enough current to prevent this problem if the load
switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
the load rise time is limited to approximately (25)(CLOAD).
Thus a 10µF capacitor would require a 250µs rise time,
limiting the charging current to about 200mA.
Automotive Considerations:
Plugging into the Cigarette Lighter
As battery-powered devices go mobile, there is a natural
interest in plugging into the cigarette lighter in order to
conserve or even recharge battery packs during operation.
But before you connect, be advised: you are plugging into
the supply from hell. The main battery line in an automobile is the source of a number of nasty potential transients,
including load dump, reverse battery and double battery.
Load dump is the result of a loose battery cable. When the
cable breaks connection, the field collapse in the alternator
can cause a positive spike as high as 60V which takes several
hundred milliseconds to decay. Reverse battery is just what
it says, while double battery is a consequence of tow truck
operators finding that a 24V jump start cranks cold engines
faster than 12V.
The network shown in Figure 9 is the most straightforward
approach to protect a DC/DC converter from the ravages
of an automotive battery line. The series diode prevents
current from flowing during reverse battery, while the
transient suppressor clamps the input voltage during load
dump. Note that the transient suppressor should not
12V
50A IPK RATING
VIN
TRANSIENT VOLTAGE
SUPPRESSOR
GENERAL INSTRUMENT
1.5KA24A
LTC1435A
1435A F09
Figure 9. Automotive Application Protection
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conduct during double battery operation, but must still
clamp the input voltage below breakdown of the converter.
Although the LTC1435A has a maximum input voltage of
36V, most applications will be limited to 30V by the
MOSFET BVDSS.
Design Example
As a design example, assume VIN = 12V(nominal), VIN =
22V(max), VOUT = 1.6V, IMAX = 3A and f = 250kHz, RSENSE
and COSC can immediately be calculated:
COSC = 1.37(104)/250 – 11 = 43pF
Referring to Figure 3, a 4.7µH inductor falls within the recommended range. To check the actual value of the ripple
current the following equation is used:
V
V
∆IL = OUT 1– OUT
( f)(L) VIN
The highest value of the ripple current occurs at the maximum input voltage:
1.6V
1.6V
∆IL =
1–
= 1.3A
250kHz 4.7µH 22V
)
The lowest duty cycle also occurs at maximum input voltage. The on-time during this condition should be checked
to make sure it doesn’t violate the LTC1435A’s minimum
on-time and cause cycle skipping to occur. The required ontime at VIN(MAX) is:
tON(MIN) =
(
VOUT
=
1.6V
)( ) ( )(
VIN(MAX ) f
22V 250kHz
1.6V
3
22V
2
1.85
The most stringent requirement for the synchronous
N-channel MOSFET occurs when VOUT = 0 (i.e. short circuit). In this case the worst-case dissipation rises to:
(
PSYNC = ISC( AVG)
) (1+ δ ) RDS(ON)
2
With the 0.033Ω sense resistor ISC(AVG) = 4A will result,
increasing the Si4412DY dissipation to 950mW at a die temperature of 105°C.
RSENSE = 100mV/3A = 0.033Ω
(
( ) [1+ (0.005)(50°C − 25°C)](0.042Ω)
+ 2.5 (22V ) (3A )(100pF )(250kHz) = 88 mW
PMAIN =
)
= 291ns
The ∆IL was previously calculated to be 1.3A, which is 43%
of IMAX. From Figure 7, the LTC1435A minimum on-time
at 43% ripple is about 235ns. Therefore, the minimum ontime is sufficient and no cycle skipping will occur.
The power dissipation on the topside MOSFET can be easily
estimated. Choosing a Siliconix Si4412DY results in:
RDS(ON) = 0.042Ω, CRSS = 100pF. At maximum input voltage with T(estimated) = 50°C:
CIN is chosen for an RMS current rating of at least 1.5A at
temperature. COUT is chosen with an ESR of 0.03Ω for low
output ripple. The output ripple in continuous mode will be
highest at the maximum input voltage. The output voltage
ripple due to ESR is approximately:
VORIPPLE = RESR(∆IL) = 0.03Ω(1.3A) = 39mVP-P
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1435A. These items are also illustrated graphically in
the layout diagram of Figure 10. Check the following in your
layout:
1. Are the signal and power grounds segregated? The
LTC1435A signal ground pin must return to the (–) plate
of COUT. The power ground connects to the source of the
bottom N-channel MOSFET, anode of the Schottky diode, and (–) plate of CIN, which should have as short lead
lengths as possible.
2. Does the VOSENSE pin connect directly to the feedback
resistors? The resistive divider R1, R2 must be connected between the (+) plate of COUT and signal ground.
The 100pF capacitor should be as close as possible to
the LTC1435A.
3. Are the SENSE – and SENSE + leads routed together with
minimum PC trace spacing? The filter capacitor between
SENSE + and SENSE – should be as close as possible to
the LTC1435A.
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4. Does the (+) plate of CIN connect to the drain of the
topside MOSFET(s) as closely as possible? This capacitor provides the AC current to the MOSFET(s).
6. Keep the switching node SW away from sensitive smallsignal nodes. Ideally the switch node should be placed
at the furthest point from the LTC1435A.
5. Is the INTVCC decoupling capacitor connected closely
between INTVCC and the power ground pin? This capacitor carries the MOSFET driver peak currents.
7. SGND should be exclusively used for grounding external components on COSC, ITH, VOSENSE and SFB pins.
8. If operating close to the minimum on-time limit, is the
sense resistor oriented on the radial axis of the inductor? See Figure 8.
+
M1
1
CSS
COSC
2
CIN
15
BOOST
VIN
CC1
RC
16
TG
RUN/SS
+
COSC
3
CC2
ITH
4
LTC1435A
SFB
5
14
SW
13
VIN
INTVCC
SGND
DB
VOSENSE
BG
7
SENSE –
PGND
8
SENSE +
EXTVCC
D1
–
100pF
6
CB
0.1µF
12
+
11
M2
4.7µF
10
1000pF
9
L1
–
R1
+
R2
COUT
VOUT
RSENSE
BOLD LINES INDICATE
HIGH CURRENT PATHS
+
1435A F10
Figure 10. LTC1435A Layout Diagram
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TYPICAL APPLICATIONS
Intel Mobile CPU VID Power Converter
1
COSC
43pF
2
CSS
0.1µF
3
CC
1000pF
CC2
220pF
COSC
VIN
RUN/SS
TG
ITH
SW
INTVCC
50pF
6
SGND
BOOST
VOSENSE
SENSE –
7
BG
PGND
SENSE +
1000pF
8
VIN
4.5V TO 22V
16
CF
0.1µF
14
DB
CMDSH-3
LTC1435A
RC
10k
5
4.7Ω
13
12
M1
Si4410
+
CIN
10µF
30V
×2
RSENSE
0.015Ω
VOUT
1.3V TO 2.0V
7A
L1
3.3µH
3
0.22µF
15
5
+
11
10
4.7µF
M2
Si4410
D1
MBRS140T3
6
VCC
LTC1706-19
FB
VID
0 1 2 3 GND
7 8 1 2
FROM µP
1435A TA07
16
SENSE
4
+
COUT
820µF
4V
×2
LTC1435A
U
TYPICAL APPLICATIONS
Dual Output 5V and Synchronous 12V Application
VIN
5.4V TO 28V
COSC
68pF
1
CSS
0.1µF
RC
10k
2
CC1
470pF
3
CC2
51pF
4
COSC
TG
RUN/SS
BOOST
ITH
SW
SFB
VIN
LTC1435A
5
M1
Si4412DY
14
T1
10µH
1:1.42
13
7
VOSENSE
BG
SENSE –
PGND
0.1µF
12
+
RSENSE
0.033Ω
+
100pF
6
IRLL014
4.7k
15
CMDSH-3
INTVCC
SGND
16
0.01µF
CIN
22µF
35V
×2
+
M2
Si4412DY
MBRS140T3
SENSE +
EXTVCC
COUT
100µF
10V
×2
+
10
R2
20k
1%
1000pF
8
VOUT
5V/3.5A
R1
35.7k
1%
4.7µF
11
CSEC
3.3µF
35V
9
100Ω
SGND
100Ω
11.3k
1%
100k
1%
1435A TA04
T1: DALE LPE6562-A236
VOUT2
12V
120mA
3.3V/4.5A Converter with Foldback Current Limiting
VIN
4.5V TO 28V
COSC
68pF
CSS
0.1µF
RC
10k
CC2
51pF
CC1
330pF
INTVCC
CIN
22µF
35V
×2
+
1
2
3
4
COSC
TG
RUN/SS
BOOST
ITH
SW
SFB
LTC1435A
5
VIN
15
14
ITH PIN 3
13
7
VOSENSE
SENSE
–
IN4148
BG
PGND
SENSE +
EXTVCC
RSENSE
0.025Ω
+
11
M2
Si4410DY
10
9
MBRS140T3
100pF
OPTIONAL:
CONNECT TO 5V
VOUT
3.3V/4.5A
R1
35.7k
1%
4.7µF
1000pF
8
L1
10µH
0.1µF
12
100pF
6
M1
Si4410DY
CMDSH-3
INTVCC
SGND
16
R2
20k
1%
+
COUT
100µF
10V
×2
SGND
(PIN 5)
1435A TA01
17
LTC1435A
U
TYPICAL APPLICATIONS
Constant-Current/Constant-Voltage High Efficiency Battery Charger
E1
VIN
+
C1*
22µF
35V
E3
GND
E3
SHDN
+
C2*
22µF
35V
R7
1.5M
C4
0.1µF
C11
56pF
C5
0.1µF
LTC1435A
C13
0.033µF
R5
1k
1
C12
0.1µF
2
3
C14
1000pF
4
5
C9
100pF
C15
0.1µF
LT1620
1
2
3
4
AVG
SENSE
IOUT
PROG
GND
VCC
NIN
6
PIN
COSC
TG
RUN/SS BOOST
SW
ITH
VIN
SFB
SGND
INTVCC
VOSENSE
BG
7
SENSE –
PGND
8
SENSE + EXTVCC
16
Q1
Si4412DY
15
D1
14
13
+
C6
0.33µF
D2
11
Q2
Si4412DY
10
9
+
7
C8
100pF
C7
4.7µF
16V
6
R2
1M
0.1%
5
R3
105k
0.1%
JP1A
C16
0.33µF
R6
10k
1%
C17
0.01µF
R1
0.025Ω
12
C10
100pF
8
L1
27µH
C18
0.1µF
R4
76.8k
0.1%
JP1B
1435A TA06
E5
GND
RPROG
E4
IPROG
*CONSULT CAPACITOR MANUFACTURER FOR RECOMMENDED
ESR RATING FOR CONTINUOUS 4A OPERATION
Current Programming Equation
)(R6) – 0.04
(I
IBATT = PROG
10(R1)
Efficiency
100
VIN = 24V
VBATT = 16V
95
EFFICIENCY (%)
VBATT = 12V
90
VBATT = 6V
85
80
75
0
1
3
4
2
BATTERY CHARGE CURRENT (A)
5
1435A TA05
18
C3
22µF
35V
E6
BATT
E7
GND
LTC1435A
U
TYPICAL APPLICATIONS
Dual Output 5V and 12V Application
VIN
5.4V TO 28V
COSC
68pF
1
CSS
0.1µF
RC
10k
CIN
22µF
35V
×2
+
2
CC1
510pF
3
CC2
51pF
4
COSC
RUN/SS
ITH
VIN
CMDSH-3
7
SENSE
–
VOUT
5V/3.5A
RSENSE
0.033Ω
4.7µF
11
M2
IRF7403
R1
35.7k
1%
MBRS140T3
PGND
SENSE +
COUT
100µF
10V
×2
+
10
R2
20k
1%
1000pF
8
CSEC
3.3µF
25V
0.1µF
+
BG
VOSENSE
+
12
100pF
6
24V
T1
10µH
1:2.2
13
INTVCC
SGND
MBRS1100T3
14
SW
SFB
M1
IRF7403
15
BOOST
LTC1435A
5
16
TG
9
EXTVCC
100Ω
SGND
100Ω
10k
90.9k
VOUT2
12V
1435A TA02
T1: DALE LPE6562-A092
U
PACKAGE DESCRIPTION
Dimensions in inches (millimeters) unless otherwise noted.
G Package
16-Lead Plastic SSOP (0.209)
(LTC DWG # 05-08-1640)
0.205 – 0.212**
(5.20 – 5.38)
0.239 – 0.249*
(6.07 – 6.33)
16 15 14 13 12 11 10 9
0.068 – 0.078
(1.73 – 1.99)
0° – 8°
0.005 – 0.009
(0.13 – 0.22)
0.022 – 0.037
(0.55 – 0.95)
0.0256
(0.65)
BSC
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0.301 – 0.311
(7.65 – 7.90)
0.010 – 0.015
(0.25 – 0.38)
0.002 – 0.008
(0.05 – 0.21)
1 2 3 4 5 6 7 8
G16 SSOP 1197
S Package
16-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.010 – 0.020
× 45°
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
0.053 – 0.069
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
0.386 – 0.394*
(9.804 – 10.008)
16
15
14
13
12
11
10
9
0° – 8° TYP
0.016 – 0.050
0.406 – 1.270
0.014 – 0.019
(0.355 – 0.483)
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0.050
(1.270)
TYP
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
S16 0695
1
2
3
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
4
5
6
7
8
19
LTC1435A
U
TYPICAL APPLICATION
Low Dropout 2.9V/3A Converter
VIN
3.5V TO 20V
COSC
68pF
1
CSS
0.1µF
RC
10k
2
CC1
330pF
CC2
51pF
INTVCC
3
4
COSC
TG
RUN/SS
BOOST
ITH
SW
SFB
VIN
LTC1435A
5
SGND
16
14
13
CMDSH-3
INTVCC
7
VOSENSE
BG
SENSE –
PGND
CIN
22µF
35V
×2
+
15
L1
10µH
0.1µF
12
RSENSE
0.033Ω
VOUT
2.9V/3A
+
100pF
6
M1
1/2 Si9802DY
4.7µF
11
M2
1/2 Si9802DY
MBRS140T3
100pF
SENSE +
EXTVCC
+
10
R2
24.9k
1%
1000pF
8
R1
35.7k
1%
9
OPTIONAL:
CONNECT TO 5V
COUT
100µF
10V
×2
SGND
1435A TA03
L1: SUMIDA CDRH125-10
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VID Voltage Programmer
Creates a Programmable 1.3V to 2V Supply for Intel
Mobile Pentium® II Processor When Used with the
LTC1435A
Pentium is a registered trademark of Intel Corporation.
20
Linear Technology Corporation
1435af LT/GP 0798 4K • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 ● FAX: (408) 434-0507 ● www.linear-tech.com
LINEAR TECHNOLOGY CORPORATION 1998
工商网监
湘ICP备2023018690号
