LTC1544
Software-Selectable
Multiprotocol Transceiver
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FEATURES
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DESCRIPTIO
The LTC®1544 is a 4-driver/4-receiver multiprotocol transceiver. The LTC1544 and LTC1543 form the core of a
complete software-selectable DTE or DCE interface port that
supports the RS232, RS449, EIA530, EIA530-A, V.35, V.36
or X.21 protocols. Cable termination for the LTC1543 may be
implemented using the LTC1344A software-selectable cable
termination chip or by using existing discrete designs. The
LTC1546 includes software-selectable cable termination onchip.
The LTC1544 runs from a 5V supply and the charge pump on
the LTC1543 or LTC1546. The part is available in a 28-lead
SSOP surface mount package.
Software-Selectable Transceiver Supports:
RS232, RS449, EIA530, EIA530-A, V.35, V.36, X.21
TUV/Detecon Inc. Certified NET1 and NET2
Compliant (Test Report No. NET2/102201/97)
TBR2 Compliant (Test Report No. CTR2/022701/98)
Software-Selectable Cable Termination Using
the LTC1344A
Complete DTE or DCE Port with LTC1543, LTC1344A
or LTC1546 with Integrated Termination
Operates from Single 5V Supply with LTC1543
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APPLICATIO S
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Data Networking
CSU and DSU
Data Routers
, LTC and LT are registered trademarks of Linear Technology Corporation.
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TYPICAL APPLICATIO
DTE or DCE Multiprotocol Serial Interface with DB-25 Connector
LL
CTS
DSR
DCD
DTR
RTS
RXD
TXC
RXC
D3
R4
R3
R2
TXD
D2
D1
LTC1543
LTC1544
D4
SCTE
D2
D3
D1
R3
R1
R1
R2
LTC1344A
18
13 5
22 6
10 8
23 20 19 4
1
7
16 3
17
12 15 11 24 14
2
TXD A (103)
TXD B
SCTE A (113)
TXC A (114)
SCTE B
TXC B
RXC A (115)
RXC B
RXD A (104)
RXD B
SG (102)
SHIELD (101)
RTS A (105)
RTS B
DTR A (108)
DTR B
DCD A (109)
DCD B
DSR A (107)
CTS A (106)
DSR B
CTS B
LL A (141)
DB-25 CONNECTOR
9
1544 TA01
1
LTC1544
W W
W
AXI U
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ABSOLUTE
RATI GS
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W
PACKAGE/ORDER I FOR ATIO
(Note 1)
Supply Voltage, VCC ................................................ 6.5V
Input Voltage
Transmitters ........................... – 0.3V to (VCC + 0.3V)
Receivers ............................................... – 18V to 18V
Logic Pins .............................. – 0.3V to (VCC + 0.3V)
Output Voltage
Transmitters .................. (VEE – 0.3V) to (VDD + 0.3V)
Receivers ................................ – 0.3V to (VCC + 0.3V)
VEE ........................................................ – 10V to 0.3V
VDD ....................................................... – 0.3V to 10V
Short-Circuit Duration
Transmitter Output ..................................... Indefinite
Receiver Output .......................................... Indefinite
VEE .................................................................. 30 sec
Operating Temperature Range
LTC1544CG ............................................. 0°C to 70°C
LTC1544IG ........................................ – 40°C to 85°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
TOP VIEW
ORDER PART
NUMBER
VCC
1
28 VEE
VDD
2
27 GND
D1
3
D2
4
D3
5
R1
6
R2
7
R3
8
D4
9
26 D1 A
LTC1544CG
LTC1544IG
D1
25 D1 B
D2
24 D2 A
23 D2 B
D3
22 D3/R1 A
R1
21 D3/R1 B
20 R2 A
R2
R4 10
19 R2 B
R3
M0 11
18 R3 A
D4
M1 12
17 R3 B
R4
M2 13
16 D4/R4 A
DCE/DTE 14
15 INVERT
G PACKAGE
28-LEAD PLASTIC SSOP
TJMAX = 150°C, θJA = 65°C/ W
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 5V, VDD = 8V, VEE = – 7V for V.28, – 5.5V for V.10, V.11 (Notes 2, 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VCC Supply Current (DCE Mode,
All Digital Pins = GND or VCC)
RS530, RS530-A, X.21 Modes, No Load
RS530, RS530-A, X.21 Modes, Full Load
V.28 Mode, No Load
V.28 Mode, Full Load
No-Cable Mode
2.7
95
1
1
10
120
2
2
200
mA
mA
mA
mA
µA
IEE
VEE Supply Current (DCE Mode,
All Digital Pins = GND or VCC)
VEE = – 5.6V (RS530, RS530-A Modes)
VEE = – 8.46V (V.28 Mode)
RS530, RS530-A, X.21 Modes, No Load
RS530, X.21 Modes, Full Load
RS530-A, Full Load
V.28 Mode, No Load
V.28 Mode, Full Load
No-Cable Mode
2.1
14
25
1
12
10
mA
mA
mA
mA
mA
µA
IDD
VDD Supply Current (DCE Mode,
All Digital Pins = GND or VCC)
VDD = 8.73V
RS530, RS530-A, X.21 Modes, NoLoad
RS530, RS530-A, X.21 Modes, Full Load
V.28 Mode, No Load
V.28 Mode, Full Load
No-Cable Mode
0.2
0.2
1
12
10
mA
mA
mA
mA
µA
PD
Internal Power Dissipation (DCE Mode,
(All Digital Pins = GND or VCC)
RS530, RS530-A, X.21 Modes, Full Load
V.28 Mode, Full Load
300
54
mW
mW
Supplies
ICC
2
●
●
●
●
LTC1544
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 5V, VDD = 8V, VEE = – 7V for V.28, – 5.5V for V.10, V.11 (Notes 2, 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Logic Inputs and Outputs
VIH
Logic Input High Voltage
VIL
Logic Input Low Voltage
IIN
Logic Input Current
●
2
V
●
0.8
V
D1, D2, D3, D4
M0, M1, M2, DCE, INVERT = GND (LTC1544C)
M0, M1, M2, DCE, INVERT = GND (LTC1544I)
M0, M1, M2, DCE, INVERT = VCC
●
●
●
●
– 100
– 120
– 50
– 50
±10
– 30
– 30
±10
µA
µA
µA
µA
3
4.5
VOH
Output High Voltage
IO = – 4mA
●
VOL
Output Low Voltage
IO = 4mA
●
IOSR
Output Short-Circuit Current
0V ≤ VO ≤ VCC
●
IOZR
Three-State Output Current
M0 = M1 = M2 = VCC, 0V ≤ VO ≤ VCC
– 50
V
0.3
0.8
V
40
50
mA
±1
µA
V.11 Driver
VODO
Open Circuit Differential Output Voltage
RL = 1.95k (Figure 1)
VODL
Loaded Differential Output Voltage
RL = 50Ω (Figure 1)
RL = 50Ω (Figure 1)
●
●
0.5VODO
±2
±5
V
0.67VODO
V
V
∆VOD
Change in Magnitude of Differential
Output Voltage
RL = 50Ω (Figure 1)
●
0.2
V
VOC
Common Mode Output Voltage
RL = 50Ω (Figure 1)
●
3
V
∆VOC
Change in Magnitude of Common Mode
Output Voltage
RL = 50Ω (Figure 1)
●
0.2
V
ISS
Short-Circuit Current
VOUT = GND
IOZ
Output Leakage Current
– 0.25V ≤ VO ≤ 0.25V, Power Off or
No-Cable Mode or Driver Disabled
●
t r, t f
Rise or Fall Time
LTC1544C (Figures 2, 5)
LTC1544I (Figures 2, 5)
●
●
t PLH
Input to Output
LTC1544C (Figures 2, 5)
LTC1544I (Figures 2, 5)
t PHL
Input to Output
∆t
t SKEW
±150
mA
±1
±100
µA
2
2
15
15
25
35
ns
ns
●
●
20
20
40
40
65
75
ns
ns
LTC1544C (Figures 2, 5)
LTC1544I (Figures 2, 5)
●
●
20
20
40
40
65
75
ns
ns
Input to Output Difference, tPLH – tPHL
LTC1544C (Figures 2, 5)
LTC1544I (Figures 2, 5)
●
●
0
0
3
3
12
17
ns
ns
Output to Output Skew
(Figures 2, 5)
3
ns
V.11 Receiver
VTH
Input Threshold Voltage
– 7V ≤ VCM ≤ 7V
●
∆VTH
Input Hysteresis
– 7V ≤ VCM ≤ 7V
●
IIN
Input Current (A, B)
– 10V ≤ VA,B ≤ 10V
●
RIN
Input Impedance
– 10V ≤ VA,B ≤ 10V
●
t r, t f
Rise or Fall Time
(Figures 2, 6)
t PLH
Input to Output
LTC1544C (Figures 2, 6)
LTC1544I (Figures 2, 6)
●
●
50
50
80
90
ns
ns
t PHL
Input to Output
LTC1544C (Figures 2, 6)
LTC1544I (Figures 2, 6)
●
●
50
50
80
90
ns
ns
∆t
Input to Output Difference, tPLH – tPHL
LTC1544C (Figures 2, 6)
LTC1544I (Figures 2, 6)
●
●
4
4
16
21
ns
ns
– 0.2
15
15
0
0
0.2
V
40
mV
±0.66
mA
30
kΩ
15
ns
3
LTC1544
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 5V, VDD = 8V, VEE = – 7V for V.28, – 5.5V for V.10, V.11 (Notes 2, 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VO
Output Voltage
Open Circuit, RL = 3.9k
●
VT
Output Voltage
RL = 450Ω (Figure 3)
RL = 450Ω (Figure 3)
●
ISS
Short-Circuit Current
VO = GND
IOZ
Output Leakage Current
– 0.25V ≤ VO ≤ 0.25V, Power Off or
No-Cable Mode or Driver Disabled
t r, t f
Rise or Fall Time
RL = 450Ω, CL = 100pF (Figures 3, 7)
2
µs
t PLH
Input to Output
RL = 450Ω, CL = 100pF (Figures 3, 7)
1
µs
t PHL
Input to Output
RL = 450Ω, CL = 100pF (Figures 3, 7)
1
µs
V.10 Driver
±4
±6
V
±3.6
0.9VO
V
±0.1
●
±150
mA
±100
µA
V.10 Receiver
VTH
Receiver Input Threshold Voltage
∆VTH
Receiver Input Hysteresis
IIN
Receiver Input Current
– 10V ≤ VA ≤ 10V
●
RIN
Receiver Input Impedance
– 10V ≤ VA ≤ 10V
●
t r , tf
Rise or Fall Time
tPLH
Input to Output
tPHL
∆t
●
– 0.25
0.25
25
●
15
V
50
mV
±0.66
mA
30
kΩ
(Figures 4, 8)
15
ns
(Figures 4, 8)
55
ns
Input to Output
(Figures 4, 8)
109
ns
Input to Output Difference, tPLH – tPHL
(Figures 4, 8)
60
ns
VO
Output Voltage
Open Circuit
RL = 3k (Figure 3)
●
●
ISS
Short-Circuit Current
VO = GND
●
IOZ
Output Leakage Current
– 0.25V ≤ VO ≤ 0.25V, Power Off or
No-Cable Mode or Driver Disabled
●
SR
Slew Rate
RL = 3k, CL = 2500pF (Figures 3, 7)
●
t PLH
Input to Output
RL = 3k, CL = 2500pF (Figures 3, 7)
●
t PHL
Input to Output
RL = 3k, CL = 2500pF (Figures 3, 7)
V.28 Driver
±5
±8.5
±1
4
±10
V
V
±150
mA
±100
µA
30
V/µs
1.3
2.5
µs
●
1.3
2.5
µs
1.5
0.8
V
V.28 Receiver
VTHL
Input Low Threshold Voltage
●
VTLH
Input High Threshold Voltage
●
2
1.6
∆VTH
Receiver Input Hysterisis
●
0
0.1
0.3
RIN
Receiver Input Impedance
– 15V ≤ VA ≤ 15V
●
3
5
7
t r , tf
Rise or Fall Time
(Figures 4, 8)
tPLH
Input to Output
(Figures 4, 8)
●
60
100
ns
tPHL
Input to Output
(Figures 4, 8)
●
150
450
ns
Note 1: Absolute Maximum Ratings are those beyond which the safety of a
device may be impaired.
Note 2: All currents into device pins are positive; all currents out of device
are negative. All voltages are referenced to device ground unless otherwise
specified.
4
V
15
V
kΩ
ns
Note 3: All typicals are given for VCC = 5V, VDD = 8V, VEE = – 7V for V.28,
– 5.5V for V.10, V.11 and TA = 25°C.
LTC1544
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PI FU CTIO S
VCC (Pin 1): Positive Supply for the Transceivers. 4.75V ≤
VCC ≤ 5.25V. Connect a 1µF capacitor to ground.
INVERT (Pin 15): TTL Level Mode Select Input with PullUp to VCC.
VDD (Pin 2): Positive Supply Voltage for V.28. Connect to
VDD Pin 3 on LTC1543 or 8V supply. Connect a 1µF
capacitor to ground.
D4/R4 A (Pin 16): Receiver 4 Inverting Input and Driver 4
Output.
D1 (Pin 3): TTL Level Driver 1 Input.
R3 B (Pin 17): Receiver 3 Noninverting Input.
R3 A (Pin 18): Receiver 3 Inverting Input.
D2 (Pin 4): TTL Level Driver 2 Input.
R2 B (Pin 19): Receiver 2 Noninverting Input.
D3 (Pin 5): TTL Level Driver 3 Input.
R2 A (Pin 20): Receiver 2 Inverting Input.
R1 (Pin 6): CMOS Level Receiver 1 Output.
R2 (Pin 7): CMOS Level Receiver 2 Output.
R3 (Pin 8): CMOS Level Receiver 3 Output.
D3/R1 B (Pin 21): Receiver 1 Noninverting Input and
Driver 3 Noninverting Output.
D4 (Pin 9): TTL Level Driver 4 Input.
D3/R1 A (Pin 22): Receiver 1 Inverting Input and Driver 3
Inverting Output.
R4 (Pin 10): CMOS Level Receiver 4 Output.
D2 B (Pin 23): Driver 2 Noninverting Output.
M0 (Pin 11): TTL Level Mode Select Input 0 with Pull-Up
to VCC.
D2 A (Pin 24): Driver 2 Inverting Output.
M1 (Pin 12): TTL Level Mode Select Input 1 with Pull-Up
to VCC.
D1 A (Pin 26): Driver 1 Inverting Output.
M2 (Pin 13): TTL Level Mode Select Input 2 with Pull-Up
to VCC.
DCE/DTE (Pin 14): TTL Level Mode Select Input with
Pull-Up to VCC.
D1 B (Pin 25): Driver 1 Noninverting Output.
GND (Pin 27): Ground.
VEE (Pin 28): Negative Supply Voltage. Connect to VEE Pin
26 on LTC1543 or to – 8V supply. Connect a 1µF capacitor
to ground.
TEST CIRCUITS
A
RL
50Ω
B
VOD
A
RL
50Ω
B
VOC
1544 F01
Figure 1. V.11 Driver Test Circuit
RL
100Ω
CL
100pF
B
CL
100pF
A
R
15pF
1544 F02
Figure 2. V.11 Driver/Receiver AC Test Circuit
5
LTC1544
TEST CIRCUITS
D
D
A
A
A
R
15pF
RL
CL
1544 F04
1544 F03
Figure 4. V.10/V.28 Receiver Test Circuit
Figure 3. V.10/V.28 Driver Test Circuit
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ODE SELECTIO
LTC1544 MODE NAME
M2
M1
M0
DCE/DTE
INVERT
D1
D2
D3
R1
R2
R3
D4
R4
Not Used (Default V.11)
0
0
0
0
0
V.11
V.11
Z
V.11
V.11
V.11
Z
V.10
RS530A
0
0
1
0
0
V.11
V.10
Z
V.11
V.10
V.11
Z
V.10
RS530
0
1
0
0
0
V.11
V.11
Z
V.11
V.11
V.11
Z
V.10
X.21
0
1
1
0
0
V.11
V.11
Z
V.11
V.11
V.11
Z
V.10
V.35
1
0
0
0
0
V.28
V.28
Z
V.28
V.28
V.28
Z
V.28
RS449/V.36
1
0
1
0
0
V.11
V.11
Z
V.11
V.11
V.11
Z
V.10
V.28/RS232
1
1
0
0
0
V.28
V.28
Z
V.28
V.28
V.28
Z
V.28
No Cable
1
1
1
0
0
Z
Z
Z
Z
Z
Z
Z
Z
Not Used (Default V.11)
0
0
0
0
1
V.11
V.11
Z
V.11
V.11
V.11
V.10
Z
RS530A
0
0
1
0
1
V.11
V.10
Z
V.11
V.10
V.11
V.10
Z
RS530
0
1
0
0
1
V.11
V.11
Z
V.11
V.11
V.11
V.10
Z
X.21
0
1
1
0
1
V.11
V.11
Z
V.11
V.11
V.11
V.10
Z
V.35
1
0
0
0
1
V.28
V.28
Z
V.28
V.28
V.28
V.28
Z
RS449/V.36
1
0
1
0
1
V.11
V.11
Z
V.11
V.11
V.11
V.10
Z
V.28/RS232
1
1
0
0
1
V.28
V.28
Z
V.28
V.28
V.28
V.28
Z
No Cable
1
1
1
0
1
Z
Z
Z
Z
Z
Z
Z
Z
Not Used (Default V.11)
0
0
0
1
0
V.11
V.11
V.11
Z
V.11
V.11
V.10
Z
RS530A
0
0
1
1
0
V.11
V.10
V.11
Z
V.10
V.11
V.10
Z
RS530
0
1
0
1
0
V.11
V.11
V.11
Z
V.11
V.11
V.10
Z
X.21
0
1
1
1
0
V.11
V.11
V.11
Z
V.11
V.11
V.10
Z
V.35
1
0
0
1
0
V.28
V.28
V.28
Z
V.28
V.28
V.28
Z
RS449/V.36
1
0
1
1
0
V.11
V.11
V.11
Z
V.11
V.11
V.10
Z
V.28/RS232
1
1
0
1
0
V.28
V.28
V.28
Z
V.28
V.28
V.28
Z
No Cable
1
1
1
1
0
Z
Z
Z
Z
Z
Z
Z
Z
Not Used (Default V.11)
0
0
0
1
1
V.11
V.11
V.11
Z
V.11
V.11
Z
V.10
RS530A
0
0
1
1
1
V.11
V.10
V.11
Z
V.10
V.11
Z
V.10
RS530
0
1
0
1
1
V.11
V.11
V.11
Z
V.11
V.11
Z
V.10
X.21
0
1
1
1
1
V.11
V.11
V.11
Z
V.11
V.11
Z
V.10
V.35
1
0
0
1
1
V.28
V.28
V.28
Z
V.28
V.28
Z
V.28
RS449/V.36
1
0
1
1
1
V.11
V.11
V.11
Z
V.11
V.11
Z
V.10
V.28/RS232
1
1
0
1
1
V.28
V.28
V.28
Z
V.28
V.28
Z
V.28
No Cable
1
1
1
1
1
Z
Z
Z
Z
Z
Z
Z
Z
6
LTC1544
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W
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SWITCHI G TI E WAVEFOR S
5V
f = 1MHz : t r ≤ 10ns : t f ≤ 10ns
1.5V
D
0V
1.5V
t PHL
t PLH
VO
B–A
–VO
90%
50%
10%
tr
90%
VDIFF = V(A) – V(B)
1/2 VO
50%
10%
tf
A
VO
B
t SKEW
t SKEW
1544 F05
Figure 5. V.11, V.35 Driver Propagation Delays
VOD2
B–A
–VOD2
f = 1MHz : t r ≤ 10ns : t f ≤ 10ns
0V
INPUT
t PLH
0V
t PHL
VOH
R
VOL
OUTPUT
1.5V
1.5V
1544 F06
Figure 6. V.11, V.35 Receiver Propagation Delays
3V
1.5V
1.5V
D
0V
t PHL
VO
t PLH
3V
3V
0V
A
0V
–3V
–VO
1544 F07
–3V
tf
tr
Figure 7. V.10, V.28 Driver Propagation Delays
VIH
1.7V
1.3V
A
VIL
VOH
R
VOL
t PHL
t PLH
2.4V
0.8V
1544 F08
Figure 8. V.10, V.28 Receiver Propagation Delays
7
LTC1544
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APPLICATIONS INFORMATION
Overview
A complete DCE-to-DTE interface operating in EIA530
mode is shown in Figure 9. The LTC1543 of each port is
used to generate the clock and data signals. The LTC1544
is used to generate the control signals along with LL (Local
Loop-back).The LTC1344A cable termination chip is used
only for the clock and data signals because they must
support V.35 cable termination. The control signals do not
need any external resistors.
The LTC1543/LTC1544 form the core of a complete software-selectable DTE or DCE interface port that supports
the RS232, RS449, EIA530, EIA530-A, V.35, V.36 or X.21
protocols. Cable termination may be implemented using
the LTC1344A software-selectable cable termination chip
or by using existing discrete designs.
DTE
SERIAL
CONTROLLER
LTC1543
DCE
LTC1344A
LTC1344A
LTC1543
SERIAL
CONTROLLER
TXD
D1
TXD
103Ω
R3
TXD
SCTE
D2
SCTE
103Ω
R2
SCTE
R1
D3
TXC
R1
103Ω
TXC
D3
TXC
RXC
R2
103Ω
RXC
D2
RXC
RXD
R3
103Ω
RXD
D1
RXD
LTC1544
LTC1544
RTS
D1
RTS
R3
RTS
DTR
D2
DTR
R2
DTR
D3
R1
DCD
R1
DCD
D3
DCD
DSR
R2
DSR
D2
DSR
CTS
R3
CTS
D1
CTS
LL
LL
D4
R4
R4
LL
D4
1544 F09
Figure 9. Complete Multiprotocol Interface in EIA530 Mode
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APPLICATIONS INFORMATION
Mode Selection
The interface protocol is selected using the mode select
pins M0, M1 and M2 (see the Mode Selection table).
For example, if the port is configured as a V.35 interface,
the mode selection pins should be M2 = 1, M1 = 0, M0 = 0.
For the control signals, the drivers and receivers will
operate in V.28 (RS232) electrical mode. For the clock and
data signals, the drivers and receivers will operate in V.35
electrical mode. The DCE/DTE pin will configure the port
for DCE mode when high, and DTE when low.
The interface protocol may be selected simply by plugging the appropriate interface cable into the connector.
The mode pins are routed to the connector and are left
LATCH
unconnected (1) or wired to ground (0) in the cable as
shown in Figure 10.
The internal pull-up current sources will ensure a binary 1
when a pin is left unconnected and that the LTC1543/
LTC1544 and the LTC1344A enter the no-cable mode
when the cable is removed. In the no-cable mode the
LTC1543/LTC1544 supply current drops to less than
200µA and all LTC1543/LTC1544 driver outputs and
LTC1344A resistive terminations are forced into a high
impedance state.
The mode selection may also be accomplished by using
jumpers to connect the mode pins to ground or VCC.
21
LTC1344A
DCE/
DTE M2
22
23
M1 M0 (DATA)
24
1
CONNECTOR
(DATA)
M0
LTC1543
M1
M2
DCE/DTE
11
12
13
14
NC
NC
CABLE
LTC1544
DCE/DTE
M2
M1
M0
14
13
12
11
1544 F10
(DATA)
Figure 10: Single Port DCE V.35 Mode Selection in the Cable
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APPLICATIONS INFORMATION
Cable Termination
Traditional implementations have included switching
resistors with expensive relays, or requiring the user to
change termination modules every time the interface
standard has changed. Custom cables have been used
with the termination in the cable head or separate terminations are built on the board and a custom cable routes the
signals to the appropriate termination. Switching the
terminations with FETs is difficult because the FETs must
remain off even though the signal voltage is beyond the
supply voltage for the FET drivers or the power is off.
The V.10 receiver configuration in the LTC1544 is shown
in Figure 13. In V.10 mode switch S3 inside the LTC1544
is turned off.The noninverting input is disconnected inside
the LTC1544 receiver and connected to ground. The cable
termination is then the 30k input impedance to ground of
the LTC1544 V.10 receiver.
IZ
Using the LTC1344A along with the LTC1543/LTC1544
solves the cable termination switching problem. Via software control, the LTC1344A provides termination for the
V.10 (RS423), V.11 (RS422), V.28 (RS232) and V.35
electrical protocols.
3.25mA
–3V
–10V
VZ
3V
10V
V.10 (RS423) Interface
1544 F12
A typical V.10 unbalanced interface is shown in Figure 11.
A V.10 single-ended generator output A with ground C is
connected to a differential receiver with inputs A' connected to A, and input C' connected to the signal return
ground C. Usually, no cable termination is required for
V.10 interfaces, but the receiver inputs must be compliant
with the impedance curve shown in Figure 12.
–3.25mA
Figure 12. V.10 Receiver Input Impedance
A'
BALANCED
INTERCONNECTING
CABLE
GENERATOR
R6
10k
RECEIVER
RECEIVER
A'
C'
Figure 11. Typical V.10 Interface
10
R5
20k
S3
B'
C
LTC1544
R8
6k
LOAD
CABLE
TERMINATION
A
A
1544 F11
C'
R4
20k
B
GND
R7
10k
1544 F13
Figure 13. V.10 Receiver Configuration
LTC1544
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APPLICATIONS INFORMATION
V.11 (RS422) Interface
V.28 (RS232) Interface
A typical V.11 balanced interface is shown in Figure 14. A
V.11 differential generator with outputs A and B with
ground C is connected to a differential receiver with
ground C', inputs A' connected to A, B' connected to B. The
V.11 interface has a differential termination at the receiver
end that has a minimum value of 100Ω. The termination
resistor is optional in the V.11 specification, but for the
high speed clock and data lines, the termination is required
to prevent reflections from corrupting the data. The
receiver inputs must also be compliant with the impedance curve shown in Figure 12.
A typical V.28 unbalanced interface is shown in Figure 16.
A V.28 single-ended generator output A with ground C is
connected to a single-ended receiver with input A' connected to A, ground C' connected via the signal return
ground C.
In V.11 mode, all switches are off except S1 inside the
LTC1344A which connects a 103Ω differential termination impedance to the cable as shown in Figure 15.
BALANCED
INTERCONNECTING
CABLE
GENERATOR
In V.28 mode all switches are off except S3 inside the
LTC1543/LTC1544 which connects a 6k (R8) impedance
to ground in parallel with 20k (R5) plus 10k (R6) for a
combined impedance of 5k as shown in Figure 17. The
noninverting input is disconnected inside the LTC1543/
LTC1544 receiver and connected to a TTL level reference
voltage for a 1.4V receiver trip point.
LOAD
CABLE
TERMINATION
GENERATOR
B
B'
C
C'
RECEIVER
A
A'
C
C'
RECEIVER
100Ω
MIN
1544 F16
1544 F14
Figure 14. Typical V.11 Interface
Figure 16. Typical V.28 Interface
A'
A'
A
R1
51.5Ω
LTC1344A
R8
6k
S1
S2
R2
51.5Ω
A
LTC1543
LTC1544
R5
20k
R1
51.5Ω
R6
10k
S1
S3
R3
124Ω
S2
R4
20k
B
LTC1344A
R8
6k
R6
10k
R7
10k
R2
51.5Ω
S3
R3
124Ω
R4
20k
B
LTC1543
LTC1544
R5
20k
RECEIVER
B'
C'
LOAD
CABLE
TERMINATION
A'
A
BALANCED
INTERCONNECTING
CABLE
RECEIVER
R7
10k
B'
GND
C'
GND
1544 F17
1544 F15
Figure 15. V.11 Receiver Configuration
Figure 17. V.28 Receiver Configuration
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APPLICATIONS INFORMATION
V.35 Interface
A typical V.35 balanced interface is shown in Figure 18. A
V.35 differential generator with outputs A and B with
ground C is connected to a differential receiver with
ground C', inputs A' connected to A, B' connected to B. The
V.35 interface requires a T or delta network termination at
the receiver end and the generator end. The receiver
differential impedance measured at the connector must be
100Ω␣ ±10Ω, and the impedance between shorted terminals (A' and B') and ground C' must be 150Ω ±15Ω.
In V.35 mode, both switches S1 and S2 inside the LTC1344A
are on, connecting the T network impedance as shown in
Figure 19. The switch in the LTC1543 is off. The 30k input
impedance of the receiver is placed in parallel with the T
network termination, but does not affect the overall input
impedance significantly.
BALANCED
INTERCONNECTING
CABLE
GENERATOR
LOAD
CABLE
TERMINATION
A'
A
50Ω
RECEIVER
125Ω
125Ω
50Ω
50Ω
50Ω
B
B'
C
C'
1544 F18
Figure 18. Typical V.35 Interface
A'
A
R1
51.5Ω
LTC1344A
LTC1543
R8
6k
R5
20k
R6
10k
S1
S2
R2
51.5Ω
RECEIVER
S3
R3
124Ω
R4
20k
B
R7
10k
B'
C'
GND
Figure 19. V.35 Receiver Configuration
12
1544 F19
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APPLICATIONS INFORMATION
The generator differential impedance must be 50Ω to
150Ω and the impedance between shorted terminals (A
and B) and ground C must be 150Ω ±15Ω. For the
generator termination, switches S1 and S2 are both on and
the top side of the center resistor is brought out to a pin so
it can be bypassed with an external capacitor to reduce
common mode noise as shown in Figure 20.
A
LTC1344A
V.35 DRIVER
124Ω
Charge Pump
The LTC1543 uses an internal capacitive charge pump to
generate VDD and VEE as shown in Figure 21. A voltage
doubler generates about 8V on VDD and a voltage inverter
generates about – 7.5V for VEE. Four 1µF surface mounted
tantalum or ceramic capacitors are required for C1, C2, C3
and C4. The VEE capacitor C5 should be a minimum of
3.3µF. All capacitors are 16V and should be placed as close
as possible to the LTC1543 to reduce EMI.
51.5Ω
S2
ON
3
S1
ON
C3
1µF
2
C1
1µF 1
51.5Ω
B
C1
100pF
C
1544 F20
4
5V
VDD
C2 +
28
C1+
C2 –
27
C2
1µF
LTC1543
C1–
VCC
VEE
GND
26
25
+
C5
3.3µF
C4
1µF
1544 F21
Figure 20. V.35 Driver Using the LTC1344A
Any mismatch in the driver rise and fall times or skew in
the driver propagation delays will force current through
the center termination resistor to ground, causing a high
frequency common mode spike on the A and B terminals.
The common mode spike can cause EMI problems that are
reduced by capacitor C1 which shunts much of the common mode energy to ground rather than down the cable.
No-Cable Mode
The no-cable mode (M0 = M1 = M2 = 1) is intended for the
case when the cable is disconnected from the connector.
The charge pump, bias circuitry, drivers and receivers are
turned off, the driver outputs are forced into a high
impedance state, and the supply current drops to less than
200µA.
Figure 21. Charge Pump
Receiver Fail-Safe
All LTC1543/LTC1544 receivers feature fail-safe operation in all modes. If the receiver inputs are left floating or
shorted together by a termination resistor, the receiver
output will always be forced to a logic high.
DTE vs DCE Operation
The DCE/DTE pin acts as an enable for Driver 3/Receiver
1 in the LTC1543, and Driver 3/Receiver 1 and Driver 4/
Receiver 4 in the LTC1544. The INVERT pin in the LTC1544
allows the Driver 4/Receiver 4 enable to be high or low true
polarity.
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APPLICATIONS INFORMATION
The LTC1543/LTC1544 can be configured for either DTE
or DCE operation in one of two ways: a dedicated DTE or
DCE port with a connector of appropriate gender or a port
with one connector that can be configured for DTE or DCE
operation by rerouting the signals to the LTC1543/LTC1544
using a dedicated DTE cable or dedicated DCE cable.
A dedicated DTE port using a DB-25 male connector is
shown in Figure 22. The interface mode is selected by logic
outputs from the controller or from jumpers to either VCC
or GND on the mode select pins. A dedicated DCE port
using a DB-25 female connector is shown in Figure 23.
A port with one DB-25 connector, but can be configured
for either DTE or DCE operation is shown in Figure 24. The
configuration requires separate cables for proper signal
routing in DTE or DCE operation. For example, in DTE
mode, the TXD signal is routed to Pins 2 and 14 via Driver
1 in the LTC1543. In DCE mode, Driver 1 now routes the
RXD signal to Pins 2 and 14.
Cable-Selectable Multiprotocol Interface
A cable-selectable multiprotocol DTE/DCE interface is
shown in Figure 26. The select lines M0, M1 and DCE/DTE
are brought out to the connector. The mode is selected by
the cable by wiring M0 (connector Pin 18) and M1 (connector Pin 21) and DCE/DTE (connector Pin 25) to ground
(connector Pin 7) or letting them float. If M0, M1 or DCE/
DTE is floating, internal pull-up current sources will pull
the signals to VCC. The select bit M2 is hard wired to VCC.
When the cable is pulled out, the interface will go into the
no-cable mode.
Compliance Testing
A European standard EN 45001 test report is available for
the LTC1543/LTC1544/LTC1344A chipset. A copy of the
test report is available from LTC or TUV Telecom Services
Inc. (formerly Detecon Inc.)
The title of the report is:
Multiprotocol Interface with RL, LL, TM and a DB-25
Connector
Test Report No. NET2/102201/97.
If the RL, LL and TM signals are implemented, there are not
enough drivers and receivers available in the LTC1543/
LTC1544. In Figure 25, the required control signals are
handled by the LTC1544 but the clock/data signals use the
LTC1343. The LTC1343 has an additional single-ended
driver/receiver pair that can handle two more optional
control signals such as TM and LL.
TUV Telecom Services Inc.
Type Approval Division
1775 Old Highway 8, Ste 107
St. Paul, MN 55112 USA
Tel. +1 (612) 639-0775
Fax. +1 (612) 639-0873
14
The address of TUV Telecom Services Inc. is:
LTC1544
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TYPICAL APPLICATIO S
C6
C7
C8
100pF 100pF 100pF
3
8
11
12
13
LTC1344A
VCC
5V
14
4
25
C5
1µF
LTC1543
5
TXD
D1
6
SCTE
D2
7
11
12
13
14
C9
1µF
RTS
DTR
R2
10
RXD
C10
1µF
R1
9
RXC
R3
CTS
LL
24
2
23
14
22
24
21
11
20
15
19
12
18
17
17
9
16
3
15
16
1
VEE
GND
D1
D2
TXD A (103)
TXD B
SCTE A (113)
SCTE B
TXC A (114)
TXC B
RXC A (115)
RXC B
RXD A (104)
RXD B
SG
SHIELD
DB-25 MALE
CONNECTOR
28
C11
1µF
27
26
4
25
19
24
20
23
23
RTS A (105)
RTS B
DTR A (108)
DTR B
D3
6
R1
7
R2
8
R3
10
R4
9
14
16 15 18 17 19 20 22 23 24 1
DCE/DTE
4
13
9 10
M2
3
12
5 4 6 7
M1
VCC
1
VCC
2
VDD
11
VEE
C12
1µF
7
LTC1544
DSR
2
C4
3.3µF
M0
5
DCD
C2
1µF
D3
8
TXC
21
M0
CHARGE
PUMP
2
LATCH
M1
27
26
VCC
M2
1
C13
1µF
DCE/DTE
C1
1µF
28
+
C3
1µF
3
22
8
21
10
20
6
19
22
18
5
17
13
16
18
DCD A (109)
DCD B
DSR A (107)
DSR B
CTS A (106)
CTS B
LL A (141)
D4
M0
INVERT
15
NC
M1
M2
DCE/DTE
M2
M1
M0
1544 F22
Figure 22. Controller-Selectable Multiprotocol DTE Port with DB-25 Connector
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LTC1544
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TYPICAL APPLICATIO S
C6
C7
C8
100pF 100pF 100pF
3
8
11
12
13
LTC1344A
VCC
5V
14
4
25
C5
1µF
LTC1543
5
RXD
RXC
D2
7
R2
10
TXD
11
12
13
NC
C10
1µF
R1
9
SCTE
C9
1µF
14
5 4 6 7
9 10
16 15 18 17 19 20 22 23 24 1
VCC
16
22
17
21
9
R3
20
15
19
12
18
24
17
11
16
2
15
14
M0
7
M1
M2
1
DCE/DTE
1
VCC
2
VDD
3
VEE
GND
D1
4
DSR
D2
5
LTC1544
R1
7
DTR
R2
8
RTS
R3
10
LL
R4
9
11
12
13
NC
14
RXD B
RXC A (115)
RXC B
TXC A (114)
TXC B
SCTE A (113)
SCTE B
TXD A (103)
TXD B
SGND (102)
SHIELD (101)
28
C11
1µF
27
26
5
25
13
24
6
23
22
CTS A (106)
CTS B
DSR A (107)
DSR B
D3
6
DCD
RXD A (104)
DB-25 FEMALE
CONNECTOR
VCC
CTS
22
8
21
10
20
20
19
23
18
4
17
19
16
18
D4
M0
INVERT
15
NC
M1
M2
DCE/DTE
M2
M1
M0
1544 F23
Figure 23. Controller-Selectable DCE Port with DB-25 Connector
16
3
23
D3
8
TXC
VEE
C12
1µF
24
D1
6
2
C4
3.3µF
M0
CHARGE
PUMP
2
21
C2
1µF
M1
27
26
LATCH
VCC
M2
1
C13
1µF
DCE/DTE
C1
1µF
28
+
C3
1µF
3
DCD A (109)
DCD B
DTR A (108)
DTR B
RTS A (105)
RTS B
LL A (141)
LTC1544
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TYPICAL APPLICATIO S
C6
C7
C8
100pF 100pF 100pF
3
8
11
12
13
LTC1344A
VCC
5V
14
LTC1543
5
DTE_TXD/DCE_RXD
D1
6
DTE_SCTE/DCE_RXC
D2
7
R1
9
DTE_RXC/DCE_SCTE
R2
10
DTE_RXD/DCE_TXD
11
5 4 6 7
9 10
16 15 18 17 19 20 22 23 24 1
24
2
23
14
22
24
21
11
R3
20
15
19
12
18
17
17
9
16
3
15
16
M0
7
12
M1
13
M2
14
DCE/DTE
C10
1µF
DTE_RTS/DCE_CTS
DTE_DTR/DCE_DSR
C9
1µF
1
VCC
1
VCC
2
VDD
3
VEE
GND
D1
4
D2
5
DTE_DSR/DCE_DTR
DTE_CTS/DCE_RTS
DTE_LL/DCE_LL
6
R1
7
R2
8
R3
10
R4
9
11
12
13
14
DCE
RXD A
TXD B
RXD B
SCTE A
RXC A
SCTE B
RXC B
TXC A
TXC A
TXC B
TXC B
RXC A
SCTE A
RXC B
SCTE B
RXD A
TXD A
RXD B
TXD B
SG
SHIELD
DB-25
CONNECTOR
28
C11
1µF
27
26
4
25
19
24
20
23
23
RTS A
CTS A
RTS B
CTS B
DTR A
DSR A
DTR B
DSR B
DCD A
DCD A
D3
LTC1544
DTE_DCD/DCE_DCD
DTE
TXD A
D3
8
DTE_TXC/DCE_TXC
VEE
C12
1µF
M0
25
C4
3.3µF
M1
4
C5
1µF
2
26
CHARGE
PUMP
2
21
C2
1µF
M2
27
LATCH
VCC
DCE/DTE
C1
1µF
28
1
C13
1µF
+
C3
1µF
3
22
8
21
10
20
6
19
22
18
5
17
13
16
18
DCD B
DCD B
DSR A
DTR A
DSR B
DTR B
CTS A
RTS A
CTS B
RTS B
LL A
LL A
D4
M0
INVERT
15
NC
M1
M2
DCE/DTE
DCE/DTE
M2
M1
M0
1544 F24
Figure 24. Controller-Selectable Multiprotocol DTE/DCE Port with DB-25 Connector
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LTC1544
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C6
C7
C8
100pF 100pF 100pF
TYPICAL APPLICATIO S
3
8
11
12
13
LTC1344A
VCC
5V
14
44
C5
1µF
41
D1
D2
7
DTE_SCTE/DCE_RXC
5 4 6 7
9 10
16 15 18 17 19 20 22 23 24 1
LTC1343
6
DTE_TXD/DCE_RXD
VEE
C12
1µF
8
5
DTE_LL/DCE_TM
2
C4
3.3µF
M0
CHARGE
PUMP
4
3
21
C2
1µF
43
42
M1
C1
1µF
LATCH
VCC
M2
2
+
C3
1µF
C13
1µF
DCE/DTE
1
D3
39
18
38
2
37
14
36
24
35
11
DTE
DCE
LL A
TM A
TXD A
RXD A
TXD B
RXD B
SCTE A
RXC A
SCTE B
RXC B
TXC A
TXC A
34
9
DTE_TXC/DCE_TXC
R1
14
DTE_RXC/DCE_SCTE
R2
15
DTE_RXD/DCE_TXD
R3
16
DTE_TM/DCE_LL
20
22
11
25
R1
100k
33
D4
10
12
13
R4
CTRL
DCE
LATCH
M2
INVERT
M1
423SET
M0
GND
EC
DTE_DTR/DCE_DSR
VCC
LB
1
VCC
2
VDD
3
VEE
GND
4
D2
DTE_CTS/DCE_RTS
DTE_RL/DCE_RL
17
29
9
28
3
27
16
26
25
21
7
19
1
18
6
R1
7
R2
8
R3
10
R4
9
11
12
13
14
SCTE A
RXC B
SCTE B
RXD A
TXD A
RXD B
TXD B
TM A
LL A
SG
SHIELD
17
24
28
C11
1µF
27
26
4
25
19
24
20
23
23
22
8
21
10
20
6
19
22
18
5
17
13
16
21
RTS A
CTS A
RTS B
CTS B
DTR A
DSR A
DTR B
DSR B
DCD A
DCD A
DCD B
DCD B
DSR A
DTR A
DSR B
DTR B
CTS A
RTS A
CTS B
RTS B
RL A
RL A
D4
M0
INVERT
15
NC
M1
M2
DCE/DTE
DCE/DTE
M2
M1
M0
Figure 25. Controller-Selectable Multiprotocol DTE/DCE Port with RL, LL, TM and DB-25 Connector
18
TXC B
RXC A
D3
LTC1544
DTE_DSR/DCE_DTR
30
TXC B
DB-25
CONNECTOR
D1
5
DTE_DCD/DCE_DCD
12
23
C9
1µF
DTE_RTS/DCE_CTS
15
31
VCC
40
LB
C10
1µF
32
1544 F25
LTC1544
U
TYPICAL APPLICATIO S
C6
C7
C8
100pF 100pF 100pF
3
8
11
12
13
LTC1344A
VCC
5V
14
4
25
C5
1µF
LTC1543
5
DTE_TXD/DCE_RXD
D2
7
R1
9
DTE_RXC/DCE_SCTE
R2
10
DTE_RXD/DCE_TXD
11
12
NC
13
14
VEE
C12
1µF
5 4 6 7
9 10
16 15 18 17 19 20 22 23 24 1
VCC
2
23
14
22
24
21
11
DTE
DCE
TXD A
RXD A
TXD B
RXD B
SCTE A
RXC A
SCTE B
RXC B
TXC A
TXC A
TXC B
TXC B
RXC A
SCTE A
RXC B
SCTE B
RXD A
TXD A
RXD B
TXD B
D3
8
DTE_TXC/DCE_TXC
2
C4
3.3µF
24
D1
6
DTE_SCTE/DCE_RXC
C2
1µF
26
CHARGE
PUMP
2
21
M0
27
M1
1
M2
28
LATCH
VCC
DCE/DTE
C1
1µF
3
+
C3
1µF
C13
1µF
R3
20
15
19
12
18
17
17
9
16
3
15
16
M0
7
M1
M2
1
DCE/DTE
SG
SHIELD
DB-25
CONNECTOR
C10
1µF
C9
1µF
VCC
1
VCC
2
VDD
VEE
GND
25
DCE/DTE
21
M1
18
M0
4
RTS A
19
RTS B
20
DTR A
23
DTR B
28
C11
1µF
27
26
3
DTE_RTS/DCE_CTS
D1
24
4
DTE_DTR/DCE_DSR
D2
5
6
R1
7
DTE_DSR/DCE_DTR
R2
8
DTE_CTS/DCE_RTS
R3
10
R4
12
NC
13
14
22
8
21
10
20
6
19
22
18
5
17
13
CTS B
DSR A
DSR B
D4
MODE
V.35
RS449, V.36
RS232
M0
M1
M2
DCE/DTE INVERT
DCD A
DCD A
DCD B
DCD B
DSR A
DTR A
DSR B
DTR B
CTS A
RTS A
CTS B
RTS B
16
CABLE WIRING FOR MODE SELECTION
9
11
23
CTS A
D3
LTC1544
DTE_DCD/DCE_DCD
25
15
PIN 18
PIN 7
NC
PIN 7
PIN 21
PIN 7
PIN 7
NC
CABLE WIRING FOR
DTE/DCE SELECTION
MODE
PIN 25
DTE
PIN 7
DCE
NC
NC
1544 F26
Figure 26. Cable-Selectable Multiprotocol DTE/DCE Port with DB-25 Connector
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LTC1544
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
G Package
28-Lead Plastic SSOP (0.209)
(LTC DWG # 05-08-1640)
10.07 – 10.33*
(0.397 – 0.407)
28 27 26 25 24 23 22 21 20 19 18 17 16 15
7.65 – 7.90
(0.301 – 0.311)
1 2 3 4 5 6 7 8 9 10 11 12 13 14
5.20 – 5.38**
(0.205 – 0.212)
1.73 – 1.99
(0.068 – 0.078)
0° – 8°
0.13 – 0.22
(0.005 – 0.009)
0.55 – 0.95
(0.022 – 0.037)
NOTE: DIMENSIONS ARE IN MILLIMETERS
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.152mm (0.006") PER SIDE
**DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.254mm (0.010") PER SIDE
0.65
(0.0256)
BSC
0.05 – 0.21
(0.002 – 0.008)
0.25 – 0.38
(0.010 – 0.015)
G28 SSOP 1098
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1321
Dual RS232/RS485 Transceiver
Two RS232 Driver/Receiver Pairs or Two RS485 Driver/Receiver Pairs
LTC1334
Single 5V RS232/RS485 Multiprotocol Transceiver
Two RS232 Driver/Receiver or Four RS232 Driver/Receiver Pairs
LTC1343
Software-Selectable Multiprotocol Transceiver
4-Driver/4-Receiver for Data and Clock Signals
LTC1344A
Software-Selectable Cable Terminator
Perfect for Terminating the LTC1543
LTC1345
Single Supply V.35 Transceiver
3-Driver/3-Receiver for Data and Clock Signals
LTC1346A
Dual Supply V.35 Transceiver
3-Driver/3-Receiver for Data and Clock Signals
LTC1543
Software-Selectable Multiprotocol Transceiver
Companion to LTC1544 for Data and Clock Signals
LTC1546
Multiprotocol Transceiver with Termination
Companion to LTC1544 for Data and Clock Signals
20
Linear Technology Corporation
sn1544 1544fas LT/TP 0100 2K REV A • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 ● FAX: (408) 434-0507 ● www.linear-tech.com
LINEAR TECHNOLOGY CORPORATION 1998
工商网监
湘ICP备2023018690号
