LTC1968
Precision Wide Bandwidth,
RMS-to-DC Converter
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FEATURES
DESCRIPTIO
■
The LTC®1968 is a true RMS-to-DC converter that uses an
innovative delta-sigma computational technique. The benefits of the LTC1968 proprietary architecture, when compared to conventional log-antilog RMS-to-DC converters,
are higher linearity and accuracy, bandwidth independent
of amplitude and improved temperature behavior.
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■
■
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■
High Linearity:
0.02% Linearity Allows Simple System Calibration
Wide Input Bandwidth:
Bandwidth to 1% Additional Gain Error: 500kHz
Bandwidth to 0.1% Additional Gain Error: 150kHz
3dB Bandwidth Independent of Input Voltage
Amplitude
No-Hassle Simplicity:
True RMS-DC Conversion with Only One External
Capacitor
Delta Sigma Conversion Technology
Ultralow Shutdown Current:
0.1µA
Flexible Inputs:
Differential or Single Ended
Rail-to-Rail Common Mode Voltage Range
Up to 1VPEAK Differential Voltage
Flexible Output:
Rail-to-Rail Output
Separate Output Reference Pin Allows Level Shifting
Small Size:
Space Saving 8-Pin MSOP Package
The LTC1968 operates with single-ended or differential input signals and accurately supports crest factors up to 4.
Common mode input range is rail-to-rail. Differential input range is 1VPEAK, and offers unprecedented linearity. The
LTC1968 allows hassle-free system calibration at any input voltage.
The LTC1968 has a rail-to-rail output with a separate output reference pin providing flexible level shifting; it operates on a single power supply from 4.5V to 5.5V. A low power
shutdown mode reduces supply current to 0.1µA.
The LTC1968 is packaged in the space-saving MSOP package, which is ideal for portable applications.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Protected under U.S. Patent Numbers 6,359,576, 6,362,677 and 6,516,291
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APPLICATIO S
■
True RMS Digital Multimeters and Panel Meters
True RMS AC + DC Measurements
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TYPICAL APPLICATIO
Single Supply RMS-to-DC Converter
4.5V TO 5.5V
V+
DIFFERENTIAL
INPUT
0.1µF
OPT. AC
COUPLING
IN1
OUTPUT
LTC1968
IN2
OUT RTN
EN
GND
1968 TA01
CAVE
10µF
+ VOUT
–
LINEARITY ERROR (VOUT mV DC – VIN mV ACRMS)
Linearity Performance
0.2
LTC1968, ∆Σ
0
–0.2
–0.4
–0.6
CONVENTIONAL
LOG/ANTILOG
–0.8
–1.0
60Hz SINEWAVE
0
100
200
300
VIN (mV ACRMS)
400
500
1968 TA01b
1968f
1
LTC1968
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AXI U
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ABSOLUTE
RATI GS
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PACKAGE/ORDER I FOR ATIO
(Note 1)
Supply Voltage
V+ to GND ............................................................. 6V
Input Currents (Note 2) ..................................... ±10mA
Output Current (Note 3) ..................................... ±10mA
ENABLE Voltage ......................................... –0.3V to 6V
OUT RTN Voltage ........................................ –0.3V to V+
Operating Temperature Range (Note 4)
LTC1968C/LTC1968I ......................... – 40°C to 85°C
Specified Temperature Range (Note 5)
LTC1968C/LTC1968I ......................... – 40°C to 85°C
Maximum Junction Temperature ......................... 150°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
ORDER PART
NUMBER
TOP VIEW
GND
IN1
IN2
NC
1
2
3
4
8
7
6
5
LTC1968CMS8
LTC1968IMS8
ENABLE
V+
OUT RTN
VOUT
MS8 PACKAGE
8-LEAD PLASTIC MSOP
MS8 PART MARKING
TJMAX = 150°C, θJA = 220°C/ W
LTAFG
Consult LTC Marketing for parts specified with wider operating temperature ranges.
The temperature grade (I or C) is indicated on the shipping container.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are TA = 25°C. V+ = 5V, VOUTRTN = 2.5V, CAVE = 10µF, VIN = 200mVRMS, VENABLE = 0.5V
unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
±0.1
±0.3
±0.4
%
%
0.2
0.75
mV
Conversion Accuracy
GERR
Low Frequency Gain Error
50Hz to 20kHz Input (Notes 6, 7)
VOOS
Output Offset Voltage
(Notes 6, 7)
∆VOOS/∆T
Output Offset Voltage Drift
(Note 11)
●
2
10
LINERR
Linearity Error
50mV to 350mV (Notes 7, 8)
●
±0.02
±0.15
%
PSRRG
Power Supply Rejection
(Note 9)
±0.02
±0.20
±0.25
%/V
%/V
VIOS
Input Offset Voltage
(Notes 6, 7, 10)
0.4
1.5
mV
∆VIOS/∆T
Input Offset Voltage Drift
(Note 11)
●
2
10
µV/°C
CF = 3
60Hz Fundamental, 200mVRMS
●
0.2
mV
CF = 5
60Hz Fundamental, 200mVRMS
●
5
mV
Accuracy = 1% (Note 14)
●
●
●
µV/°C
Additional Error vs Crest Factor (CF)
Input Characteristics
VIMAX
Maximum Peak Input Swing
●
IVR
Input Voltage Range
ZIN
Input Impedance
Average, Differential (Note 12)
Average, Common Mode (Note 12)
CMRRI
Input Common Mode Rejection
(Note 13)
VIMIN
Minimum RMS Input
PSRRI
Power Supply Rejection
1
1.05
0
1.2
100
●
50
●
(Note 9)
V
V+
●
250
V
MΩ
MΩ
400
µV/V
5
mV
700
µV/V
1968f
2
LTC1968
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are TA = 25°C. V+ = 5V, VOUTRTN = 2.5V, CAVE = 10µF, VIN = 200mVRMS, VENABLE = 0.5V
unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Output Characteristics
●
0
(Note 12)
●
10
(Note 13)
●
OVR
Output Voltage Range
ZOUT
Output Impedance
CMRRO
Output Common Mode Rejection
VOMAX
Maximum Differential Output Swing
Accuracy = 1%, DC Input (Note 14)
PSRRO
Power Supply Rejection
●
1.0
0.9
●
(Note 9)
V+
V
12.5
16
kΩ
50
250
µV/V
1.05
250
V
V
1000
µV/V
Frequency Response
f1P
1% Additional Gain Error (Note 15)
500
kHz
f– 3dB
±3dB Frequency (Note 15)
15
MHz
Power Supplies
V+
Supply Voltage
IS
Supply Current
●
IN1 = 20mV, IN2 = 0V
IN1 = 200mV, IN2 = 0V
●
4.5
5.5
V
2.3
2.4
2.7
mA
mA
0.1
10
Shutdown Characteristics
ISS
Supply Current
VENABLE = 4.5V
●
IIH
ENABLE Pin Current High
VENABLE = 4.5V
●
–1
– 0.1
IIL
ENABLE Pin Current Low
VENABLE = 0.5V
●
–3
–0.5
VTH
ENABLE Threshold Voltage
2.1
V
VHYS
ENABLE Threshold Hysteresis
0.1
V
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The inputs (IN1, IN2) are protected by shunt diodes to GND and
V+. If the inputs are driven beyond the rails, the current should be limited
to less than 10mA.
Note 3: The LTC1968 output (VOUT) is high impedance and can be
overdriven, either sinking or sourcing current, to the limits stated.
Note 4: The LTC1968C/LTC1968I are guaranteed functional over the
operating temperature range of – 40°C to 85°C.
Note 5: The LTC1968C is guaranteed to meet specified performance from
0°C to 70°C. The LTC1968C is designed, characterized and expected to
meet specified performance from – 40°C to 85°C but is not tested nor QA
sampled at these temperatures. The LTC1968I is guaranteed to meet
specified performance from – 40°C to 85°C.
Note 6: High speed automatic testing cannot be performed with
CAVE = 10µF. The LTC1968 is 100% tested with CAVE = 47nF.
Note 7: The LTC1968 is 100% tested with DC and 10kHz input signals.
Measurements with DC inputs from 50mV to 350mV are used to calculate
the four parameters: GERR, VOOS, VIOS and linearity error. Correlation tests
have shown that the performance limits can be guaranteed with the
additional testing being performed to guarantee proper operation of all
internal circuitry.
Note 8: The LTC1968 is inherently very linear. Unlike older log/antilog
circuits, its behavior is the same with DC and AC inputs, and DC inputs are
used for high speed testing.
Note 9: The power supply rejections of the LTC1968 are measured with
DC inputs from 50mV to 350mV. The change in accuracy from V+ = 4.5V
to V+ = 5.5V is divided by 1V.
µA
µA
– 0.1
µA
Note 10: Previous generation RMS-to-DC converters required nonlinear
input stages as well as a nonlinear core. Some parts specify a “DC reversal
error,” combining the effects of input nonlinearity and input offset voltage.
The LTC1968 behavior is simpler to characterize and the input offset
voltage is the only significant source of “DC reversal error.”
Note 11: Guaranteed by design.
Note 12: The LTC1968 is a switched capacitor device and the input/output
impedance is an average impedance over many clock cycles. The input
impedance will not necessarily lead to an attenuation of the input signal
measured. Refer to the Applications Information section titled “Input
Impedance” for more information.
Note 13: The common mode rejection ratios of the LTC1968 are measured
with DC inputs from 50mV to 350mV. The input CMRR is defined as the
change in VIOS measured with the input common mode voltage at 0V and
V+, divided by V+. The output CMRR is defined as the change in VOOS
measured with OUT RTN = 0V and OUT RTN = V+ – 350mV divided by
V+ – 350mV.
Note 14: The LTC1968 input and output voltage swings are limited by
internal clipping. However, its ∆Σ topology is relatively tolerant of
momentary internal clipping.
Note 15: The LTC1968 exploits oversampling and noise shaping to reduce
the quantization noise of internal 1-bit analog-to-digital conversions. At
higher input frequencies, increasingly large portions of this noise are
aliased down to DC. Because the noise is shifted in frequency, it becomes
a low frequency rumble and is only filtered at the expense of increasingly
long settling times. The LTC1968 is inherently wideband, but the output
accuracy is degraded by this aliased noise.
1968f
3
LTC1968
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TYPICAL PERFOR A CE CHARACTERISTICS
Gain and Offset
vs Input Common Mode Voltage
0.4
50mV ≤ VIN ≤ 350mV
0.5
0.8
0.4
0.6
0.3
0.4
0.1
0.2
GAIN ERROR
0
0
VOOS
–0.1
–0.2
VIOS
–0.2
–0.4
0.2
1.0
50mV ≤ VIN ≤ 350mV
0.8
0.6
GAIN ERROR
0.4
0.2
0.1
0
0
–0.1
–0.2
VIOS
VOOS
–0.2
–0.4
–0.3
–0.6
–0.3
–0.6
–0.4
–0.8
–0.4
–0.8
–0.5
–1.0
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
INPUT COMMON MODE VOLTAGE (V)
–0.5
–1.0
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
OUTPUT COMMON MODE VOLTAGE (V)
1968 G02
1968 G01
Gain and Offset vs Supply Voltage
0.5
0.4
0.8
0.4
0.3
0.6
0.3
0.3
0.2
0.2
50mV ≤ VIN ≤ 350mV
0.4
GAIN ERROR
0.1
0
0.2
0
VIOS
–0.1
–0.2
50mV ≤ VIN ≤ 350mV
0.1
0.4
0.1
VIOS
0
0
–0.1
–0.1
GAIN ERROR
–0.2
VOOS
–0.2
–0.2
–0.4
–0.3
–0.6
–0.3
–0.3
–0.4
–0.8
–0.4
–0.4
–0.5
4.5
4.8
5.4
5.7
5.1
SUPPLY VOLTAGE (V)
–1.0
6.0
1968 G03
–0.5
–40
OFFSET VOLTAGE (mV)
VOOS
0.2
GAIN ERROR (%)
0.5
OFFSET VOLTAGE (mV)
GAIN ERROR (%)
Gain and Offset vs Temperature
1.0
0.5
OFFSET VOLTAGE (mV)
0.2
OFFSET VOLTAGE (mV)
GAIN ERROR (%)
0.3
1.0
GAIN ERROR (%)
0.5
Gain and Offset
vs Output Common Mode Voltage
–0.5
–15
35
10
TEMPERATURE (°C)
60
85
1968 G04
1968f
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LTC1968
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TYPICAL PERFOR A CE CHARACTERISTICS
Performance vs Crest Factor
200.2
1kHz
200.0
10kHz
60Hz
199.6
199.4
199.0
2
1
3
CREST FACTOR
4
10kHz
200
40kHz
190
60Hz
5
1kHz
180
170
160
150
–0.15
–0.20
7
8
0
100
0.04
0.02
0
–0.02
–0.04
2.44
2.5
2.42
2.0
1.5
1.0
0
500
0
Power Supply and ENABLE Pin
Current vs ENABLE Voltage
1
2
3
4
SUPPLY VOLTAGE (V)
5
2.38
2.36
2.34
2.30
–55 –35 –15
6
Input Signal Bandwidth
vs RMS Value
2.5
Input Signal Bandwidth
1000
202
200
IEN
0
1.0
–100
0.5
–200
0
OUTPUT DC VOLTAGE (mV)
IS
ENABLE PIN CURRENT (nA)
100
OUTPUT DC VOLTAGE (mV)
200
2.0
1% ERROR
100
1% ERROR
–300
–0.5
–400
–1.0
6
1968 G11
5 25 45 65 85 105 125
TEMPERATURE (°C)
1968 G10
–3dB
4
3
5
2
ENABLE PIN VOLTAGE (V)
2.40
1968 G09
300
500
2.32
1968 G08
3.0
400
Supply Current vs Temperature
3.0
0.5
300
200
300
VIN1 (mV ACRMS)
1968 G07
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
{VOUTDC – |VINDC|} (mV)
0.06
SUPPLY CURRENT (mA)
40kHz
Supply Current vs Supply Voltage
CAVE = 10µF
0.08 VIN2 = MIDSUPPLY
1
60Hz
0
1968 G06
DC Linearity
0
0.05
CREST FACTOR
0.10
1.5
0.10
–0.10
140
1968 G05
–0.06 EFFECT OF OFFSETS
–0.08 MAY BE POSITIVE OR
NEGATIVE AT VIN = 0V
–0.10
–300
100
–500
–100
VIN1 (mV)
0.15
–0.05
200mVRMS SCR WAVEFORMS
130 CAVE = 10µF
5%/DIV
120
6
2
3
5
4
1
199.2
SINEWAVES
CAVE = 10µF
VIN2 = MIDSUPPLY
20Hz
VOUT (mV DC) – VIN (mV ACRMS)
20Hz
200.4
199.8
0.20
210
OUTPUT VOLTAGE (mV DC)
OUTPUT VOLTAGE (mV DC)
200mVRMS SCR WAVEFORMS
200.8 CAVE = 10µF
O.1%/DIV
200.6
AC Linearity
Performance vs Large Crest Factor
220
201.0
10
1k
100k
1M
10M
10k
INPUT SIGNAL FREQUENCY (Hz)
100M
1968 G12
198
196
194
192
190
188
186
1%/DIV
184 CAVE = 10µF
VIN = 200mVRMS
182
1k
10k
100k
1M
100
INPUT SIGNAL FREQUENCY (Hz)
10M
1968 G13
1968f
5
LTC1968
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TYPICAL PERFOR A CE CHARACTERISTICS
40
202
0.5%/DIV
= 10µF
C
201 VAVE= 200mV
IN
RMS
35
200
25
90
VIN2 = MIDSUPPLY
THREE REPRESENTATIVE UNITS
80
30
199
198
70
INPUT CMRR (dB)
VOUT (mV DC)
OUTPUT VOLTAGE (mV)
Input Common Mode Rejection
Ratio vs Frequency
DC Transfer Function Near Zero
Bandwidth to 500kHz
20
15
10
5
197
–5
–10
–30
195
100
200
300
500
400
INPUT FREQUENCY (kHz)
–20
0
10
–10
VIN1 (mV DC)
Output Accuracy
vs Signal Amplitude
VIN2 = MIDSUPPLY
5
0
DC
–5
–1% ERROR
AC – 60Hz
SINEWAVE
–10
–15
–20
0
0.5
1
VIN1 (VRMS)
30
Output Noise vs Device
1.5
2
1967 G17
1
PEAK NOISE MEASURED
IN 10 SECOND PERIOD
CAVE = 1µF
0.1
CAVE = 10µF
0.01
0.001
10k
10M
1967 G16
Output Noise vs Input Frequency
1
PEAK OUTPUT NOISE (% OF READING)
{VOUT (mV DC) – VIN (mVRMS)} (mV)
1% ERROR
40
1968 G15
1968 G14
10
30
20
PEAK OUTPUT NOISE (% OF READING)
0
50
20 4.5V COMMON
MODE INPUT
10 CONVERSION
TO DC OUTPUT
0
100
10k 100k
1M
10
1k
INPUT FREQUENCY (Hz)
0
196
60
CAVE = 100µF
LTC1966
CAVE = 1µF
0.1
LTC1967
CAVE = 1.5µF
LTC1968
CAVE = 6.8µF
0.01
100k
INPUT FREQUENCY (Hz)
1M
1967 G18
10k
100k
1M
1968 G19
INPUT FREQUENCY (Hz)
AVE CAPACITOR CHOSEN FOR EACH DEVICE
TO GIVE A 1 SECOND, 0.1% SETTLING TIME
1k
1968f
6
LTC1968
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PI FU CTIO S
GND (Pin 1): Ground. The power return pin.
IN1 (Pin 2): Differential Input. DC coupled (polarity is
irrelevant).
IN2 (Pin 3): Differential Input. DC coupled (polarity is
irrelevant).
VOUT (Pin 5): Output Voltage. Pin 5 is high impedance. The
RMS averaging is accomplished with a single shunt capacitor from Pin 5 to OUT RTN. The transfer function is
given by:
OUT RTN (Pin 6): Output Return. The output voltage is
created relative to this pin. The VOUT and OUT RTN pins
are not balanced and this pin should be tied to a low
impedance, both AC and DC. Although Pin 6 is often tied
to GND, it can also be tied to any arbitrary voltage:
GND < OUT RTN < (V+ – Max Output)
V+ (Pin 7): Positive Voltage Supply. 4.5V to 5.5V.
ENABLE (Pin 8): An Active-Low Enable Input. LTC1968 is
debiased if open circuited or driven to V+. For normal
operation, pull to GND.
2
Average ⎡(IN2 – IN1) ⎤
⎢⎣
⎥⎦
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( VOUT – OUT RTN) =
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APPLICATIO S I FOR ATIO
RMS-TO-DC CONVERSION
Alternatives to RMS
Definition of RMS
Other ways to quantify dynamic waveforms include peak
detection and average rectification. In both cases, an
average (DC) value results, but the value is only accurate
at the one chosen waveform type for which it is calibrated,
typically sine waves. The errors with average rectification
are shown in Table 1. Peak detection is worse in all cases
and is rarely used.
RMS amplitude is the consistent, fair and standard way to
measure and compare dynamic signals of all shapes and
sizes. Simply stated, the RMS amplitude is the heating
potential of a dynamic waveform. A 1VRMS AC waveform
will generate the same heat in a resistive load as will 1V DC.
Mathematically, RMS is the “Root of the Mean of the
Square”:
VRMS = V2
1V DC
+
–
R
1V ACRMS
R
1V (AC + DC) RMS
R
SAME
HEAT
1968 F01
Figure 1
Table 1. Errors with Average Rectification vs True RMS
WAVEFORM
VRMS
AVERAGE
RECTIFIED
(V)
Square Wave
1.000
1.000
11%
Sine Wave
1.000
0.900
*Calibrate for 0% Error
Triangle Wave
1.000
0.866
–3.8%
SCR at 1/2 Power,
Θ = 90°
1.000
0.637
–29.3%
SCR at 1/4 Power,
Θ = 114°
1.000
0.536
–40.4%
ERROR*
The last two entries of Table 1 are chopped sine waves as
is commonly created with thyristors such as SCRs and
Triacs. Figure 2a shows a typical circuit and Figure 2b
shows the resulting load voltage, switch voltage and load
1968f
7
LTC1968
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APPLICATIO S I FOR ATIO
currents. The power delivered to the load depends on the
firing angle, as well as any parasitic losses such as switch
“ON” voltage drop. Real circuit waveforms will also typically have significant ringing at the switching transition,
dependent on exact circuit parasitics. For the purposes of
this data sheet, “SCR Waveforms” refers to the ideal
chopped sine wave, though the LTC1968 will do faithful
RMS-to-DC conversion with real SCR waveforms as well.
The case shown is for Θ = 90°, which corresponds to 50%
of available power being delivered to the load. As noted in
Table 1, when Θ = 114°, only 25% of the available power
is being delivered to the load and the power drops quickly
as Θ approaches 180°.
With an average rectification scheme and the typical
calibration to compensate for errors with sine waves, the
RMS level of an input sine wave is properly reported; it is
only with a non-sinusoidal waveform that errors occur.
Because of this calibration, and the output reading in
VRMS, the term True-RMS got coined to denote the use of
an actual RMS-to-DC converter as opposed to a calibrated
average rectifier.
the lowpass filter. The input to the LPF is the calculation
from the multiplier/divider; (VIN)2/VOUT. The lowpass
filter will take the average of this to create the output,
mathematically:
⎛ ( V )2 ⎞
IN
VOUT = ⎜
⎟,
⎜ VOUT ⎟
⎠
⎝
Because VOUT is DC,
2
⎛ ( V )2 ⎞ ⎛⎝ ( VIN ) ⎞⎠
IN
, so
⎟=
⎜
⎜ VOUT ⎟
V
OUT
⎠
⎝
VOUT
⎛ ( V )2 ⎞
⎝ IN ⎠
=
, and
VOUT
( VOUT )2 = ( VIN )2, or
VOUT =
( VIN )2 = RMS( VIN )
(VIN )2
VOUT
+ VLOAD –
AC
MAINS
+
ILOAD
VLINE
CONTROL
+
–
VTHY
VIN
× ÷
LPF
VOUT
1968 F03
–
1968 F02a
Figure 2a
Figure 3. RMS-to-DC Converter with Implicit Computation
Unlike the prior generation RMS-to-DC converters, the
LTC1968 computation does NOT use log/antilog circuits,
which have all the same problems, and more, of log/
antilog multipliers/dividers, i.e., linearity is poor, the bandwidth changes with the signal amplitude and the gain drifts
with temperature.
VLINE
Θ
VLOAD
VTHY
ILOAD
1968 F02b
Figure 2b
How an RMS-to-DC Converter Works
Monolithic RMS-to-DC converters use an implicit computation to calculate the RMS value of an input signal. The
fundamental building block is an analog multiply/divide
used as shown in Figure 3. Analysis of this topology is
easy and starts by identifying the inputs and the output of
How the LTC1968 RMS-to-DC Converter Works
The LTC1968 uses a completely new topology for RMS-toDC conversion, in which a ∆Σ modulator acts as the
divider, and a simple polarity switch is used as the multiplier1 as shown in Figure 4.
1Protected by multiple patents.
1968f
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LTC1968
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APPLICATIO S I FOR ATIO
Dα
VIN
VOUT
Note that the internal scalings are such that the ∆Σ output
duty cycle is limited to 0% or 100% only when VIN exceeds
±4 • VOUT.
∆-Σ
REF
VIN
Linearity of an RMS-to-DC Converter
±1
LPF
VOUT
1968 F04
Figure 4. Topology of LTC1968
The ∆Σ modulator has a single-bit output whose average
duty cycle (D) will be proportional to the ratio of the input
signal divided by the output. The ∆Σ is a 2nd order
modulator with excellent linearity. The single-bit output is
used to selectively buffer or invert the input signal. Again,
this is a circuit with excellent linearity, because it operates
at only two points: ±1 gain; the average effective multiplication over time will be on the straight line between these
two points. The combination of these two elements again
creates a lowpass filter input signal equal to (VIN)2/VOUT,
which, as shown above, results in RMS-to-DC conversion.
The lowpass filter performs the averaging of the RMS
function and must be a lower corner frequency than the
lowest frequency of interest. For line frequency measurements, this filter is simply too large to implement on-chip,
but the LTC1968 needs only one capacitor on the output
to implement the lowpass filter. The user can select this
capacitor depending on frequency range and settling time
requirements, as will be covered in the Design Cookbook
section to follow.
This topology is inherently more stable and linear than log/
antilog implementations primarily because all of the signal
processing occurs in circuits with high gain op amps
operating closed loop.
More detail of the LTC1968 inner workings is shown in the
Simplified Schematic towards the end of this data sheet.
INPUT
INPUT CIRCUITRY
• VIOS
• INPUT NONLINEARITY
Linearity may seem like an odd property for a device that
implements a function that includes two very nonlinear
processes: squaring and square rooting.
However, an RMS-to-DC converter has a transfer function, RMS volts in to DC volts out, that should ideally have
a 1:1 transfer function. To the extent that the input to
output transfer function does not lie on a straight line, the
part is nonlinear.
A more complete look at linearity uses the simple model
shown in Figure 5. Here an ideal RMS core is corrupted by
both input circuitry and output circuitry that have imperfect transfer functions. As noted, input offset is introduced
in the input circuitry, while output offset is introduced in
the output circuitry.
Any nonlinearity that occurs in the output circuity will
corrupt the RMS in to DC out transfer function. A nonlinearity in the input circuitry will typically corrupt that
transfer function far less simply because with an AC input,
the RMS-to-DC conversion will average the nonlinearity
from a whole range of input values together.
But the input nonlinearity will still cause problems in an
RMS-to-DC converter because it will corrupt the accuracy
as the input signal shape changes. Although an RMS-toDC converter will convert any input waveform to a DC
output, the accuracy is not necessarily as good for all
waveforms as it is with sine waves. A common way to
describe dynamic signal wave shapes is Crest Factor. The
crest factor is the ratio of the peak value relative to the RMS
value of a waveform. A signal with a crest factor of 4, for
instance, has a peak that is four times its RMS value.
IDEAL
RMS-TO-DC
CONVERTER
OUTPUT CIRCUITRY
• VOOS
• OUTPUT NONLINEARITY
OUTPUT
1968 F05
Figure 5. Linearity Model of an RMS-to-DC Converter
1968f
9
LTC1968
U
W
U U
APPLICATIO S I FOR ATIO
Because this peak has energy (proportional to voltage
squared) that is 16 times (42) the energy of the RMS value,
the peak is necessarily present for at most 6.25% (1/16)
of the time.
The LTC1968 performs very well with crest factors of 4 or
less and will respond with reduced accuracy to signals
with higher crest factors. The high performance with crest
factors less than 4 is directly attributable to the high
linearity throughout the LTC1968.
DESIGN COOKBOOK
The LTC1968 RMS-to-DC converter makes it easy to
implement a rather quirky function. For many applications
all that will be needed is a single capacitor for averaging,
appropriate selection of the I/O connections and power
supply bypassing. Of course, the LTC1968 also requires
power. A wide variety of power supply configurations are
shown in the Typical Applications section towards the end
of this data sheet.
lowest frequency signals of interest. For a single averaging
capacitor, the accuracy at low frequencies is depicted in
Figure 6.
Figure 6 depicts the so-called “DC error” that results at a
given combination of input frequency and filter capacitor
values2. It is appropriate for most applications, in which
the output is fed to a circuit with an inherently band-limited
frequency response, such as a dual slope/integrating A/D
converter, a ∆Σ A/D converter or even a mechanical analog
meter.
However, if the output is examined on an oscilloscope with
a very low frequency input, the incomplete averaging will
be seen, and this ripple will be larger than the error
depicted in Figure 6. Such an output is depicted in
Figure 7. The ripple is at twice the frequency of the input
2This frequency-dependent error is in additon to the static errors that affect all readings and are
therefore easy to trim or calibrate out. The “Error Analyses” section to follow discusses the effect
of static error terms.
ACTUAL OUTPUT
WITH RIPPLE
f = 2 × fINPUT
The RMS or root-mean-squared value of a signal, the root
of the mean of the square, cannot be computed without
some averaging to obtain the mean function. The LTC1968
true RMS-to-DC converter utilizes a single capacitor on
the output to do the low frequency averaging required for
RMS-to-DC conversion. To give an accurate measure of a
dynamic waveform, the averaging must take place over a
sufficiently long interval to average, rather than track, the
OUTPUT
Capacitor Value Selection
IDEAL
OUTPUT
DC
ERROR
(0.05%)
PEAK
RIPPLE
(5%)
PEAK
ERROR =
DC ERROR +
PEAK RIPPLE
(5.05%)
DC
AVERAGE
OF ACTUAL
OUTPUT
TIME
1968 F07
Figure 7. Output Ripple Exceeds DC Error
0
–0.2
C = 47µF
–0.4
C = 22µF
DC ERROR (%)
–0.6
–0.8
–1.0
C = 10µF
C = 4.7µF
C = 2.2µF
C = 1µF
C = 0.47µF
C = 0.22µF
–1.2
–1.4
–1.6
–1.8
–2.0
1
10
INPUT FREQUENCY (Hz)
100
1968 F06
Figure 6. DC Error vs Input Frequency
1968f
10
LTC1968
U
W
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APPLICATIO S I FOR ATIO
0
–0.2
PEAK ERROR (%)
–0.4
–0.6
C = 220µF
C = 100µF
C = 47µF
C = 22µF
C = 10µF
C = 4.7µF
C = 2.2µF
C =1µF
–0.8
–1.0
–1.2
–1.4
–1.6
–1.8
–2.0
1
10
100
1000
INPUT FREQUENCY (Hz)
1968 F08
Figure 8. Peak Error vs Input Frequency with One Cap Averaging
because of the computation of the square of the input. The
typical values shown, 5% peak ripple with 0.05% DC error,
occur with CAVE = 10µF and fINPUT = 6Hz.
If the application calls for the output of the LTC1968 to feed
a sampling or Nyquist A/D converter (or other circuitry
that will not average out this double frequency ripple) a
larger averaging capacitor can be used. This trade-off is
depicted in Figure 8. The peak ripple error can also be
reduced by additional lowpass filtering after the LTC1968,
but the simplest solution is to use a larger averaging
capacitor.
A 10µF capacitor is a good choice for many applications.
The peak error at 50Hz/60Hz will be 200kHz inputs.
– This is a fundamental characteristic of this topology. The LTC1968 is designed to work very well
with inputs of 100kHz or less. It works okay as high
as 1MHz, but it is limited by aliased ∆Σ noise.
Solution: Bandwidth limit the input or digitally filter
the resulting output.
8. Large errors occur at crest factors approaching, but
less than 4.
– Insufficient averaging.
Solution: Increase CAVE. See “Crest Factor and AC +
DC Waveforms” section for discussion of output
droop.
10. Gain is low by ≅1% or more, no other problems.
– Probably due to circuit loading. With a DMM or a
10× scope probe, ZIN = 10MΩ. The LTC1968
output is 12.5kΩ, resulting in – 0.125% gain
error. Output impedance is higher with the DC
accurate post filter.
Solution: Remove the shunt loading or buffer the
output.
– Loading can also be caused by cheap averaging
capacitors.
Solution: Use a high quality metal film capacitor
for CAVE.
LOADING DRAGS DOWN GAIN
9. Screwy results, errors > spec limits, typically 1% to 5%.
– High impedance (12.5kΩ) and high accuracy (0.1%)
require clean boards! Flux residue, finger grime, etc.
all wreak havoc at this level.
LTC1968
Solution: Wash the board.
VOUT
KEEP BOARD CLEAN
mV
5
12.5k
OUT RTN
6
DCV
10M
DMM
200mVRMS IN
–0.125%
LTC1968
1968 TS10
1968 TS09
1968f
25
LTC1968
W
W
SI PLIFIED SCHE ATIC
V+
C12
GND
C1
∫
Y1
∫
Y2
C2
IN1
2nd ORDER ∆Σ MODULATOR
IN2
C3
C5
C7
+
C9
+
A1
–
C4
OUTPUT
C8
CAVE
C11
A2
–
OUT RTN
1968 SS
C6
C10
CLOSED
DURING
SHUTDOWN
EN
TO BIAS CONTROL
50k
BLEED RESISTOR
FOR CAVE
U
TYPICAL APPLICATIO S
Single Supply RMS Current Measurement
5V Single Supply, Differential,
AC-Coupled RMS-to-DC Converter
V+
5V
V+
LTC1968
AC INPUTS
(1VPEAK
DIFFERENTIAL)
IN1
VOUT
IN2 OUT RTN
CC
1µF
GND
CAVE
10µF
DC OUTPUT
AC CURRENT
75A MAX
50Hz TO 400Hz
T1
IN1
LTC1968
VOUT
10Ω
IN2 OUT RTN
10k
EN
GND
CAVE
10µF
VOUT = 4mVDC/ARMS
EN
1968 TA03
1968 TA02
0.1µF
10k
T1: CR MAGNETICS CR8348-2500-N
www.crmagnetics.com
1968f
26
LTC1968
U
TYPICAL APPLICATIO S
±2.5V Supplies, Single Ended, DC-Coupled
RMS-to-DC Converter with Shutdown
0.1µF
X7R
2.5V
≥2V
OFF ON
2.5V
VOLTAGE
NOISE IN
–2.5V
≤–2V
EN
DC + AC
INPUT
(1VPEAK)
RMS Noise Measurement
2.5V
V+
100Ω
LTC1968
IN1
V+
+
VOUT
CAVE
10µF
IN2 OUT RTN
LTC1968
1k
1/2
LTC6203
GND
–2.5V
100Ω
–2.5V
EN
0.1µF
100k
1mVDC
1µVRMS OF INPUT NOISE
CAVE
10µF
IN2 OUT RTN
GND
1968 TA04
VOUT
IN1
–
DC OUTPUT
VOUT =
1968 TA05
–2.5V
BW ≈ 1kHz TO 100kHz
INPUT SENSITIVITY = 1µVRMS TYP
1.5µF
U
PACKAGE DESCRIPTIO
MS8 Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660)
0.889 ± 0.127
(.035 ± .005)
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
0.65
(.0256)
BSC
0.42 ± 0.038
(.0165 ± .0015)
TYP
8
7 6 5
0.52
(.0205)
REF
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
4.90 ± 0.152
(.193 ± .006)
DETAIL “A”
0° – 6° TYP
GAUGE PLANE
1
0.53 ± 0.152
(.021 ± .006)
DETAIL “A”
2 3
4
1.10
(.043)
MAX
0.86
(.034)
REF
0.18
(.007)
SEATING
PLANE
0.22 – 0.38
(.009 – .015)
TYP
0.65
(.0256)
BSC
0.127 ± 0.076
(.005 ± .003)
MSOP (MS8) 0204
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
1968f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
27
LTC1968
U
TYPICAL APPLICATIO
Audio Amplitude Compressor
R5
5.9k
ATTENUATE
BY 1/4
V+
LT1256
R2
1k
VIN
R1
100k
C2
0.47µF
R3
7.5k
2
–
1
+
9
A1
R4
2.49k
C1
47nF
14
7
A2
13
–
ATTENUATION CONTROL
R9
10k
R6
2k
VOUT
+
GAIN OF 4
R8
15k
R15
47Ω
8
V– V +
VC
RC
3
5
RFS
10
VFS
R13
3.3k
12
C3
0.1µF
R7
5.9k
V+
R14
3.3k
V+
–
+
V–
VDD
R10
200k
LT1636
C5
0.22µF
C4
1µF
LTC1968
IN1
VOUT
OUT RTN IN2
R12
1k
0.1µF
GND EN
1968 TA07
RELATED PARTS
PART NUMBER
®
DESCRIPTION
COMMENTS
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Negative, –5V Fixed, Micropower LDO Regulator
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LT1494
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SOT-23 Rail-to-Rail Output Precision Op Amp
1.2mA IS, 150µV VOS(MAX), 900pA IOS(MAX)
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150µA IS, 3µV VOS(MAX), 150pA IB(MAX)
LT2178/LT2178A
17µA Max, Single Supply Precision Dual Op Amp
14µA IS, 120µV VOS(MAX), 350pA IOS(MAX)
LTC1966
Precision Micropower ∆Σ RMS-to-DC Converter
155µA IS
LTC1967
Precision Extended Bandwidth RMS-to-DC Converter
320µA IS
LTC2402
2-Channel, 24-bit, Micropower, No Latency ∆ΣTM ADC
200µA IS, 4ppm INL, 10ppm TUE
LTC2420
20-bit, Micropower, No Latency ∆Σ ADC in SO-8
200µA IS, 8ppm INL, 16ppm TUE
LTC2422
2-Channel, 20-bit, Micropower, No Latency ∆Σ ADC
Dual channel version of LTC2420
No Latency ∆Σ is a trademark of Linear Technology Corporation.
1968f
28
Linear Technology Corporation
LT/TP 0604 1K • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
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