LTC3423EMS

FEATURES s s s LTC3423/LTC3424 Low Output Voltage, 3MHz Micropower Synchronous Boost Converters DESCRIPTIO The LTC®3423 and LTC3424 are high efficiency, fixed frequency, step-up DC/DC converters that can regulate output voltages as low as 1.5V from a single cell. An applied voltage of at least 2.7V to the VDD pin is required to power the internal control circuitry. The devices include a 0.16Ω N-channel MOSFET switch and a 0.21Ω P-channel synchronous rectifier. The LTC3423 is intended for applications requiring less than 0.75W of output power and the LTC3424 for 1.5W or less. Switching frequencies up to 3MHz are programmed with an external timing resistor and the oscillator can be synchronized to an external clock. Quiescent current is only 38µA in Burst Mode operation, maximizing battery life in portable applications. Burst Mode operation is user controlled and can be enabled by driving the MODE/SYNC pin high. If the MODE/SYNC pin has either a clock or is driven low then the operation is at constant fixed frequency. Other features include a 1µA shutdown, thermal shutdown and current limit. The LTC3423 and LTC3424 are available in the 10-lead MSOP package. For applications requiring an output voltage greater than 2.6V, the LTC3401 and LTC3402 are recommended without the need of a separate voltage for the VDD pin. s s s s s s s s s 1.5V to 5.5V Adjustable Output Voltage Synchronous Rectification: Up to 95% Efficiency 1A Switch Current (LTC3423) or 2A Switch Current (LTC3424) Fixed Frequency Operation Up to 3MHz Wide Input Range: 0.5V to 5.5V (Operating) Very Low Quiescent Current: 38µA (Burst Mode® Operation) No External Schottky Diode Required Synchronizable Switching Frequency Burst Mode Enable Control OPTI-LOOP® Compensation Very Low Shutdown Current: < 1µA Small 10-Pin MSOP Package APPLICATIO S s s s s s s Pagers Handheld Instruments Cordless Phones Wireless Handsets GPS Receivers Battery Backup , LTC and LT are registered trademarks of Linear Technology Corporation. Burst Mode and OPTI-LOOP are registered trademarks of Linear Technology Corporation. TYPICAL APPLICATIO VDD VDD = 2.7V TO 5.5V VIN = 0.9V TO 1.5V L1 2.2µH 1-Cell to 1.8V at 600mA Step-Up Converter Efficiency VOUT 1.8V 600mA SW VOUT FB 4 7 EFFICIENCY (%) 100 90 Burst Mode OPERATION 6 10 1 CELL 3 2 C1 2.2µF C2 10µF 1 LTC3424 VDD SHDN VIN R1 110k C3 44µF (2× 22µF) C4 470pF RC 82k C5 4.7pF R2 249k 80 70 60 50 40 30 20 10 0 0.1 + – 8 9 5 MODE/SYNC VC Rt GND Rt 30.1k 0 = FIXED FREQ 1 = Burst Mode OPERATION C1: TAIYO YUDEN JMK212BJ225MG C2: TAIYO YUDEN JMK212BJ106MM C3: TAIYO YUDEN JMK325BJ226MM L1: SUMIDA CD43-2R2M 3423/24 TA01 U U U VIN = 1.5V VIN = 1.2V VIN = 0.9V VDD = 3.3V VOUT = 1.8V WITH MBRM120T3 SCHOTTKY 1 10 100 OUTPUT CURRENT (mA) 1000 3223/24 TA02 34234f 1 LTC3423/LTC3424 ABSOLUTE (Note 1) AXI U RATI GS PACKAGE/ORDER I FOR ATIO TOP VIEW Rt MODE VIN SW GND 1 2 3 4 5 10 9 8 7 6 SHDN VC FB VOUT VDD VIN, VOUT, VDD Voltages .............................. – 0.5V to 6V SW Voltage ................................................. – 0.5V to 6V VC, Rt Voltages ......................... – 0.5V to (VOUT + 0.3V) SHDN, FB, MODE Voltages ......................... – 0.5V to 6V Operating Temperature Range (Note 2) .. – 40°C to 85°C Storage Temperature Range ................. – 65°C to 125°C Lead Temperature (Soldering, 10 sec).................. 300°C ORDER PART NUMBER LTC3423EMS LTC3424EMS MS PART MARKING LTQM LTQN MS PACKAGE 10-LEAD PLASTIC MSOP TJMAX = 125°C θJA = 130°C/ W 1 LAYER BOARD θJA = 100°C/ W 4 LAYER BOARD Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS PARAMETER VDD Input Voltage Range VIN Operating Voltage Range Output Voltage Adjust Range Feedback Voltage Feedback Input Current Quiescent Current—Burst Mode Operation Quiescent Current—SHDN Quiescent Current—Active NMOS Switch Leakage PMOS Switch Leakage NMOS Switch On Resistance PMOS Switch On Resistance NMOS Current Limit Maximum Duty Cycle Minimum Duty Cycle Frequency Accuracy MODE/SYNC Input High MODE/SYNC Input Low MODE/SYNC Input Current Error Amp Transconductance Rt = 15k LTC3423 LTC3424 Rt = 15k (Note 4) The q denotes specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 1.2V, VDD = 3.3V, VOUT = 1.8V, unless otherwise noted. CONDITIONS q q q q MIN 2.7 0.5 1.5 1.22 TYP MAX 5.5 5.5 5.5 UNITS V V V V nA µA µA µA µA µA Ω Ω A A % 1.25 1 38 0.1 440 0.1 0.1 0.16 0.21 1.28 50 65 1 800 5 10 VFB = 1.25V VC = 0V, MODE/SYNC = 3.3V (Note 3) SHDN = 0V, Not Including Switch Leakage VC = 0V, MODE/SYNC = 0V, Rt = 300k (Note 3) q q q q q 1 2 80 1.6 1.4 1.6 2.8 85 0 2 2.4 0.4 VMODE/SYNC = 5.5V ∆I = – 5µA to 5µA, VC = VFB 0.01 85 1 µmhos 2 U % MHz V V µA 34234f W U U WW W LTC3423/LTC3424 ELECTRICAL CHARACTERISTICS PARAMETER SHDN Input High SHDN Input Low SHDN Input Current The q denotes specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 1.2V, VOUT = 3.3V unless otherwise noted. CONDITIONS VSHDN = VIN = VOUT VSHDN = 5.5V MIN 1 0.4 0.01 1 TYP MAX UNITS V V µA Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LTC3423/LTC3424 are guaranteed to meet performance specifications from 0°C to 70°C. Specifications over the –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: Current is measured into VDD since the supply current is bootstrapped to the VDD pin. The outputs are not switching. Note 4: Once the output is started, the IC is not dependant upon the VIN supply. TYPICAL PERFOR A CE CHARACTERISTICS Switching Waveform on SW Pin Transient Response 150mA to 450mA SW 0.5V/DIV 0V ILOAD = 500mA VOUT 1.8V 100ns/DIV 3423/24 G01 Burst Mode Operation at 500µA Load VOUT 100mV/DIV AC COUPLED VOUT 100mV/DIV AC COUPLED SW 1V/DIV 1ms/DIV VIN = 1.2V VOUT = 1.8V COUT = 44µF MODE/SYNC PIN = HIGH UW VOUT 100mV/DIV AC COUPLED IOUT 450mA 150mA COUT = 44µF L = 2.2µH fOSC = 1MHz 200µs/DIV 3423/24 G02 Burst Mode Operation at 10mA Load SW 1V/DIV 3423/24 G03 VIN = 1.2V 500µs/DIV VOUT = 1.8V COUT = 44µF MODE/SYNC PIN = HIGH 3423/24 G04 34234f 3 LTC3423/LTC3424 TYPICAL PERFOR A CE CHARACTERISTICS Converter Efficiency 1.2V to 1.8V 100 90 80 EFFICIENCY (%) 300MHz Burst Mode OPERATION 3MHz 70 CURRENT (A) 60 50 40 30 20 10 0 0.1 1MHz 2.8 2.6 2.4 2.2 CURRENT (A) WITH MBRM120T3 SCHOTTKY 10 100 1 OUTPUT CURRENT (mA) 1000 3223/24 G05 EA FB Voltage 1.28 1.27 2.05 2.10 FREQUENCY (MHz) VOLTAGE (V) 1.26 1.25 1.24 1.23 1.22 –55 RESISTANCE (Ω) –15 65 TEMPERATURE (°C) 25 PMOS RDS(ON) 0.40 VOUT = 1.8V VDD = 3.3V 14 12 0.35 EFFICIENCY LOSS (%) RESISTANCE (Ω) 0.30 0.25 0.20 2 0.15 –55 0 0.2 –15 4 UW 3423/24 G08 LTC3424 Current Limit 3.4 3.2 3.0 1.80 1.75 1.70 1.65 1.60 1.55 1.50 1.45 –15 65 TEMPERATURE (°C) 25 105 125 3423/24 G06 LTC3423 Current Limit 2.0 –55 1.40 –55 –15 25 65 TEMPERATURE (°C) 105 125 3423/24 G07 Oscillator Frequency Accuracy RT = 15k 0.30 NMOS RDS(ON) VOUT = 1.8V VDD = 3.3V 0.25 0.20 2.00 0.15 1.95 0.10 105 125 1.90 –55 –15 65 TEMPERATURE (°C) 25 105 125 3423/24 G09 0.05 –55 –15 25 65 TEMPERATURE (°C) 105 125 3423/24 G10 Efficiency Loss Without Schottky vs Frequency TA = 25°C 10 8 6 4 65 TEMPERATURE (°C) 25 105 125 3423/24 G11 0.6 2.2 1.0 1.4 1.8 FREQUENCY (MHz) 2.6 3.0 3423/24 G12 34234f LTC3423/LTC3424 TYPICAL PERFOR A CE CHARACTERISTICS Shutdown Threshold 1.10 1.05 1.00 0.95 0.90 0.85 0.80 0.75 0.70 0.65 0.60 –55 –15 65 TEMPERATURE (°C) 25 105 125 3423/24 G13 CURRENT (µA) VOLTAGE (V) PI FU CTIO S Rt (Pin 1): Timing Resistor to Program the Oscillator Frequency. fOSC = 3 • 1010 Hz Rt MODE/SYNC (Pin 2): Burst Mode Select and Oscillator Synchronization. MODE/SYNC = High. Enable Burst Mode operation. The inductor peak inductor current will be 400mA and return to zero current on each cycle. During Burst Mode operation the operation is variable frequency, providing a significant efficiency improvement at light loads. It is recommended the Burst Mode operation only be entered once the part has started up. MODE/SYNC = Low. Disable Burst Mode operation and maintain low noise, constant frequency operation. MODE/SYNC = External CLK. Synchronization of the internal oscillator and Burst Mode operation disable. A clock pulse width of 100ns to 2µs is required to synchronize. VIN (Pin 3): Voltage Sense for Internal Circuitry. UW Burst Mode Operation Current 44 42 40 38 36 34 32 30 –55 –15 25 65 TEMPERATURE (°C) 105 125 3423/24 G14 U U U SW (Pin 4): Switch Pin. Connect inductor and optional Schottky diode here. Minimize trace length to keep EMI down. GND (Pin 5): Signal and Power Ground for the IC. VDD (Pin 6): Power Source for the IC. Typically derived from a higher voltage power converter. Requires an input of 2.7V to 5.5V. A 2.2µF ceramic bypass capacitor is recommended as close to the pins as possible. VOUT (Pin 7): Output of the Synchronous Rectifier. FB (Pin 8): Feedback Pin. Connect resistor divider tap here. The output voltage can be adjusted from 1.5V to 5.5V. The feedback reference voltage is typically 1.25V. VC (Pin 9): Error Amp Output. A frequency compensation network is connected to this pin to compensate the loop. See the section “Compensating the Feedback Loop” for guidelines. SHDN (Pin 10): Shutdown. Grounding this pin shuts down the IC. Tie to >1V to enable (VDD or digital gate output). During shutdown the output voltage will hold up to VIN minus a diode drop due to the body diode of the PMOS synchronous switch. If the application requires a complete disconnect during shutdown then refer to section “Output Disconnect”. 34234f 5 LTC3423/LTC3424 BLOCK DIAGRA 3 VIN SHDN 10 SHUTDOWN GND 5 1.6A TYP (LTC3423) 2.8A TYP (LTC3424) PWM LOGIC SLEEP Rt 1 OSC SYNC SLOPE COMP 6 + VDD 2.7V TO 5.5V 6 VDD + Σ – 9 Burst Mode CONTROL – CURRENT COMP ERROR AMP 8 + – – + CURRENT LIMIT – + W + 1V TO VOUT + 0.3 OPTIONAL SW P 7 VOUT 4 VOUT 1.5V TO 5.5V ANTICROSS CONDITION N 10mV + – IZERO AMP ISENSE AMP + 1.25V R1 FB VC R2 2 MODE/SYNC 3423/24 BD 34234f LTC3423/LTC3424 APPLICATIO S I FOR ATIO DETAILED DESCRIPTION The LTC3423/LTC3424 provides high efficiency, low noise power for applications such as portable instrumentation and are ideal for applications that require an output voltage between 1.5V and 2.6V from a single cell. These products are an addition to the LTC3401 and LTC3402 family of synchronous boost converters, with the differences being the omission of the power good function (PGOOD) and the addition of a VDD input to provide internal power. The IC will not start up until the applied voltage on the VDD pin is above 2.7V. The current mode architecture with adaptive slope compensation provides ease of loop compensation with excellent transient load response. The low RDS(ON), low gate charge synchronous switches provides the pulse width modulation control at high efficiency. Low Noise Fixed Frequency Operation Oscillator. The frequency of operation is set through a resistor from the Rt pin to ground where f = 3 • 1010/Rt. An internally trimmed timing capacitor resides inside the IC. The oscillator can be synchronized with an external clock inserted on the MODE/SYNC pin. When synchronizing the oscillator, the free running frequency must be set to approximately 30% lower than the desired synchronized frequency. Keeping the sync pulse width below 2µs will ensure that Burst Mode operation is disabled. Current Sensing. Lossless current sensing converts the peak current signal to a voltage to sum in with the internal slope compensation. This summed signal is compared to the error amplifier output to provide a peak current control command for the PWM. The slope compensation in the IC is adaptive to the input and output voltage. Therefore, the converter provides the proper amount of slope compensation to ensure stability and not an excess causing a loss of phase margin in the converter. Error Amp. The error amplifier is a transconductance amplifier with gm = 85µmhos. A simple compensation network is placed from the VC pin to ground. Current Limit. The current limit amplifier will shut the NMOS switch off once the current exceeds its threshold. The current amplifier delay to output is typically 50ns. U Zero Current Amp. The zero current amplifier monitors the inductor current to the output and shuts off the synchronous rectifier once the current is below 50mA, preventing negative inductor current. Burst Mode Operation Burst Mode operation is when the IC delivers energy to the output until it is regulated and then goes into a sleep mode where the outputs are off and the IC is consuming only 38µA. In this mode, the output ripple has a variable frequency component with load current and the steady state ripple will be typically below 3%. During the period where the device is delivering energy to the output, the peak current will be equal to 400mA and the inductor current will terminate at zero current for each cycle. In this mode the maximum output current is given by: W UU IOUT (MAXBURST) ≈ VIN Amps 6 • VOUT Burst Mode operation is user controlled by driving the MODE/SYNC pin high to enable and low to disable. It is recommended that Burst Mode operation be entered after the part has started up. COMPONENT SELECTION Inductor Selection The high frequency operation of the LTC3423/LTC3424 allows the use of small surface mount inductors. The minimum inductance value is proportional to the operating frequency and is limited by the following constraints: VIN(MIN) • VOUT (MAX) – VIN(MIN) k H L > µH and L > f • Ripple • VOUT (MAX) f where k = 3 for LTC3423, 2 for LTC3424 f = Operating Frequency (Hz) Ripple = Allowable Inductor Current Ripple (A) VIN(MIN) = Minimum Input Voltage (V) VOUT(MAX) = Maximum Output Voltage (V) 34234f ( ) 7 LTC3423/LTC3424 APPLICATIO S I FOR ATIO The inductor current ripple is typically set to 20% to 40% of the maximum inductor current. For high efficiency, choose an inductor with a high frequency core material, such as ferrite, to reduce core losses. The inductor should have low ESR (equivalent series resistance) to reduce the I2R losses and must be able to handle the peak inductor current at full load without saturating. Molded chokes or chip inductors usually do not have enough core to support the peak inductor currents in the 1A to 2A region. To minimize radiated noise, use a toroid, pot core or shielded bobbin inductor. See Table 1 for a list of component suppliers. Table 1. Inductor Vendor Information SUPPLIER Coilcraft Coiltronics Murata Sumida USA: (847) 956-0666 (847) 956-0702 Japan: 81-3-3607-5111 81-3-3607-5144 www.japanlink.com sumida PHONE (847) 639-6400 (516) 241-7876 (814) 237-1431 (800) 831-9172 FAX (847) 639-1469 (516) 241-9339 (814) 238-0490 WEBSITE www.coilcraft.com www.coiltronics.com www.murata.com SHDN Rt MODE VC VIN FB SW VOUT GND VDD VDD IN 2.7V TO 5.5V VOUT 3423/24 F01 Figure 1. Recommended Component Placement. Traces Carrying High Current Are Direct. Trace Area FB and VC Pins Are Kept Low. Lead Length to Battery Should be Kept Short Output Capacitor Selection The output voltage ripple has several components. The bulk value of the capacitor is set to reduce the ripple due to charge into the capacitor each cycle. The max ripple due to charge is given by: VRBULK = IL • VIN (VOUT – VIN) Volts C OUT • VOUT • VOUT • f 8 U where IL = Average Inductor Current IP = Peak Inductor Current The ESR is usually the most dominant factor for ripple in most power converters. The ripple due to capacitor ESR is simply given by: VRCESR = IP • RESR Volts where RESR = Capacitor Series Resistance Low ESR capacitors should be used to minimize output voltage ripple. For surface mount applications, AVX TPS series tantalum capacitors and Sanyo POSCAP or TaiyoYuden ceramic capacitors are recommended. For throughhole applications Sanyo OS-CON capacitors offer low ESR in a small package size. See Table 2 for a list of component suppliers. In some layouts it may be required to place a 1µF low ESR capacitor as close to the VOUT and GND pins as possible. Table 2. Capacitor Vendor Information SUPPLIER AVX Sanyo Taiyo Yuden PHONE (803) 448-9411 (619) 661-6322 (408) 573-4150 FAX (803) 448-1943 (619) 661-1055 (408) 573-4159 WEBSITE www.avxcorp.com www.sanyovideo.com www.t-yuden.com W UU Input Capacitor Selection The input filter capacitor reduces peak currents drawn from the input source and reduces input switching noise. In most applications a 3.3µF is sufficient. Output Diode The Schottky diode across the synchronous PMOS switch is not required, but provides a lower drop during the breakbefore-make time (typically 20ns) of the NMOS to PMOS transition. The addition of the Schottky diode will improve peak efficiency (see graph “Efficiency Loss Without Schottky vs Frequency”). Use of a Schottky diode such as a MBRM120T3, 1N5817 or equivalent. Since slow recovery times will compromise efficiency, do not use ordinary rectifier diodes. 34234f LTC3423/LTC3424 APPLICATIO S I FOR ATIO Operating Frequency Selection There are several considerations in selecting the operating frequency of the converter. The first is determining the sensitive frequency bands that cannot tolerate any spectral noise. For example, in products incorporating RF communications, the 455kHz IF frequency is sensitive to any noise, therefore switching above 600kHz is desired. Some communications have sensitivity to 1.1MHz. In this case, converter frequencies up to 3MHz may be employed. The second consideration is the physical size of the converter. As the operating frequency goes up, the inductor and filter caps go down in value and size. The trade off is in efficiency since the switching losses due to gate charge are going up proportional with frequency. Another operating frequency consideration is whether the application can allow “pulse skipping.” In this mode, the minimum on time of the converter cannot support the duty cycle, so the converter ripple will go up and there will be a low frequency component of the output ripple. In many applications where physical size is the main criterion then running the converter in this mode is acceptable. In applications where it is preferred not to enter this mode, then the maximum operating frequency is given by: fMAX _ NOSKIP VOUT – VIN Hz = VOUT • tON(MIN) where tON(MIN) = minimum on time = 140ns Reducing Output Capacitance with a Load Feed Forward Signal In many applications the output filter capacitance can be reduced for the desired transient response by having the device commanding the change in load current, (i.e. system microcontroller), inform the power converter of the changes as they occur. Specifically, a “load feed forward” signal coupled into the VC pin gives the inner current loop a head start in providing the change in output current. The transconductance of the LTC3423 converter at the VC pin with respect to the inductor current is typically U 130mA/100mV, and the LTC3424 is typically 170mA/ 100mV, so the amount of signal injected is proportional to the anticipated change of inductor current with load. The outer voltage loop performs the remainder of the correction, but because of the load feed forward signal, the range over which it must slew is greatly reduced. This results in an improved transient response. A logic level feed forward signal, VFF, is coupled through components C5 and R6. The amount of feed forward signal is attenuated with resistor R6 and is given by the following relationship:  V • R5 • VIN • 1.5 R6 ≈  FF  – R5  VOUT • ∆IOUT  W UU where ∆IOUT = load current change. VIN LTC3423/LTC3424 VDD IN 6 10 3 2 1 VDD SHDN VIN SW VOUT FB 4 7 8 9 5 C3 VOUT MODE/SYNC VC Rt GND R5 C5 3.3nF 3423/24 F02 LOAD FEED FORWARD SIGNAL R6 VFF Figure 2 Closing the Feedback Loop The LTC3423/LTC3424 uses current mode control with internal adaptive slope compensation. Current mode control eliminates the 2nd order filter due to the inductor and output capacitor exhibited in voltage mode controllers, and simplifies it to a single-pole filter response. The product of the modulator control to output DC gain plus the error amp open-loop gain equals the DC gain of the system. 34234f 9 LTC3423/LTC3424 APPLICATIO S I FOR ATIO GDC = GCONTROLOUTPUT • GEA G CONTROL = 2 • VIN , GEA ≈ 2000 IOUT The output filter pole is given by: fFILTERPOLE = IOUT Hz π • VOUT • C OUT where COUT is the output filter capacitor. The output filter zero is given by: fFILTERZERO = 1 2 • π • RESR • COUT Hz where RESR is the capacitor equivalent series resistance. A troublesome feature of the boost regulator topology is the right half plane zero (RHP) and is given by: fRHPZ = VIN • RO 2 • π • L • VO 2 2 Hz At heavy loads this gain increase with phase lag can occur at a relatively low frequency. The loop gain is typically rolled off before the RHP zero frequency. TYPICAL APPLICATIO Typical Application with Output Disconnect VIN = 0.9V TO 1.5V LTC3423/LTC3424 3 10 2 VDD 6 1 VIN SHDN SW VOUT 4 7 8 9 5 C5 1µF RB* ZETEX FMMT717 VOUT MODE/SYNC FB VDD Rt VC GND (VOUT – VINMIN – 0.7V) • 100 * SET RB TO FORCE BETA OF ≤ 100; RB = IOUTMAX 0 = FIXED FREQ 1 = Burst Mode OPERATION 34234f 10 U The typical error amp compensation is shown in Figure 3. The equations for the loop dynamics are as follows: Hz 2 • π • 20 • 106 • C C1 which is extremelyclose to DC fZERO1 = fPOLE2 1 Hz 2 • π • RZ • C C1 1 Hz ≈ 2 • π • RZ • C C2 fPOLE1 ≈ 1 W U UU Refer to Application Note AN76 for more closed loop examples. VOUT + ERROR AMP 1.25V FB 8 VC 9 CC1 RZ 3423/24 F03 R1 – R2 CC2 Figure 3 3423/24 TA03 LTC3423/LTC3424 TYPICAL APPLICATIO VDD IN C1 2.2µF PACKAGE DESCRIPTIO 5.23 (.206) MIN 0.50 3.05 ± 0.38 (.0197) (.0120 ± .0015) BSC TYP RECOMMENDED SOLDER PAD LAYOUT GAUGE PLANE 12345 0.53 ± 0.01 (.021 ± .006) DETAIL “A” 0.18 (.007) SEATING PLANE 0.17 – 0.27 (.007 – .011) 0.13 ± 0.05 (.005 ± .002) MSOP (MS) 1001 NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 34234f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. U U Single Cell to 1.8V at 300mA, 1.8mm High VDD = 2.7V TO 5.5V VIN = 0.9V TO 1.5V L1 4.7µH D1 VOUT 1.8V 300mA R1 110k 6 10 1 CELL 3 2 C2 4.7µF 1 LTC3423 VDD SHDN VIN SW VOUT FB 4 7 8 9 5 C4 470pF RC 82k C5 4.7pF R2 249k C3 22µF + – MODE/SYNC VC Rt GND Rt fOSC = 1MHz 30.1k 0 = FIXED FREQ 1 = Burst Mode OPERATION C1: TAIYO YUDEN JMK212BJ225MG C2: TAIYO YUDEN JMK212BJ475MM C3: TAIYO YUDEN JMK325BJ226MM D1: ON SEMICONDUCTOR MBRM120T3 L1: SUMIDA CDRH3D16-4R7M 3423/24 TA04 MS Package 10-Lead Plastic MSOP (Reference LTC DWG # 05-08-1661) 0.889 ± 0.127 (.035 ± .005) 3.2 – 3.45 (.126 – .136) 3.00 ± 0.102 (.118 ± .004) (NOTE 3) 10 9 8 7 6 0.497 ± 0.076 (.0196 ± .003) REF 0.254 (.010) DETAIL “A” 0° – 6° TYP 4.88 ± 0.10 (.192 ± .004) 3.00 ± 0.102 (.118 ± .004) NOTE 4 1.10 (.043) MAX 0.86 (.034) REF 0.50 (.0197) TYP 11 LTC3423/LTC3424 TYPICAL APPLICATIO VDD IN VDD = 2.7V TO 5.5V VIN = 0.9V TO 1.5V + – C1 2.2µF 1 CELL C2 10µF 0 = FIXED FREQ 1 = Burst Mode OPERATION RELATED PARTS PART NUMBER LT1306 LT1308A/LT1308B LT1317/LT1317B LT1610 LT1613 LT1615 LT1949 LTC3400/LTC3400B LTC3401 LTC3402 DESCRIPTION Sync, Fixed Frequency, Step-Up DC/DC Converter High Current, Micropower, Single Cell 600kHz DC/DC Converter Micropower 600kHz PWM DC/DC Converter 1.7MHz, Single Cell Micropower DC/DC Converter 1.4MHz, Single Cell DC/DC Converter in ThinSOT 600kHz, 1A Switch PWM DC/DC Converter ThinSOT, 600mA, 1.2MHz Boost Converter Single Cell, High Current (1A) Micropower, Synchronous 3MHz Step-Up DC/DC Converter Single Cell, High Current (2A) Micropower, Synchronous 3MHz Step-Up DC/DC Converter TM Micropower Step-Up DC/DC Converter in ThinSOT ThinSOT is a trademark of Linear Technology Corporation. 34234f 12 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 q FAX: (408) 434-0507 q www.linear.com U Triple Output Converter D2 D3 D4 D5 4.7µF 3.6V 2mA 0.1µF 0.1µF 0.1µF 0.1µF L1 2.2µH D1 VOUT 1.8V 700mA R1 110k C3 44µF (2× 22µF) C4 470pF RC 82k C5 4.7pF R2 249k D6 4.7µF D7 –1.1V 1mA 6 10 3 2 1 LTC3423 VDD SHDN VIN SW VOUT FB 4 7 8 9 5 MODE/SYNC VC Rt GND Rt f OSC = 1MHz 30.1k C1: TAIYO YUDEN JMK212BJ225MG C2: TAIYO YUDEN JMK212BJ106MM C3: TAIYO YUDEN JMK325BJ226MM D1: ON SEMICONDUCTOR MBRM120T3 D2 TO D7: ZETEX FMND7000 DUAL DIODE L1: SUMIDA CD43-2R2M 3423/24 TA05 COMMENTS Internal 2A Switches, VIN As Low As 1.8V 5V at 1A from Single Li-Ion Cell VIN As Low As 1.5V, IQ = 100µA 3V at 30mA from 1V, 5V at 200mA from 3.3V VIN As Low As 1.1V, 3V at 30mA from Single Cell IQ = 20µA, 1µA Shutdown Current, VIN As Low As 1V 1.1A, 0.5Ω/30V Internal Switch, VIN As Low As 1.8V 92% Efficiency, 0.85V ≤ VIN, 2.6V ≤ VOUT ≤ 5V VIN = 0.5V to 5.5V, Up to 97% Efficiency Synchronizable Oscillator from 100kHz to 3MHz VIN = 0.5V to 5.5V, Up to 97% Efficiency Synchronizable Oscillator from 100kHz to 3MHz LT/TP 0302 2K • PRINTED IN USA © LINEAR TECHNOLOGY CORPORATION 2001