LTC3532EDD#PBF

LTC3532 Micropower Synchronous Buck-Boost DC/DC Converter DESCRIPTIO U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Single Inductor Regulated Output with Input Voltages Above, Below or Equal to the Output Wide VIN Range: 2.4V to 5.5V VOUT Range: 2.4V to 5.25V Up to 500mA Peak Output Current Synchronous Rectification: Up to 95% Efficiency Manual or Programmable Automatic Burst Mode® Operation Output Disconnect in Shutdown Programmable Oscillator: 300kHz to 2MHz Pin Compatible with LTC3440 Small Thermally Enhanced 10-Lead (3mm × 3mm) DFN and 10-Lead MSOP Packages U APPLICATIO S ■ ■ ■ ■ ■ The LTC®3532 is a high efficiency, fixed frequency, buckboost DC/DC converter that operates from input voltages above, below or equal to the output voltage. The topology incorporated in the IC provides a continuous transfer function through all operating modes, making the product ideal for single lithium-ion, multicell alkaline or NiMH applications where the output voltage is within the battery voltage range. The device includes two 0.36Ω N-channel MOSFET switches and two 0.42Ω P-channel switches. Switching frequencies up to 2MHz are programmed with an external resistor. Quiescent current is only 35μA in Burst Mode operation, maximizing battery life in portable applications. Automatic Burst Mode operation allows the user to program the load current for Burst Mode operation or to control it manually. Other features include a 1μA shutdown, soft-start control, thermal shutdown, and peak current limit. The LTC3532 is available in a low profile (0.75mm) 10-lead (3mm × 3mm) DFN and 10-lead MSOP packages. Miniature Hard Disk Drive Power Supply MP3 Players Handheld Instruments Digital Cameras Handheld Terminals , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. Burst Mode is a registered trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. U TYPICAL APPLICATIO Miniature Hard Disk Drive Power Supply 4.7μH VIN Li-Ion 2.5V TO 4.2V SW1 SW2 VIN VOUT SHDN/SS LTC3532 FB BURST VC 340k 200k 4.7μF 43.2k GND VOUT 200mV/DIV ILOAD 100mA/DIV 33pF 12.1k RT 1k VOUT 3.3V 100mA TO 500mA (PEAK) 220pF 10μF 200k 100μs/DIV VIN = 3V VOUT = 3.3V ILOAD = 50mA TO 300mA 3532 TA01b 0.01μF 3532 TA01 3532fc 1 LTC3532 W W U W ABSOLUTE AXI U RATI GS (Note 1) BURST, VIN, VOUT, VC, FB ................................... –0.3V to 6V RT ..................................................................... 0V to 5V SHDN/SS ..................................................... –0.3V to 6V SW1, SW2 DC............................................................ –0.3V to 6V Pulsed < 100ns ........................................ –0.3V to 7V Operating Temperature Range (Note 2).... –40°C to 85°C Maximum Junction Temperature (Note 4)............. 125°C Storage Temperature Range DD ..................................................... –65°C to 125°C MSOP ................................................ –65°C to 150°C Lead Temperature (Soldering,10 sec) MSOP ............................................................... 300°C U U U PI CO FIGURATIO TOP VIEW TOP VIEW 1 10 VC BURST 2 9 FB SW1 3 SW2 4 7 VIN GND 5 6 VOUT RT 11 RT BURST SW1 SW2 GND 8 SHDN/SS 10 9 8 7 6 1 2 3 4 5 VC FB SHDN/SS VIN VOUT MS PACKAGE 10-LEAD PLASTIC MSOP TJMAX = 125°C θJA = 130°C/W 1 LAYER BOARD θJA = 100°C/W 4 LAYER BOARD θJC = 45°C/W DD PACKAGE 10-LEAD (3mm × 3mm) PLASTIC DFN TJMAX = 125°C, θJA = 43°C/W EXPOSED PAD (PIN 11) IS GND, MUST BE CONNECTED TO PCB U W U ORDER I FOR ATIO LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3532EDD#PBF LTC3532EDD#TRPBF LBXR 10-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C LTC3532EMS#PBF LTC3532EMS#TRPBF LTBXS 10-Lead Plastic MSOP –40°C to 85°C Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = VOUT = 3.6V, RT = 64.9k, unless otherwise specified. PARAMETER CONDITIONS MIN TYP MAX UNITS Input Start-Up Voltage ● 2.4 V Input Operating Range ● 2.4 5.5 V Output Voltage Adjust Range ● 2.4 5.25 V Feedback Voltage ● 1.19 1.22 1.25 V 1 50 nA Feedback Input Current VFB = 1.22V 2.3 Quiescent Current, Burst Mode Operation BURST = 0V 35 60 μA Quiescent Current, Shutdown SHDN = 0V, Not Including Switch Leakage, VOUT = 0V 0.1 1 μA Quiescent Current, Active VC = 0V, BURST = VIN (Note 3) 600 1000 μA NMOS Switch Leakage Switches B and C 0.1 5 μA 3532fc 2 LTC3532 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = VOUT = 3.6V, RT = 64.9k, unless otherwise specified. PARAMETER CONDITIONS TYP MAX PMOS Switch Leakage Switches A and D MIN 0.1 10 NMOS Switch On Resistance Switches B and C 0.36 Ω PMOS Switch On Resistance Switches A and D 0.42 Ω Input Current Limit Maximum Duty Cycle ● ● Boost (% Switch C On) Buck (% Switch A On) Minimum Duty Cycle ● Frequency Accuracy ● 0.8 1.1 70 100 88 575 740 UNITS μA 1.45 A % % 0 % 885 kHz Burst Threshold (Falling) 0.88 V Burst Threshold (Rising) 1.12 V Ratio of IOUT to IBURST Burst Current Ratio 8000 Error Amp AVOL VC = 1.4V Error Amp Source Current Error Amp Sink Current VC = 2V SHDN/SS Threshold When IC is Enabled When EA is at Maximum Boost Duty Cycle SHDN/SS Input Current VSHDN = 5.5V ● U W 60 3V 3.6V 4.2V 50 VOUT = 3.3V 40 0.1 1 10 100 LOAD CURRENT (mA) 0.1 0.01 1000 3532 G01 EFFICIENCY (%) EFFICIENCY (%) 1 80 10 70 60 BURST POWER LOSS FIXED FREQUENCY POWER LOSS 1 50 40 0.1 FIXED FREQUENCY EFFICIENCY 1 1.5 V V 0.01 1 μA 10 100 LOAD CURRENT (mA) 0.1 1000 80 3.0 75 2.5 2000kHz 70 1500kHz 2.0 65 1000kHz 1.5 60 55 1.0 50 500kHz 0.5 0 BURST MODE 2.5 45 NOT SWITCHING 3.5 4.5 5.5 40 VIN QUIESCENT CURRENT BURST MODE (μA) POWER LOSS 100 POWER LOSS (mW) 10 1000 90 BURST EFFICIENCY POWER LOSS (mW) 80 μA 1 2.2 Fixed Frequency and Burst Mode Quiescent Current vs VIN 100 100 70 0.4 Efficiency and Power Loss vs Load EFFICIENCY μA TA = 25°C, unless otherwise specified. VIN QUIESCENT CURRENT (mA) Efficiency and Power Loss vs Load Autoburst Mode 90 15 Note 3: Current measurements are performed when the outputs are not switching. Note 4: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125°C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may result in device degradation or failure. TYPICAL PERFOR A CE CHARACTERISTICS 1000 dB 310 Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3532E is guaranteed to meet performance specifications from 0°C to 85°C. Specifications over the –40°C to 85°C operating temperature range are assured by design, characterization and correlations with statistical process controls. 100 90 VIN (V) 3532 G02 3532 G03 3532fc 3 LTC3532 U W TYPICAL PERFOR A CE CHARACTERISTICS Peak Current Clamp and Limit vs VIN 100 1.6 98 1.4 INPUT CURRENT (A) 96 94 92 90 88 86 Automatic Burst Threshold vs RBURST 70 60 1.2 LOAD CURRENT (mA) Efficiency vs Frequency EFFICIENCY (%) TA = 25°C, unless otherwise specified. ILIMIT 1.0 ICLAMP 0.8 0.6 40 LEAVE BURST 30 0.4 84 20 0.2 82 VIN = 3.6V VOUT = 3.3V 80 1500 500 1000 FREQUENCY (kHz) VOUT = 3.3V VIN = 3.6V VOUT = 3.3V 0 2.4 2000 3.4 5.4 4.4 10 150 VIN (V) 3532 G04 1200 1.241 1150 1.236 FEEDBACK VOLTAGE (V) 1050 1000 950 900 850 Load Transient Response in Fixed Frequency Mode VOUT 200mV/DIV 1.231 1.226 1.221 1.216 ILOAD 100mA/DIV 1.211 1.206 100μs/DIV 1.201 VIN = 3.6V 800 –5 –55 1.196 –55 95 45 TEMPERATURE (°C) –5 45 TEMPERATURE (°C) 3532 G07 95 Switch Pins Before Entering Boost Mode Switch Pins in Buck-Boost Mode VOUT 200mV/DIV SW1 2V/DIV SW1 2V/DIV BURST PIN 2V/DIV SW2 2V/DIV SW2 2V/DIV COUT = 22μF VIN = 3.6V VOUT = 3.3V 3535 G09 COUT = 10μF VIN = 3.6V VOUT = 3.3V 3532 G08 Burst Mode to Fixed Frequency Transition 400μs/DIV 550 3532 G06 Feedback Voltage vs Temperature 1100 ENTER BURST 250 350 450 BURST RESISTOR (kΩ) 3532 G05 Frequency vs Temperature FREQUENCY (MHz) 50 3532 G10 40ns/DIV VIN = 3.3V VOUT = 3.3V ILOAD = 100mA 3532 G11 40ns/DIV 3532 G12 VIN = 2.9V VOUT = 3.3V ILOAD = 100mA 3532fc 4 LTC3532 U W TYPICAL PERFOR A CE CHARACTERISTICS Switch Pins Before Entering Buck Mode TA = 25°C, unless otherwise specified. Output Ripple at 100mA Load SW1 2VDIV VOUT 50mV/DIV Burst Mode, Boost VIN = 2.4V SW1 5V/DIV VIN = 3.6V SW2 5V/DIV VIN = 4.5V VOUT 100mV/DIV VOUT 50mV/DIV SW2 2VDIV VOUT 50mV/DIV 40ns/DIV INDUCTOR CURRENT 500mA/DIV 3535 G13 VIN = 4V VOUT = 3.3V ILOAD = 100mA 400ns/DIV 3535 G14 4μs/DIV 3535 G15 VIN = 2.4V VOUT = 3.3V ILOAD = 20mA COUT = 22μF VOUT = 3.6V IOUT = 100mA COUT = 10μF Burst Mode, Buck-Boost Burst Mode, Buck SW1 5V/DIV SW1 5V/DIV SW2 5V/DIV SW2 5V/DIV VOUT 100mV/DIV VOUT 100mV/DIV INDUCTOR CURRENT 500mA/DIV INDUCTOR CURRENT 500mA/DIV 4μs/DIV 340612 G16 VIN = 3.75V VOUT = 3.3V ILOAD = 20mA COUT = 22μF 4μs/DIV 3535 G17 VIN = 4.2V VOUT = 3.3V ILOAD = 20mA COUT = 22μF U U U PI FU CTIO S RT (Pin 1): Timing Resistor to Program the Oscillator Frequency. The programming range is 300kHz to 2MHz. f(kHz) = 48,000 RT (kΩ) BURST (Pin 2): Used to Set the Automatic Burst Mode Operation Threshold. Place a resistor and capacitor in parallel from this pin to ground. See the Applications Information section for component value selection. For manual control, ground the pin to force Burst Mode operation, connect to VOUT to force fixed frequency mode. SW1 (Pin 3): Switch Pin Where the Internal Switches A and B are Connected. Connect inductor from SW1 to SW2. An optional Schottky diode can be connected from SW1 to ground. Minimize trace length to minimize EMI. SW2 (Pin 4): Switch Pin Where the Internal Switches C and D are Connected. For applications with output voltages over 4.3V, a Schottky diode is required from SW2 to VOUT to ensure SW2 does not exhibit excess voltage. GND (Pin 5): Signal and Power Ground for the IC. VOUT (Pin 6): Output of the Synchronous Rectifier. A filter capacitor is placed from VOUT to GND. VIN (Pin 7): Input Supply Pin. Supplies current to the inductor through SW1 and supplies internal VCC for the IC. A ceramic bypass capacitor as close to the VIN pin and GND (Pin 5) is required. 3532fc 5 LTC3532 U U U PI FU CTIO S SHDN/SS (Pin 8): Combined Soft-Start and Shutdown. Grounding this pin shuts down the IC. Tie to >1.5V to enable the IC and >2.4V to ensure the error amp is not clamped from soft-start. For Burst Mode operation, this pin must be pulled up to within 0.5V of VIN. An RC from the shutdown command signal to this pin will provide a softstart function by limiting the rise time of the VC pin. VOUT = 1.22V • (R1+ R2) R2 VC (Pin10): Error Amp Output: A frequency compensation network is connected from this pin to the FB pin to compensate the loop. Refer to the Applications Information section for component value selection. FB (Pin 9): Feedback Pin. Connect resistor divider tap here. The output voltage can be adjusted from 2.4V to 5.25V. The feedback reference is typically 1.22V. Set VOUT according to the formula: Exposed Pad (Pin11): The exposed pad (DFN Package) must be soldered to PCB ground for electrical contact and rated thermal performance. W BLOCK DIAGRA 3 SW2 SW D SW A VOUT 6 SW B GATE DRIVERS AND ANTICROSS CONDUCTION SW C – 7 + VIN 4 SW1 REVERSE AMP + gm = 1/60k – 1A + PEAK CURRENT LIMIT – + ERROR AMP – PWM LOGIC 2.3V – VC PWM COMP UVLO 10 + + AUTOMATIC Burst Mode CONTROL AND VC HOLD SLEEP RT 1 9 – VIN FB + – 1.1A 1.22V OSC BURST 2 VIN 8 SHDN/SS SHUTDOWN SOFT-START VREF VCC SS 1.22V VREF THERMAL SHUTDOWN SHUTDOWN 5 GND 3532 BD 3532fc 6 LTC3532 U OPERATIO The LTC3532 provides high efficiency, low noise power for applications such as portable instrumentation, digital cameras, and MP3 players. The LTC proprietary topology allows input voltages above, below or equal to the output voltage by properly phasing the output switches. The error amp output voltage on VC determines the output duty cycle of the switches. Since VC is a filtered signal, it provides rejection of frequencies well below the switching frequency. The low RDS(ON), low gate charge synchronous switches provide high frequency pulse width modulation control at high efficiency. Schottky diodes across the synchronous switch D and synchronous switch B are not required, but provide a lower voltage drop during the break-before-make time (typically 15ns). Schottky diodes will improve peak efficiency by typically 1% to 2%. High efficiency is achieved at light loads when Burst Mode operation is entered and the IC’s quiescent current drops to a low 35μA. LOW NOISE FIXED FREQUENCY OPERATION Oscillator The frequency of operation is programmed by an external resistor from RT to ground, according to the following equation: f(kHz) = 48,000 RT (kΩ) Error Amp The error amplifier is a voltage mode amplifier. The loop compensation components are configured around the amplifier (from FB to VC) to obtain stability of the converter. For improved bandwidth, an additional RC feedforward network can be placed across the upper feedback divider resistor. The voltage on SHDN/SS clamps the error amp output, VC, to provide a soft-start function. cally 50ns. A second amplifier will begin to source current into the FB pin to drop the output voltage once the peak input current exceeds 1A typical. This method provides a closed loop means of clamping the input current. During conditions where VOUT is near ground, such as during a short-circuit or during startup, this threshold is cut in half providing a fold back feature. For this current limit feature to be most effective, the Thevenin resistance from FB to ground should be greater than 100k. Reverse Current Limit During fixed frequency operation, the LTC3532 operates in forced continuous conduction mode. The reverse current limit amplifier monitors the inductor current from the output through switch D. Once the negative inductor current exceeds 340mA typical, the IC will shut off switch D. 4-Switch Control Figure 1 shows a simplified diagram of how the four internal switches are connected to the inductor, VIN, VOUT and GND. Figure 2 shows the regions of operation for the LTC3532 as a function of the internal control voltage, VCI. Depending on the control voltage, the IC will operate in either buck, buck/boost or boost mode. The VCI voltage is a level shifted voltage from the output of the error amp (VC) (see Figure 5). The four power switches are properly phased so the transfer between operating modes is continuous, smooth and transparent to the user. When VIN approaches VOUT the buck/boost region is reached where the conduction time of the 4-switch region is typically 150ns. Referring to Figures 1 and 2, the various regions of operation will now be described. VIN VOUT 7 6 PMOS D PMOS A Internal Current Limit There are two different current limit circuits in the LTC3532. They have internally fixed thresholds which vary inversely with VIN. The first circuit is a high speed peak current limit comparator that will shut off switch A if the current exceeds 1.1A typical. The delay to output of this amplifier is typi- SW1 SW2 3 4 NMOS B NMOS C 3532 F01 Figure 1. Simplified Diagram of Output Switches 3532fc 7 LTC3532 U OPERATIO 88% DMAX BOOST VOUT 1– (150ns • f) V4 (≈2.05V) VIN = V3 (≈1.65V) The point at which the 4-switch region ends is given by: A ON, B OFF BOOST REGION PWM CD SWITCHES DMIN BOOST DMAX BUCK FOUR SWITCH PWM BUCK/BOOST REGION V2 (≈1.55V) D ON, C OFF PWM AB SWITCHES BUCK REGION Boost Region (VIN < VOUT) V1 (≈0.9V) 0% DUTY CYCLE VIN = VOUT(1 – D) = VOUT(1 – 150ns • f) V 3532 F02 INTERNAL CONTROL VOLTAGE, VCI Figure 2. Switch Control vs Internal Control Voltage, VCI Buck Region (VIN > VOUT) Switch D is always on and switch C is always off during this mode. When the internal control voltage, VCI, is above voltage V1, output A begins to switch. During the off-time of switch A, synchronous switch B turns on for the remainder of the time. Switches A and B will alternate like a typical synchronous buck regulator. As the control voltage increases, the duty cycle of switch A increases until the maximum duty cycle of the converter in buck mode reaches DMAX_BUCK, given by: DMAX_BUCK = 100 – D4SW % where D4SW = duty cycle % of the 4-switch range. D4SW = (150ns • f) • 100 % where f = operating frequency, Hz. Beyond this point the “4-switch,” or buck/boost region is reached. Buck/Boost or 4-Switch (VIN ~ VOUT) When the internal control voltage, VCI, is above voltage V2, switch pair AD remain on for duty cycle DMAX_BUCK, and the switch pair AC begins to phase in. As switch pair AC phases in, switch pair BD phases out accordingly. When the VCI voltage reaches the edge of the buck/boost range, at voltage V3, the AC switch pair completely phase out the BD pair, and the boost phase begins at duty cycle D4SW. The input voltage, VIN, where the 4-switch region begins is given by: Switch A is always on and switch B is always off during this mode. When the internal control voltage, VCI, is above voltage V3, switch pair CD will alternately switch to provide a boosted output voltage. This operation is like a synchronous boost regulator. The maximum duty cycle of the converter is limited to 88% typical and is reached when VCI is above V4. Burst Mode OPERATION Burst Mode operation occurs when the IC delivers energy to the output until it is regulated and then goes into a sleep mode where the outputs are off and the IC is consuming only 35μA of quiescent current from VIN. In this mode the output ripple has a variable frequency component that depends upon load current, and will typically be about 2% peak-to-peak. Burst Mode operation ripple can be reduced slightly by using more output capacitance (47μF or greater). Another method of reducing Burst Mode operation ripple is to place a small feedforward capacitor across the upper resistor in the VOUT feedback divider network (as in Type III compensation). During the period where the device is delivering energy to the output, the peak switch current will be equal to 250mA typical and the inductor current will terminate at zero current for each cycle. In this mode the typical maximum average output current is given by: IOUT(MAX)BURST ≈ 0.2 • VIN A VOUT + VIN 3532fc 8 LTC3532 U OPERATIO VIN VOUT VIN VOUT 7 6 7 6 SW1 + L A D – 4 SW2 B C 250mA 3 SW1 – dI ≈ – VOUT L dt + L 4 SW2 B 0mA C 3532 F03 T1 5 5 GND GND Figure 3. Inductor Charge Cycle During Burst Mode Operation Note that the peak efficiency during Burst Mode operation is less than the peak efficiency during fixed frequency because the part enters full-time 4-switch mode (when servicing the output) with discontinuous inductor current as illustrated in Figures 3 and 4. During Burst Mode operation, the control loop is nonlinear and cannot utilize the control voltage from the error amp to determine the control mode, therefore full-time 4-switch mode is required to maintain the buck/boost function. The efficiency below 1mA becomes dominated primarily by the quiescent current. The Burst Mode operation efficiency is given by: EFFICIENCY ≅ D n • ILOAD 35μA + ILOAD where n is typically 88% during Burst Mode operation. Automatic Burst Mode Operation Control Burst Mode operation can be automatic or manually controlled with a single pin. In automatic mode, the IC will enter Burst Mode operation at light load and return to fixed frequency operation at heavier loads. The load current at which the mode transition occurs is programmed using a single external resistor from the BURST pin to ground, according to the following equations: Enter Burst Mode Operation: I = Leave Burst Mode Operation: I = 10.5V RBURST 7V RBURST IINDUCTOR 3 dI ≈ VIN dt L IINDUCTOR A 250mA 0mA T2 3532 F04 Figure 4. Inductor Disharge Cycle During Burst Mode Operation where RBURST is in kΩ and IBURST is the load transition current in Amps. For automatic operation, a filter capacitor should also be connected from BURST to ground to prevent ripple on BURST from causing the IC to oscillate in and out of Burst Mode operation. The equation for the minimum capacitor value is: CBURST(MIN) ≥ COUT • VOUT 60,000V where CBURST(MIN) and COUT are in μF. In the event that a load transient causes the feedback pin to drop by more than 4% from the regulation value while in Burst Mode operation, the IC will immediately switch to fixed frequency mode and an internal pull-up will be momentarily applied to BURST, rapidly charging the BURST capacitor. This prevents the IC from immediately reentering Burst Mode operation once the output achieves regulation. Manual Burst Mode Operation For manual control of Burst Mode operation, the RC network connected to BURST can be eliminated. To force fixed frequency mode, BURST should be connected to VOUT. To force Burst Mode operation, BURST should be grounded. When commanding Burst Mode operation manually, the circuit connected to BURST should be able to sink up to 2mA. For optimum transient response with large dynamic loads, the operating mode should be controlled manually by the host. By commanding fixed frequency operation prior to a sudden increase in load, output voltage droop can 3532fc 9 LTC3532 U OPERATIO be minimized. Note that if the load current applied during forced Burst Mode operation (BURST pin is grounded) exceeds the current that can be supplied, the output voltage will start to droop and the IC will automatically come out of Burst Mode operation and enter fixed frequency mode, raising VOUT. Once regulation is achieved, the IC will then enter Burst Mode operation once again, and the cycle will repeat, resulting in about 4% output ripple. Note that Burst Mode operation is inhibited during soft-start. incorporates an active clamp circuit that holds the voltage on VC at an optimal voltage during Burst Mode operation. This minimizes any output transient when returning to fixed frequency mode operation. For optimum transient response, Type 3 compensation is also recommended to broad band the control loop and roll off past the two pole response of the output LC filter. (See Closing the Feedback Loop.) Burst Mode Operation to Fixed Frequency Transient Response The soft-start function is combined with shutdown. When the SHDN/SS pin is brought above 1V typical, the IC is enabled but the EA duty cycle is clamped from VC. A detailed diagram of this function is shown in Figure 5. The components RSS and CSS provide a slow ramping voltage on SHDN/SS to provide a soft-start function. To ensure that VC is not being clamped, SHDN/SS must be raised above 2.4V. To enable Burst Mode operation, SHDN/SS must be raised to within 0.5V of VIN. In Burst Mode operation, the compensation network is not used and VC is disconnected from the error amplifier. During long periods of Burst Mode operation, leakage currents in the external components or on the PC board could cause the compensation capacitor to charge (or discharge), which could result in a large output transient when returning to fixed frequency mode of operation, even at the same load current. To prevent this, the LTC3532 Soft-Start ERROR AMP VIN 15μA + VOUT 1.22V R1 FB – 9 VC SOFT-START CLAMP TO PWM COMPARATORS CP1 R2 10 VCI SHDN/SS RSS ENABLE SIGNAL 8 CSS + 3532 F05 CHIP ENABLE – 1V Figure 5. Soft-Start Circuitry 3532fc 10 LTC3532 U U W U APPLICATIO S I FOR ATIO 1 RT LTC3532 2 BURST peak inductor currents in the 1A to 2A region. To minimize radiated noise, use a shielded inductor. See Table 1 for a suggested list of inductor suppliers. VC 10 FB 9 3 SW1 SHDN/SS 8 4 SW2 VIN 7 5 GND VOUT 6 Table 1. Inductor Vendor Information GND 3532 F06 Figure 6. Recommended Component Placement. Traces Carrying High Current are Direct. Trace area at FB and VC Pins are Kept Low. Lead Length to Battery Should be Kept Short Inductor Selection SUPPLIER WEB SITE Coilcraft www.coilcraft.com Murata www.murata.com Sumida www.sumida.com TDK www.component.tdk.com TOKO www.tokoam.com Output Capacitor Selection The bulk value of the output filter capacitor is set to reduce the ripple due to charge into the capacitor each cycle. The steady state ripple due to charge is given by: The high frequency operation of the LTC3532 allows the use of small surface mount inductors. The inductor ripple current is typically set to 20% to 40% of the maximum inductor current. For a given ripple the inductance terms are given as follows: % RIPPLE_BOOST = VIN(MIN) • (VOUT – VIN(MIN) ) % RIPPLE_BUCK = LBOOST > LBUCK > f • ΔIL • VOUT VOUT • (VIN(MAX) – VOUT ) f • ΔIL • VIN(MAX) H IOUT(MAX) • (VOUT – VIN(MIN) ) • 100 COUT • VOUT 2 • f % (VIN(MAX) – VOUT ) • 100% 1 • VIN(MAX) 8LCf2 H where f = Operating frequency, Hz ΔIL = Maximum allowable inductor ripple current, A VIN(MIN) = Minimum input voltage VIN(MAX) = Maximum input voltage VOUT = Output voltage IOUT(MAX) = Maximum output load current For high efficiency, choose a ferrite inductor with a high frequency core material to reduce core losses. The inductor should have low ESR (equivalent series resistance) to reduce the I2R losses, and must be able to handle the peak inductor current without saturating. Molded chokes or chip inductors usually do not have enough core to support the where COUT = output filter capacitor in Farads and f = switching frequency in Hz. The output capacitance is usually many times larger than the minimum value in order to handle the transient response requirements of the converter. As a rule of thumb, the ratio of the operating frequency to the unity-gain bandwidth of the converter is the amount the output capacitance will have to increase from the above calculations in order to maintain the desired transient response. The other component of ripple is due to the ESR (equivalent series resistance) of the output capacitor. Low ESR capacitors should be used to minimize output voltage ripple. For surface mount applications, Taiyo Yuden or TDK ceramic capacitors, AVX TPS series tantalum capacitors or Sanyo POSCAP are recommended. See Table 2 for contact information. 3532fc 11 LTC3532 U W U U APPLICATIO S I FOR ATIO Table 2. Capacitor Vendor Information Operating Frequency Selection SUPPLIER WEB SITE AVX www.avxcorp.com Murata www.murata.com Sanyo www.sanyovideo.com Taiyo Yuden www.t-yuden.com TDK www.component.tdk.com Higher operating frequencies allow the use of a smaller inductor and smaller input and output filter capacitors, thus reducing board area and component height. However, higher operating frequencies also increase the IC’s total quiescent current due to the gate charge of the four switches, as given by: Input Capacitor Selection Since VIN is the supply voltage for the IC, as well as the input to the power stage of the converter, it is recommended to place at least a 4.7μF, low ESR ceramic bypass capacitor close to the VIN and GND pins. It is also important to minimize any stray resistance from the converter to the battery or other power source. Optional Schottky Diodes The Schottky diodes across the synchronous switches B and D are not required (VOUT < 4.3V), but provide a lower drop during the break-before-make time (typically 15ns) improving efficiency. Use a surface mount Schottky diode such as an MBRM120T3 or equivalent. Do not use ordinary rectifier diodes, since the slow recovery times will compromise efficiency. For applications with an output voltage above 4.3V, a Schottky diode is required from SW2 to VOUT. Output Voltage > 4.3V A Schottky diode from SW2 to VOUT is required for output voltages over 4.3V. The diode must be located as close to the pins as possible in order to reduce the peak voltage on SW2 due to the parasitic lead and trace inductance. Input Voltage > 4.5V For applications with input voltages above 4.5V which could exhibit an overload or short-circuit condition, a 2Ω/1nF series snubber is required between SW1 and GND. A Schottky diode from SW1 to VIN should also be added as close to the pins as possible. For the higher input voltages, VIN bypassing becomes more critical; therefore, a ceramic bypass capacitor as close to the VIN and SGND pins as possible is also required. Buck: IQ = (0.125 • VIN • f) mA Boost: IQ = [0.06 • (VIN + VOUT) • f] mA Buck/Boost: IQ = [f • (0.19 • VIN + 0.06 • VOUT)] mA where f = switching frequency in MHz. Therefore frequency selection is a compromise between the optimal efficiency and the smallest solution size. Closing the Feedback Loop The LTC3532 incorporates voltage mode PWM control. The control to output gain varies with operation region (buck, boost, buck/boost), but is usually no greater than 15. The output filter exhibits a double pole response, as given by: f FILTER — POLE = 1 2 • π • L • COUT Hz (in buck mode) f FILTER — POLE = VIN 2 • VOUT • π • L • COUT Hz (in boost mode) where L is in henrys and COUT is in farads. The output filter zero is given by: f FILTER — ZERO = 1 2 • π • RESR • COUT Hz where RESR is the equivalent series resistance of the output capacitor. A troublesome feature in boost mode is the right-half plane zero (RHP), given by: f RHPZ = VIN2 Hz 2 • π • IOUT • L • VOUT 3532fc 12 LTC3532 U U W U APPLICATIO S I FOR ATIO The loop gain is typically rolled off before the RHP zero frequency. A simple Type I compensation network can be incorporated to stabilize the loop, but at a cost of reduced bandwidth and slower transient response. To ensure proper phase margin using Type I compensation, the loop must be crossed over a decade before the LC double pole. The unity-gain frequency of the error amplifier with the Type I compensation is given by: the output filter. Referring to Figure 8, the location of the poles and zeros are given by: fPOLE1 ≅ 1 Hz 2 • π • 32e3 • R1• CP1 (which is extremely close to DC) fZERO1 = 1 Hz 2 • π • RZ • CP1 fZERO2 = 1 Hz 2 • π • R1• CZ1 referring to Figure 7. fPOLE2 = Most applications demand an improved transient response to allow a smaller output filter capacitor. To achieve a higher bandwidth, Type III compensation is required, providing two zeros to compensate for the double-pole response of 1 Hz 2 • π • RZ • CP2 where resistance is in ohms and capacitance is in farads. fUG = 1 Hz 2 • π • R1• CP1 VOUT + VOUT + ERROR AMP – 1.22V R1 FB 10 – 1.22V R1 CZ1 FB 9 VC 9 VC ERROR AMP CP1 RZ R2 10 CP1 R2 CP2 3532 F08 3532 F07 Figure 7. Error Amplifier with Type l Compensation Figure 8. Error Amplifier with Type lll Compensation 3532fc 13 LTC3532 U TYPICAL APPLICATIO S Three Cell to 3.3V at 300mA Buck-Boost Converter With Automatic Burst Mode Operation and Soft-Start VOUT 3.3V 300mA L1 4.7μH SW1 VIN 2.7V TO 4.5V SHDN R7 200k SW2 VIN VOUT SHDN/SS BURST C4 150pF VC VC RT R6 12.1k GND C2 150pF 0.01μF C5 4.7nF 200k R9 1k FB FB LTC3532 BURST RT C1 4.7μF SW1 R1 340k SW2 C3 22μF R2 200k R4 86.6k 3532 TA02 Li-Ion to 5V Boost Converter with Output Disconnect D1 DMBRM 110LT3 L1 2.2μH SW1 VIN 2.5V TO 4.2V SHDN BURST VIN VOUT BURST RT C5 SD 4.7nF SW2 SHDN/SS R7 200k C1 4.7μF SW1 RT R4 28.7k LTC3532 FB VC GND VOUT 5V 300mA R1 412k SW2 R9 1k FB C4 68pF VC R6 12.1k C2 220pF C3 10μF R2 133k 3532 TA03 3532fc 14 LTC3532 U PACKAGE DESCRIPTIO DD Package 10-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1699) R = 0.115 TYP 6 0.38 ± 0.10 10 0.675 ±0.05 3.50 ±0.05 1.65 ±0.05 2.15 ±0.05 (2 SIDES) 3.00 ±0.10 (4 SIDES) PACKAGE OUTLINE 1.65 ± 0.10 (2 SIDES) PIN 1 TOP MARK (SEE NOTE 6) (DD) DFN 1103 5 0.25 ± 0.05 0.50 BSC 0.75 ±0.05 0.200 REF 0.25 ± 0.05 1 0.50 BSC 2.38 ±0.05 (2 SIDES) 2.38 ±0.10 (2 SIDES) 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2). CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE MS Package 10-Lead Plastic MSOP (Reference LTC DWG # 05-08-1661 Rev E) 3.00 ± 0.102 (.118 ± .004) (NOTE 3) 0.889 ± 0.127 (.035 ± .005) 5.23 (.206) MIN 10 9 8 7 6 3.20 – 3.45 (.126 – .136) 0.254 (.010) 3.00 ± 0.102 (.118 ± .004) (NOTE 4) 4.90 ± 0.152 (.193 ± .006) DETAIL “A” 0.497 ± 0.076 (.0196 ± .003) REF 0° – 6° TYP GAUGE PLANE 0.50 0.305 ± 0.038 (.0197) (.0120 ± .0015) BSC TYP RECOMMENDED SOLDER PAD LAYOUT 1 2 3 4 5 0.53 ± 0.152 (.021 ± .006) DETAIL “A” 0.86 (.034) REF 1.10 (.043) MAX 0.18 (.007) SEATING PLANE NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.17 – 0.27 (.007 – .011) TYP 0.50 (.0197) BSC 0.1016 ± 0.0508 (.004 ± .002) MSOP (MS) 0307 REV E 3532fc Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LTC3532 U TYPICAL APPLICATIO Low Profile Li-Ion to 3.3V at 300mA Converter with Automatic Burst Mode Operation VOUT 3.3V 300mA L1 2.2μH SW1 VIN 2.5V TO 4.2V SW1 SHDN/SS LTC3532 BURST RT R3 200k C1 4.7μF R9 1k VOUT VIN BURST SW2 R1 340k SW2 FB VC GND RT R4 28.7k FB C4 68pF VC R6 12.1k C2 220pF C3 10μF R2 200k C5 0.01μF L1: COILCRAFT LPO6610-222M 3532 TA04 RELATED PARTS PART NUMBER DESCRIPTION LTC3440 600mA IOUT, 2MHz, Synchronous Buck- VIN: 2.5V to 5.5V, VOUT(RANGE): 2.5V to 5.5V, IQ = 25μA, ISD =