LTC4216
Ultralow Voltage
Hot Swap Controller
Features
Description
Allows Safe Board Insertion and Removal from
a Live Backplane
n Controls Load Voltages from 0V to 6V
n Fast Response Limits Peak Fault Current
n Adjustable Analog Current Limit
n Adjustable Soft-Start with Inrush Current Limiting
n Adjustable Response Time for Overcurrent
Protection
n Low Circuit Breaker Trip Threshold: 25mV
n No External Gate Capacitor Required
n Internal Charge Pump for N-Channel MOSFET
n Adjustable Output Power-Up Rate
n RESET and FAULT Output
n 10-Lead MSOP and 12-Lead (4mm × 3mm) DFN
Packages
The LTC®4216 is a positive low voltage Hot Swap™ controller
that allows a board to be safely inserted and removed from
a live backplane. It controls load voltages ranging from
0V to 6V and isolates a severe fault with instantaneous
analog current limiting.
n
An internal high side switch driver controls the gate of
an external N-channel MOSFET. An adjustable soft-start
limits the rate of change of the inrush current at start-up
for a large load capacitor. Together with an analog current
limit amplifier, an electronic circuit breaker with adjustable
response time provides dual level overcurrent protection.
No external gate capacitor is required for the analog current limit loop compensation.
The FB pin monitors the output supply voltage and signals
the RESET output pin. An ON pin provides on/off control
and a FAULT pin indicates the fault status. The LTC4216
is available in the 10-lead MSOP and 12-lead (4mm ×
3mm) DFN packages.
Applications
n
n
n
n
Electronic Circuit Breaker
Live Board Insertion and Removal
Industrial High Side Switch/Circuit Breaker
Optical Networking
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
Hot Swap is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners.
Typical Application
Single Channel 1.8V Hot Swap Controller
Normal Power-Up
with Soft-Start
BACKPLANE PCB EDGE
CONNECTOR CONNECTOR
(FEMALE)
(MALE)
VIN
1.8V
VCC
3.3V
LONG
LONG
22Ω
VCC
SENSEP SENSEN GATE
330nF
SHORT
15k
1%
GND
LONG
FB
LTC4216
ON
20k TIMER
1%
10nF
SS
VOUT
1.8V
5A
Si4864DY
0.004Ω
FILTER
10nF
17.4k
1%
3.3V
10k
1%
10k
+
1000µF
IOUT
2.5A/DIV
µP
LOGIC
10k
FAULT
FAULT
GND RESET
RESET
18nF
VGATE
5V/DIV
VOUT
1V/DIV
0.5ms/DIV
4216 TA01b
4216 TA01
4216fa
For more information www.linear.com/LTC4216
1
LTC4216
Absolute Maximum Ratings
(Note 1)
Bias Supply Voltage (VCC).............................– 0.3V to 9V
Input Voltages
FB, ON, SS, SENSEP, SENSEN..................– 0.3V to 9V
TIMER, FILTER..............................–0.3V to VCC + 0.3V
Output Voltages
RESET, FAULT........................................... –0.3V to 9V
GATE....................................................... –0.3V to 15V
Operating Temperature Range
LTC4216C................................................. 0°C to 70°C
LTC4216I..............................................–40°C to 85°C
Storage Temperature Range
MS......................................................–65°C to 150°C
DE.......................................................–65°C to 150°C
Lead Temperature (Soldering, 10sec)
MS Package....................................................... 300°C
Pin Configuration
TOP VIEW
RESET
1
12 FAULT
ON
2
11 VCC
FILTER
3
10 SENSEP
TIMER
4
9
SENSEN
SS
5
8
GATE
GND
6
7
FB
13
TOP VIEW
RESET
ON
FILTER
TIMER
GND
10
9
8
7
6
1
2
3
4
5
VCC
SENSEP
SENSEN
GATE
FB
MS PACKAGE
10-LEAD PLASTIC MSOP
TJMAX = 125°C, θJA = 160°C/W
DE PACKAGE
12-LEAD (4mm × 3mm) PLASTIC DFN
TJMAX = 125°C, θJA = 43°C/W, θJC = 4.3°C/W
EXPOSED PAD (PIN 13) INTERNALLY CONNECTED TO GND
(PCB CONNECTION OPTIONAL)
Order Information
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC4216CDE#PBF
LTC4216CDE#TRPBF
4216
12-Lead (4mm × 3mm) Plastic DFN
0°C to 70°C
LTC4216IDE#PBF
LTC4216IDE#TRPBF
4216
12-Lead (4mm × 3mm) Plastic DFN
–40°C to 85°C
LTC4216CMS#PBF
LTC4216CMS#TRPBF
LTBKV
10-Lead Plastic MSOP
0°C to 70°C
LTC4216IMS#PBF
LTC4216IMS#TRPBF
LTBKV
10-Lead Plastic MSOP
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
Electrical
Characteristics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 3.3V, unless otherwise noted. (Note 2)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VCC
Bias Supply Range
l
2.3
6
V
VSENSEP
VSENSEP Supply Range
l
0
6
V
ICC
Bias Supply Current
VON = 2V, VFB = 2V
l
1.6
3
mA
VCC(UVL)
Bias Supply Undervoltage Lockout
VCC Rising
l
1.97
2.12
2.23
V
l
50
120
190
mV
ΔVCC(UVL,HYST) Bias Supply Undervoltage
Lockout Hysteresis
4216fa
2
For more information www.linear.com/LTC4216
LTC4216
Electrical Characteristics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 3.3V, unless otherwise noted. (Note 2)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
ΔVCB(TH)
Circuit Breaker Trip Voltage Threshold
(VSENSEP – VSENSEN)
VSENSEP = 0.4V, 3.3V
l
22.5
21.5
25
25
27.5
28.5
mV
mV
ΔVACL(TH)
Analog Current Limit Voltage Threshold
(VSENSEP – VSENSEN)
l
32
40
48
mV
ISENSEP(IN)
SENSEP Pin Input Current
VSENSEP = VSENSEN = VCC = 6V
VSENSEP = VSENSEN = 0V, VCC = 6V
l
l
20
70
–7
250
–20
µA
µA
ISENSEN(IN)
SENSEN Pin Input Current
VSENSEN = VSENSEP = VCC = 6V
VSENSEN = VSENSEP = 0V, VCC = 6V
l
l
–5
10
–10
15
–15
µA
µA
IGATE(UP)
GATE Pull Up Current
Gate Drive On, VGATE = 0V, VON = 2V
l
–16
–20
–26
µA
IGATE(DN)
GATE Pull Down Current
Gate Drive Off, VGATE = 5V, VON = 0.6V
VSENSEP - VSENSEN = 55mV, VGATE = 5V
VSENSEP - VSENSEN = 100mV, VGATE = 5V
l
l
l
100
1
15
600
5
50
1500
20
100
µA
mA
mA
ΔVGATE
External N-Channel Gate Drive
(VGATE – VSENSEN)
2.3V ≤ VCC < 3V
3V ≤ VCC ≤ 6V
l
l
4.0
4.5
5.0
6.2
7.9
7.9
V
V
VGATE(TH)
GATE Pin Threshold Voltage
VGATE Falling
l
0.15
0.2
0.3
V
VSS(CLP)
SS Pin Clamp Voltage
After End of SS Timing Cycle
l
1.3
1.65
2.0
V
VSS(TH)
SS Pin Threshold Voltage
VSS Falling
l
0.15
0.2
0.35
V
ISS(UP)
SS Pull Up Current
VON = 2V, VSS = 1.2V, VFB = 2V
VON = 2V, VFB = 0V
l
l
–7
–0.3
–10
–1
–13
–2
µA
µA
ISS(DN)
SS Pull Down Current
VON = 0V, VSS = 2V
VFB(TH)
FB Pin Threshold Voltage
VFB Falling
l
0.593
0.602
0.611
ΔVFB(LINEREG)
FB Pin Threshold Line Regulation
2.3V ≤ VCC ≤ 6V
l
0.2
3
0
±1
µA
0.8
0.83
V
8
ΔVFB(HYST)
FB Pin Hysteresis
IFB(IN)
FB Pin Input Current
VFB = 1.2V, VCC = 6V
l
VON(TH)
ON Pin Threshold Voltage
VON Rising
l
mA
3
0.77
V
mV
mV
ΔVON(HYST)
ON Pin Hysteresis
l
40
80
130
mV
VON(FC)
ON Pin Fault Clear Threshold Voltage
VON Falling
l
0.36
0.4
0.44
V
ION(IN)
ON Pin Input Current
VON = 1.2V, VCC = 6V
l
0
±1
µA
VTMR(TH)
TIMER Pin Threshold Voltage
VTIMER Rising
VTIMER Falling
l
l
1.216
0.15
1.253
0.2
1.291
0.35
V
V
l
–1.5
–2
–2.5
ITMR(UP)
Timer Pull Up Current
Timer On, VON = 2V, VTIMER = 1V
ITMR(DN)
Timer Pull Down Current
Timer Off, VON = 0V, VTIMER = 2V
VFILT(TH)
FILTER Pin Threshold Voltage
VFILTER Rising
VFILTER Falling
l
l
1.216
0.15
1.253
0.2
1.291
0.35
V
V
IFILT(UP)
Filter Pull Up Current
VON = 2V, VFILTER = 1V, In Fault Mode
l
–45
–60
–75
µA
IFILT(DN)
Filter Pull Down Current
VON = 2V, VFILTER = 1V, No Faults
VON = 0V, VFILTER = 2V, In Reset Mode
l
1.5
2.4
8
3.3
µA
mA
VFAULT(TH)
FAULT Pin Threshold Voltage
VFAULT Falling
l
1.216
1.253
1.291
ΔVFAULT(HYST)
FAULT Pin Hysteresis
IFAULT(UP)
FAULT Pin Current
8
10
VON = 0V, VFAULT = 1.5V
l
l
VOL
Output Low Voltage (RESET, FAULT)
IRESET = IFAULT = 1.6mA
IRESET(LEAK)
RESET Pin Input Leakage Current
VRESET = VCC = 6V
tCB(TRIP)
Circuit Breaker Trip to Gate Discharging
(VSENSEP - VSENSEN) = Step 0V to 150mV
(VSENSEP - VSENSEN) = Step 0V to 30mV,
VSENSEP = VCC, FILTER = 10nF to GND
l
l
–3
120
–5
µA
mA
V
mV
–7
µA
0.15
0.4
V
0
±10
µA
1
240
3
360
µs
µs
4216fa
For more information www.linear.com/LTC4216
3
LTC4216
Electrical Characteristics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 3.3V, unless otherwise noted. (Note 2)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
tFAULT(EXT)
FAULT Low to Gate Discharging
VFAULT = Step 2V to 0V
l
10
20
µs
tFILTER
FILTER High to Gate Discharging
VFILTER = Step 0V to 2V
l
20
40
µs
tRST(ONLO)
Circuit Breaker Reset Delay Time,
ON Low to FAULT High
VON = Step 2V to 0V
l
30
60
µs
tRST(VCCLO)
Circuit Breaker Reset Delay Time,
VCC Low to FAULT High
VON = 2V, VCC = Step 3.3V to 1.8V
l
50
100
µs
tOFF
Turn-Off Time, ON Low to GATE
Discharging
VON = Step 2V to 0.6V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Typical Performance Characteristics
2.5
2.0
2.0
1.5
1.0
2.15
VCC = 6V
1.5
VCC = 3.3V
3.0
3.5
4.0 4.5
VCC (V)
5.0
5.5
–25
25
75
0
50
TEMPERATURE (°C)
4216 G01
100
41
24
100
125
4216 G04
–25
25
75
0
50
TEMPERATURE (°C)
–25
25
75
0
50
TEMPERATURE (°C)
125
4216 G03
100
40
38
–50
100
Analog Current Limit Delay vs
Sense Voltage
39
25
75
0
50
TEMPERATURE (°C)
1.90
–50
125
ANALOG CURRENT LIMIT DELAY (µS)
26
∆VACL(TH) (mV)
∆VCB(TH) (mV)
42
25
FALLING
2.00
ΔVACL(TH) vs Temperature
27
–25
2.05
4216 G02
ΔVCB(TH) vs Temperature
23
–50
2.10
1.95
0.5
–50
6.0
RISING
VCC = 2.3V
1.0
2.5
VCC(UVL) vs Temperature
2.20
VCC(UVL) (V)
2.5
ICC (mA)
ICC (mA)
3.0
0.5
2.0
Specifications are at TA = 25°C. VCC = 3.3V,
ICC vs Temperature
3.0
µs
Note 2: All currents into device pins are positive; all currents out of
the device pins are negative; all voltages are referenced to GND unless
otherwise specified.
unless otherwise noted.
ICC vs VCC
15
100
125
4216 G05
CGATE = 10nF
10
VSENSEP = 0.4V
1
0.1
40
VSENSEP = 3.3V
160
80
120
200
SENSE VOLTAGE (VSENSEP – VSENSEN) (mV)
4216 G06
4216fa
4
For more information www.linear.com/LTC4216
LTC4216
Typical Performance Characteristics
VGATE vs VSENSEN
ΔVGATE vs Temperature
VSENSEP = VSENSEN = VCC
IGATE(UP) vs Temperature
–22
VCC = 6V
12
–21
VCC = 5V
10
VCC = 3.3V
6.0
5.5
IGATE(UP) (µA)
6.5
∆VGATE (V)
14
VGATE (V)
7.0
8
6
VCC = 2.5V
–19
5.0
4
4.5
–50
–25
25
75
0
50
TEMPERATURE (°C)
100
2
125
0
1
2
3
4
–18
–50
6
–25
25
75
0
50
TEMPERATURE (°C)
4216 G08
VFB(TH) vs Temperature
100
125
4216 G09
VTMR(TH) vs Temperature
0.611
VON(TH) vs Temperature
1.27
0.90
0.85
0.608
1.26
0.605
FALLING
0.602
RISING
0.80
VON(TH) (V)
RISING
VTMR(TH) (V)
VFB(TH) (V)
5
VSENSEN (V)
4216 G07
1.25
0.75
FALLING
0.70
1.24
0.599
0.65
0.596
–50
–25
25
75
0
50
TEMPERATURE (°C)
100
1.23
–50
125
–25
25
75
0
50
TEMPERATURE (°C)
4216 G10
1.26
–2.0
–1.9
100
125
4216 G13
25
75
0
50
TEMPERATURE (°C)
125
VSS(CLP) vs Temperature
1.8
1.25
1.23
–50
100
1.9
1.24
25
75
0
50
TEMPERATURE (°C)
–25
4216 G12
VSS(CLP) (V)
–2.1
VFILT(TH) (V)
1.27
–25
0.60
–50
125
VFILT(TH) vs Temperature
–2.2
–1.8
–50
100
4216 G11
ITMR(UP) vs Temperature
ITMR(UP) (A)
–20
1.7
1.6
1.5
–25
25
75
0
50
TEMPERATURE (°C)
100
125
4216 G14
1.4
–50
–25
25
75
0
50
TEMPERATURE (°C)
100
125
4216 G15
4216fa
For more information www.linear.com/LTC4216
5
LTC4216
Typical Performance Characteristics
–70
IFILT(UP) vs Temperature
IFILT(DN) vs Temperature
–12
2.8
ISS(UP) vs Temperature
VFB = 2V
–10
2.6
–60
–55
–8
ISS(UP) (µA)
IFILT(DN) (µA)
IFILT(UP) (µA)
–65
2.4
–6
–4
2.2
–2
–50
–50
–25
25
75
0
50
TEMPERATURE (°C)
100
125
2.0
–50
–25
25
75
0
50
TEMPERATURE (°C)
4216 G16
Pin Functions
100
125
0
–50
VFB = 0V
–25
25
75
0
50
TEMPERATURE (°C)
4216 G17
100
125
4216 G18
(DE12/Package/MS Package)
RESET (Pin 1/Pin 1): Reset or Power-Good Output. Open
drain output that pulls low if the FB pin voltage falls below
its threshold (0.6V). During the start-up cycle, the RESET
pin goes high impedance at the end of the second timing
cycle after the FB pin goes above the FB threshold. This
pin requires an external pull-up to a positive supply. If an
undervoltage lockout condition occurs, the RESET pin
pulls low and ignores the FB pin voltage.
ON (Pin 2/Pin 2): ON Control Input. A rising edge above
the ON pin threshold (0.8V) initiates the start-up cycle
and turns on the external N-channel MOSFET. A falling
edge below 0.72V (80mV ON pin hysteresis) turns it off.
If this pin is pulled below 0.4V, following a circuit breaker
trip, it resets the electronic circuit breaker and fault latch.
FILTER (Pin 3/Pin 3): Fault Filter Input. Connect a capacitor
between this pin and ground to set up the fault filter delay.
This pin sources 60µA or sinks 2.4µA when the voltage
across the sense resistor exceeds 25mV or drops below
25mV respectively. The filter comparator rising threshold
is 1.253V.
TIMER (Pin 4/Pin 4): Timer Input. Connect a capacitor
between this pin and ground to set up the start-up timing
cycle duration. It also defines the RESET power-good delay
from the instant the FB pin voltage exceeds 0.6V. This pin
sources 2µA pull-up current during ramp up. The timer
comparator rising threshold is 1.253V.
SS (Pin 5/Not Available): Soft-Start Control Input. Connect a capacitor between this pin and ground for soft-start
during power-up. It controls the GATE ramp up, limiting
the rate of change of the inrush current when the external
MOSFET turns on. If soft-start function is not used, leave
this pin unconnected.
GND (Pin 6/Pin 5): Device Ground.
FB (Pin 7/Pin 6): Output Monitor for Reset Output. A resistive divider from the external MOSFET’s source terminal is
tied to this pin. When the voltage at this pin drops below
0.6V, the RESET pin pulls low. The FB comparator falling
threshold is 0.602V.
GATE (Pin 8/Pin 7): Gate Drive for External N-Channel
MOSFET. An internal charge pump provides 20µA gate
pull-up current and sufficient gate overdrive to the external
MOSFET. An internal shunt regulator limits the GATE pin
voltage to about 6.2V (typ) above the SENSEN pin voltage.
SENSEN (Pin 9/Pin 8): Circuit Breaker Negative Sense
Input. Connect this pin to the sense resistor terminal wired
to the drain of the external N-channel MOSFET. The sense
4216fa
6
For more information www.linear.com/LTC4216
LTC4216
Pin Functions
(DE12/Package/MS Package)
resistor is placed in the power path between SENSEP and
SENSEN pins to sense the output current. The electronic
circuit breaker trips if the voltage across the sense resistor
exceeds 25mV for more than a fault filter delay.
SENSEP (Pin 10/Pin 9): Circuit Breaker Positive Sense
Input. Connect this pin to the sense resistor terminal
wired to the positive supply input for the external output
load. This positive supply range extends from 0V to 6V.
VCC (Pin 11/Pin 10): Bias Supply Input. Operates from 2.3V
to 6V. An internal undervoltage lockout circuit disables
the device until the input supply voltage at VCC exceeds
2.12V typically.
FAULT (Pin 12/Not Available): Fault Input and Output. As
an input, driving this pin low ( 2.12V); TIMER, SS, FILTER and GATE
pin voltages < 0.2V. When the C1 voltage rises above
the TIMER pin threshold (1.253V), TIMER pulls low and
releases both the SS and GATE pins. C2 starts to ramp
8
up at the SS pin, controlling the rate of GATE ramp. This
limits the rate of change of the inrush current flowing into
the output load capacitance. RESET pin goes high after
the second timing cycle when the FB pin voltage exceeds
0.6V and its hysteresis.
When the external MOSFET is fully turned on, the output
will ramp to load supply voltage if the inrush into the load
capacitance is low. However, if the inrush current exceeds
the analog current limit of ΔVACL(TH)/RSENSE, the LTC4216
will ramp the output by sourcing the limited current into
the load capacitance.
The LTC4216 provides protection against output shortcircuits or current overload through an internal electronic
circuit breaker with trip threshold of 25mV and an analog
current limit circuit. The circuit breaker response time is
set by C3 at the FILTER pin.
For more information www.linear.com/LTC4216
4216fa
LTC4216
Applications Information
Hot Circuit Insertion
When circuit boards are inserted into a live backplane, the
supply bypass capacitors can draw huge transient current
from the power bus as they charge. Potentially, the flow
of current could damage the connector pins and glitch
the power bus, causing other boards in the system to
reset. The LTC4216 is designed to turn on or off a circuit
board supply in a controlled manner, allowing insertion
or removal without glitches or connector damage.
Overview of LTC4216 Features
1. Allows safe board insertion and removal from a live
backplane.
2. Controls load voltages from 0V to 6V.
3. High side gate drive for external N-channel MOSFET.
4. Adjustable soft-start with inrush current limiting for
large load capacitor during start-up.
5. Adjustable analog current limit (ACL) with circuit
breaker fault time-out during an overcurrent fault condition. No external gate capacitor is required for the ACL
loop compensation.
6. Electronic circuit breaker tripping at 25mV across the
sense resistor. The response time is adjustable through
an external capacitor at the FILTER pin.
7. Provides an ON pin to turn on and off the device. This can
also be used to reset the device after a circuit breaker trip.
8. Provides output supply voltage monitoring through the
FB pin and signals the RESET pin output.
9. Provides fault status output.
ON Control
The ON pin has two hysteretic comparators with different threshold levels (0.8V and 0.4V) and they serve two
purposes:
1. Turn on the device if the ON pin voltage > 0.8V for more
than 6µs and turn it off if the ON pin voltage < 0.72V for
more than 15µs.
2. Reset the device if the ON pin voltage < 0.4V for more
than 30µs after a circuit breaker trip.
There are various methods of setting the ON pin
voltage:
1. Tie the ON pin to the load supply (VIN) through a 10k
pull-up resistor.
2. Drive the ON pin with an ON/OFF logic signal from the
system controller.
3. Connect an external resistive divider at the ON pin.
This divider can be used to set a higher value for the load
supply undervoltage lockout voltage than the internal VCC
undervoltage lockout circuit.
For example, as shown in Figure 17, if both VCC and
SENSEP pins are connected to a 5V load supply, choosing
the resistive divider values, R1 = 20k, R2 = 80.6k, turns on
the device when the load supply voltage reaches around
80% of its final value.
VCC Undervoltage Lockout
A hysteretic comparator, UVLO, monitors bias supply (VCC)
for undervoltage. The thresholds are defined by VCC(UVL)
(2.12V) and its hysteresis, ΔVCC(UVL,HYST) (120mV). When
VCC rises above VCC(UVL), the device is enabled. When
VCC falls below (VCC(UVL) – ΔVCC(UVL,HYST)), the device is
disabled and GATE is pulled low. If VCC cycles below this
threshold for more than 200µs, following a circuit breaker
trip, it clears the fault latch. Any bias supply glitches that
last less than 10µs will be rejected by the UVLO glitch filter.
Timer
An external capacitor, C1, is used at TIMER pin to provide
two timing cycles for the LTC4216. The first timing cycle
is the debounce cycle when the ON pin is first turned on,
both the GATE and SS pins are held low and any shortcircuit faults are ignored by the electronic circuit breaker.
Second timing cycle is the power-good delay before the
RESET pin goes high when the FB pin voltage exceeds
0.6V and its hysteresis.
The TIMER pin sources 2µA into C1 during the two timing
cycles and is then pulled low by an internal N-channel
4216fa
For more information www.linear.com/LTC4216
9
LTC4216
Applications Information
1.253V • C1
2µA
(1)
For example, if C1 = 10nF, tTIMER = 6.2ms.
FB Glitch Filtering
The FB pin is used to monitor the output voltage of the
external MOSFET through a resistive divider. Any transients on the FB pin due to the output low spikes will
pull RESET low. To prevent RESET from generating an
unwanted system reset, the FB comparator has a glitch
filter to ride out these glitches. The filter time is 20µs for
large transients (greater than 150mV) and up to 100µs
for small transients. The relationship between glitch filter
time and the FB pin transient voltage or FB overdrive is
shown in Figure 1.
140
When the device enters an undervoltage lockout condition
or the ON pin voltage drops below 0.4V, RESET is pulled
low, ignoring the FB pin voltage.
RSENSE
VIN
SENSEP SENSEN
VCC
ON
CLOAD
R4
GATE
FB
LOGIC
R5
R3
TA = 25°C
TIMER
+
–
0.6V
100
µP
80
RESET
RESET
M2
60
40
TIMER
20
C1
0
VOUT
+
120
GLITCH FILTER TIME (µs)
M1
+
tTIMER =
FB pin voltage rises above 0.6V, the FB comparator output
goes low and a new timing cycle starts. After a complete
timing cycle at time point 6, RESET is pulled high by the
external pull-up resistor, R5. The timer period given by
Equation (1) sets the power-good delay for RESET going
high. If the FB pin voltage stays above 0.6V for less than
a timing cycle at time point 4, the RESET output remains
low. Any overcurrent fault detected by the electronic circuit breaker or FAULT pin driven low externally during the
timing cycle, will also pull the TIMER pin low and RESET
output remains low.
–
switch when the TIMER pin voltage exceeds its threshold.
The timer period for C1 to charge up to the TIMER pin
threshold, VTMR(TH) (1.253V), is given by:
0
40
80
120
160
FB OVERDRIVE (mV)
200
LTC4216**
**ADDITIONAL DETAILS
OMITTED FOR CLARITY
4216 F02
Figure 2. Output Voltage Monitor Block Diagram
4216 F01
Figure 1. FB Comparator Glitch Filter Time vs FB Overdrive
3
1 2
4
5
6
Output Voltage Monitor
As shown in Figure 2, the output voltage is monitored
through a resistive divider, R3 and R4, connected at the
FB pin, and a FB comparator with 0.6V threshold.
The normal operation of the output voltage monitor after a
start-up cycle is shown in Figure 3. At time point 1, when the
FB pin voltage falls below 0.6V, the FB comparator output
goes high. RESET is pulled low by an internal N-channel
switch after a glitch filter delay at time point 2. When the
VOUT
VFB < 0.6V
TIMER
VFB > 0.6V
VFB < 0.6V
2µA
VFB > 0.6V
2µA
VTMR(TH)
POWER-GOOD
DELAY
RESET
GLITCH FILTER DELAY
4216 F03
Figure 3. Output Voltage Monitor
Waveforms in Normal Operation
4216fa
10
For more information www.linear.com/LTC4216
LTC4216
Applications Information
Electronic Circuit Breaker
The LTC4216 features an electronic circuit breaker function
that protects the external MOSFET against short-circuits or
excessive load current conditions on the supply. An external
sense resistor connected between SENSEP and SENSEN
pins is used to measure the load current. If the voltage
across the sense resistor exceeds the circuit breaker trip
threshold of 25mV for more than a fault filter delay, the
gate of the MOSFET is pulled low, turning it off.
The fault filter delay is determined by a capacitor, C3, connected between the FILTER pin and ground as in Equation
(2). The FILTER pin sources 60µA pull-up current when the
sense voltage across the sense resistor exceeds 25mV.
Otherwise, it pulls down with 2.4µA. When the FILTER
pin voltage exceeds VFILT(TH) threshold (1.253V), there
is an internal 20µs delay before the GATE pulls low and
the FAULT pin will be pulled low. If no FILTER capacitor
is used, the filter fault delay defaults to 20µs. The circuit
breaker response time or fault filter delay with the FILTER
capacitor, C3, is given by:
tCB(TRIP)
t
1.253
(s / µF ) =
C3
(60 • D)– 2.4 (3)
Following a circuit breaker trip, the device is latched-off
and FAULT is pulled low until the fault latch is cleared by
pulling the ON pin low (< 0.4V) for at least 100µs. The
FILTER pin is pulled low by an internal N-channel switch
to discharge the capacitor quickly when the ON pin voltage falls below 0.4V and pulls down with 2.4µA when the
ON pin voltage rises above 0.8V to initiate a new start-up
cycle. The new timing cycle will not start until the FILTER
pin voltage is below 0.2V. The electronic circuit breaker
is disabled during the first timing cycle upon start-up and
any short-circuit faults will be ignored.
A
Intermittent overloads may exceed the current limit as in
Figure 5, but if the duration is sufficiently short, the FILTER
pin voltage may not reach the VFILT(TH) threshold and the
device will not shut off. To handle this situation, the FILTER
discharges with 2.4µA whenever voltage across the sense
resistor is below 25mV. Any intermittent overload with
an aggregate duty cycle of more than 4% will eventually
trip the circuit breaker. Figure 6 shows the circuit breaker
response time in seconds normalized to 1µF as given by
Equation (3). The asymmetric charging and discharging
of FILTER is a fair gauge of MOSFET heating.
CIRCUIT BREAKER TRIPS
VFILTER
60µA
NORMAL
MODE
1.253V • C 3
=
+ 20µs
60µA
(2)
The FILTER capacitor, C3, should be chosen so that the
fault filter delay is not too short to trip the circuit breaker
as the MOSFET current charges up a large output load
capacitance in analog current limit during power-up. It
also should not be too long to exceed the safe operating
area (SOA) of the external MOSFET.
B
1.253V
2.4µA
FAULT
MODE
4216 F04
Figure 4. A Continuous Fault Timing
A1
B1
A2
B2
A3
B3
25mV/RSENSE
ILOAD
2.4µA
1.253V
60µA
60µA
2.4µA
60µA
CIRCUIT
BREAKER
TRIPS
2.4µA
VFILTER
VGATE
CB
FAULT
CB
FAULT
CB
FAULT
Figure 5. Multiple Intermittent Overcurrent Condition
4216fa
For more information www.linear.com/LTC4216
11
LTC4216
Applications Information
NORMALIZED RESPONSE TIME (s/µF)
1
t/C3(s/µF) = 1.253/[(60 • D) – 2.4]
0.1
0.01
0
20
40
60
80
OVERLOAD DUTY CYCLE, D (%)
100
4216 F06
Figure 6. Circuit Breaker Filter
Response for Intermittent Overload
Analog Current Limiting
In addition to an electronic circuit breaker, the LTC4216
has included a novel analog current limit (ACL) amplifier
that does not require an external compensation capacitor
at the GATE pin. The amplifier’s stability is compensated
by the large gate input capacitance (CISS) of the external
MOSFET used. These MOSFETs usually have CISS ≥ 1nF.
However, if the MOSFET’s gate input capacitance (CISS)
is too small for loop stability, then connect an external
capacitor between the GATE pin and ground to increase
the total gate capacitance to ≥ 1nF. As given by Equation
(4), the MOSFET current, IACL, is limited to the analog
current limit voltage, ΔVACL(TH), 40mV typical, across
the sense resistor, RSENSE, connected between SENSEP
and SENSEN pins.
IACL =
∆VACL(TH)
RSENSE (4)
The ΔVACL(TH) threshold is 1.6 times higher than the
ΔVCB(TH) threshold (25mV typical) to provide dual level current sensing. When the ACL amplifier servos the MOSFET
current at ΔVACL(TH) across the sense resistor, it exceeds
ΔVCB(TH) threshold causing the FILTER pin to charge C3
with 60µA pull-up. If the condition persists long enough
for C3 to reach the VFILT(TH) threshold (1.253V), GATE is
pulled low and FAULT latched low.
If the voltage across the sense resistor is greater than
ΔVACL(TH) during an overload condition, the ACL amplifier
will servo GATE downwards in an attempt to control the
MOSFET current. Since the GATE pin voltage overdrives
the MOSFET in normal operation, the ACL amplifier needs
time to discharge the GATE to the threshold of the MOSFET
for gate regulation. For mild overload, the ACL amplifier
can control the MOSFET current, but in the event of a
severe overload, the MOSFET current may overshoot as
the MOSFET has large GATE overdrive initially. The GATE
is quickly discharged to ground followed by the ACL amplifier taking control. For applications that require very fast
analog current limit recovery from the GATE undershoot as
it discharges, connect a series resistor, RZ, with an external capacitor, CZ, at the GATE pin as shown in Figure 17.
The value of RZ should be between 10Ω and 100Ω for
optimum performance.
Soft-Start
The LTC4216 features a soft-start function that controls
the di/dt of the inrush current during power-up. As large
output load capacitors are commonly used in low voltage
applications, the normal inrush can be large enough to
glitch the load supply. With the soft-start function, the
gate of the external MOSFET is allowed to turn on very
gradually to control the inrush current flowing into the
load capacitor without causing a supply glitch.
With an external capacitor, C2, connected between the SS
pin and ground, the GATE is servoed by the ACL amplifier
to track the rate of SS ramp-up during power-up. There
are two slopes in the SS ramp-up profile: 10µA current
source pull-up for a normal ramp rate; and 1µA current
source pull-up for a slower ramp rate. Both the SS ramp
rates are given as follows:
Normal SS Ramp Rate:
dVSS(NOM) 10µA
=
dt
C 2 (5)
Slower SS Ramp Rate:
dVSS(SLOW) 1µA
=
dt
C 2 (6)
4216fa
12
For more information www.linear.com/LTC4216
LTC4216
Applications Information
For example, if C 2 = 10nF,
dVSS(SLOW)
= 0.1V /ms.
dt
dVSS(NOM)
= 1V /ms and
dt
After the initial timing cycle, the SS capacitor is charged
by a 10µA current source pull-up and GATE is held low
by the ACL amplifier. As SS ramps up, the ACL amplifier
releases the GATE when it crosses its input offset voltage. At this instant, SS switches the pull-up current from
10µA to 1µA for a slower ramp rate. GATE continues to
charge up with 20µA pull-up before the MOSFET reaches
its turn-on threshold voltage. When the external MOSFET
is first turned on, there is always a current step due to the
high gain of the MOSFET. The slower SS ramp rate allows
the gate of the external MOSFET to be turned on with a
smaller inrush current step.
When the external MOSFET is turned on, load current starts
to flow through the sense resistor, developing a voltage
drop across it. This allows the ACL amplifier to servo the
GATE to the voltage across the sense resistor, thus controlling the rate of change of the inrush current. At this instant,
SS switches back from 1µA to 10µA current source pull-up
for a normal ramp rate. GATE continues to ramp up as
the ACL amplifier servos to track the SS ramp rate. At the
end of SS ramp-up when SS reaches its final value, GATE
is servoed to ΔVACL(TH) across the sense resistor. If the
voltage across the sense resistor drops below ΔVACL(TH)
due to a falling load current, the ACL amplifier shuts off
and GATE ramps further by a 20µA pull-up.
SS is pulled low under any of the following conditions: in
VCC undervoltage lockout condition, during the first timing
cycle or when the circuit breaker fault times out. If the softstart function is not used, leave the SS pin unconnected.
Inrush Control with GATE Capacitor
rate by connecting an external capacitor, C4, from the GATE
pin to ground, as shown in Figure 7. An external resistor,
RG, of 10Ω prevents high frequency self-oscillations in
the MOSFET. The GATE slew rate is given by:
dVGATE
20µA
=
dt
C 4 + C GATE (7)
where CGATE is the associated parasitic GATE capacitance
due to the external MOSFET’s gate input capacitance, CISS.
The inrush current flowing into the load capacitor, CLOAD,
is limited to:
IINRUSH = C LOAD •
dVGATE
C LOAD
=
• 20µA
dt
C 4 + C GATE
(8)
For example, if CLOAD = 4700µF, C4 = 33nF and CGATE =
5nF, IINRUSH = 2.5A.
If CLOAD is very large and IINRUSH exceeds the analog
current limit, the GATE is servoed to control the inrush
current to ΔVACL(TH)/RSENSE.
One limitation with this technique is that it slows down
the system turn-on and turn-off time by adding a capacitor at the GATE pin. Should this technique be used, C4 ≤
50nF is recommended. However, having an external gate
capacitor helps to eliminate voltage spikes coupled through
the MOSFET’s drain-to-gate capacitance to the GATE pin
when the supply power is first applied.
RSENSE
VIN
M1
+
RG
C4
R4
SENSEP SENSEN GATE
For applications not requiring soft-start to control the di/dt
of the inrush current during power-up, an alternative way
to limit the inrush is to control the GATE pin voltage slew
VOUT
CLOAD
LTC4216**
**ADDITIONAL DETAILS
OMITTED FOR CLARITY
FB
R3
4216 F07
Figure 7. Inrush Control with External Gate Capacitor
4216fa
For more information www.linear.com/LTC4216
13
LTC4216
Applications Information
Normal Power-Up and Power-Down
Figure 8 illustrates the timing diagram for a normal powerup sequence in the case where a printed circuit board is
inserted into a live backplane.
At time point 1, the bias supply (VCC) ramps up and enables the device when the supply voltage rises above the
undervoltage lockout threshold (2.12V). At time point 2,
SENSEP supply, together with the ON pin, ramp up and
start the first timing cycle when the ON pin voltage exceeds 0.8V. The TIMER capacitor is allowed to ramp up
with 2µA pull-up once all these conditions are met: GATE
< 0.2V, FILTER < 0.2V, TIMER < 0.2V, SS < 0.2V. At time
point 3, TIMER reaches the VTMR(TH) threshold and the
first timing cycle terminates. The electronic circuit breaker
is enabled and TIMER capacitor is quickly discharged. At
time point 4 checks are made for TIMER, GATE, FILTER and
SS < 0.2V, ∆VSENSE below 25mV and FAULT high before
a GATE ramp-up cycle begins. GATE is held low by the
analog current limit amplifier as SS capacitor ramps up
with a 10µA current source. SS switches to 1µA pull-up
for a slower ramp rate when it crosses the input offset
voltage of the ACL amplifier. At this time point, the ACL
amplifier releases the GATE and allows it to ramp up with
a 20µA pull-up. At time point 6, when the GATE voltage
reaches the turn-on threshold of the external MOSFET,
current begins flowing into the load capacitor. The MOSFET
current level at this time point is controlled by the ACL
amplifier and the GATE ramp is slowed down. SS switches
the pull-up current from 1µA to 10µA for a normal ramp
rate. Between time points 6 and 7, the ACL amplifier servos
the GATE voltage to track the SS ramp rate, limiting the
slew rate of the load current. At time point 7, SS reaches
its final value and GATE continue to ramp up with the 20µA
pull-up if the load current is not in analog current limit.
At time point 8, the FB pin voltage exceeds 0.6V and the
second timing cycle is started. When the conditions of
TIMER < 0.2V, ∆VSENSE < 25mV and FAULT high are met,
the TIMER capacitor is allowed to ramp up. When TIMER
reaches the VTMR(TH) threshold at time point 9, RESET
goes high, indicating to the system controller that power
is good. After this, the TIMER is held low.
When the ON pin voltage falls below (VON(TH) – ΔVON(HYST))
threshold (0.72V), it initiates a power-down sequence. At
time point 11, GATE is discharged by both the ACL amplifier and a 100µA current source pull-down, causing the
output voltage to fall gradually. When the FB pin voltage
falls below 0.6V at time point 12, RESET goes low after a
glitch filter delay (see the section on FB glitch filtering),
indicating that power is bad. When the ON pin voltage falls
below 0.4V, the device resets and GATE is pulled low by
a strong pull-down device.
Soft-Start with Analog Current Limiting
When a very large output load capacitor is connected
during soft-start, the GATE voltage is servoed to regulate
the inrush current to ΔVACL(TH)/RSENSE. This is illustrated
in the timing diagram of Figure 9. After the initial timing
cycle, the GATE is allowed to ramp up, tracking the SS
ramp rate between time points 5 and 8. At time point 7,
when the load current builds up as the GATE pin voltage
increases, the voltage across the sense resistor rises above
ΔVCB(TH) (25mV typical). The FILTER capacitor starts to
charge up by a 60µA current source pull-up. At time point
8, SS reaches its final value at the end of SS ramp cycle.
This allows the GATE to be regulated by the ACL amplifier
at ΔVACL(TH) (40mV typical) across the sense resistor,
RSENSE, limiting the inrush to:
ILIMIT =
40mV
RSENSE (9)
The FILTER pin voltage continues to rise as the load capacitor charges up with the limited load current. At time
point 9, the FB pin voltage exceeds 0.6V, but the second
timing cycle is not allowed to start as the voltage across
the sense resistor exceeds 25mV. At time point 10, the load
current falls as the load capacitor is near full charge and
the voltage across the sense resistor drops below 40mV.
The analog current limit loop shuts off and the GATE ramps
further till its final value. The FILTER capacitor discharges
by a 2.4µA pull-down when the voltage across the sense
resistor falls below 25mV at time point 11. The duration
between time points 7 and 11 must be shorter than one
circuit breaker delay, as given by Equation (2), to avoid
a fault time-out during GATE ramp-up for very large load
4216fa
14
For more information www.linear.com/LTC4216
LTC4216
Applications Information
capacitors. A second timing cycle starts at time point 11
when the FB pin voltage exceeds 0.6V and the voltage
across the sense resistor drops below 25mV.RESET goes
ELECTRONIC CIRCUIT
BREAKER ARMED
CHECK FOR GATE,
FILTER, TIMER,
SS < 0.2V
12
high at the end of the second timing cycle (time point 12)
when TIMER reaches the VTMR(TH) threshold.
ON GOES LOW
CHECK FOR GATE, FILTER,
TIMER, SS < 0.2V AND FAULT HIGH
START 2ND TIMING CYCLE
START
(CHECK TIMER < 0.2V AND
GATE
RAMP
FAULT HIGH)
3
4
5 6
78
IN
RESET
MODE
RESET GOES HIGH
9
RESET PULLED LOW
DUE TO POWER BAD
10 11 12
13
VCC
SENSEP
ON
0.72V
0.8V
0.4V
VTMR(TH)
VTMR(TH)
TIMER
2µA
2µA
10µA
1µA
SS
GATE
10µA
TRACKS SS RAMP
20µA
(VGATE – VOUT) > VGS(TH)
POWER GOOD
VFB > 0.6V
VOUT
POWER BAD
VFB < 0.6V
RESET
4216 F08
PLUG-IN CYCLE
FIRST TIMING CYCLE
POWER-GOOD DELAY
SECOND TIMING CYCLE
Figure 8. Normal Power-Up/Power-Down Sequence
4216fa
For more information www.linear.com/LTC4216
15
LTC4216
Applications Information
FILTER RAMPS UP WHEN (VSENSEP – VSENSEN) > 25mV
OUTPUT IN ANALOG CURRENT LIMIT,
(VSENSEP – VSENSEN) = 40mV
CHECK FOR GATE, FILTER, TIMER, SS < 0.2V AND FAULT HIGH
ELECTRONIC CIRCUIT BREAKER ARMED
CHECK FOR GATE,
FILTER, TIMER,
SS < 0.2V
OUTPUT NO LONGER
IN CURRENT LIMIT
12
3
RESET PULLED LOW
DUE TO POWER BAD
2ND TIMING CYCLE CANNOT START WITH
OUTPUT IN ANALOG CURRENT LIMIT
4
5 6
7 8
RESET
GOES HIGH
9 10 11
ON GOES LOW
(ON < 0.72V)
12
IN RESET
MODE
(ON < 0.4V)
13 14 15
16
VCC
SENSEP
ON
0.72V
0.8V
0.4V
VTMR(TH)
TIMER
2µA
2µA
10µA
1µA
SS
GATE
VTMR(TH)
10µA
IN REGULATION
TRACKS SS RAMP
POWER GOOD
VFB > 0.6V
VOUT
ILOAD
20µA
(VGATE – VOUT) > VGS(TH)
POWER BAD
VFB < 0.6V
LOAD CURRENT REGULATING
AT 40mV/RSENSE
(VSENSEP – VSENSEN) > 25mV
(VSENSEP – VSENSEN) < 25mV
VFILT(TH)
60µA
FILTER
2.4µA
RESET
4216 F09
PLUG-IN CYCLE
FIRST TIMING CYCLE
POWER-GOOD DELAY
SECOND TIMING CYCLE
Figure 9. Normal Power-Up Sequence (with Analog Current Limiting)
4216fa
16
For more information www.linear.com/LTC4216
LTC4216
Applications Information
Power-Up into an Output-Short
Sense Resistor Considerations
Figure 10 shows the timing diagram in the case when the
output is a dead short during power-up. As GATE ramps
up at time point 6, the MOSFET current increases due to
the output short causing the voltage drop across the sense
resistor to rise above 25mV. FILTER sources 60µA, charging the external capacitor. At time point 7, GATE regulates
to limit the output current to 40mV/RSENSE. If the output
continues to be in analog current limit when the FILTER
pin voltage reaches its threshold (1.253V) at time point
8, the circuit breaker trips and GATE is pulled low. The
device latches-off and FAULT is pulled low, indicating a
fault condition. The FILTER capacitor discharges through
a 2.4µA pull-down until the device resets.
The circuit breaker trip threshold of 25mV and the value
of the sense resistor, RSENSE, connected between the
SENSEP and SENSEN pins, determine the trip current level
as given by Equation (10). If the fault current level exceeds
the analog current limit, the current is limited to a value
given by Equation (11). Should the overload condition exist
for more than one fault filter delay as given by Equation
(2), the circuit breaker trips and the device is latched-off.
Resetting the Electronic Circuit Breaker
When the LTC4216’s electronic circuit breaker is tripped
during a fault condition, FAULT is asserted low and the
RESET, SS and GATE pins are all pulled to ground. This is
shown in the timing diagram of Figure 11. The LTC4216
remains latched-off until the external fault is cleared. To
clear the internal fault latch and restart the device, pull
the ON pin low (< 0.4V) at time point 4 for at least 100µs,
after which the FAULT will go high at time point 5. Toggling the ON pin from low to high (> 0.8V) initiates a new
start-up cycle.
ITRIP(CB) =
IACL =
∆VCB(TH) 25mV
=
RSENSE
RSENSE (10)
∆VACL(TH) 40mV
=
RSENSE
RSENSE (11)
For a new circuit design, the sense resistor value is first
calculated from the maximum operating load current under
normal conditions and the minimum circuit breaker trip
threshold. This is given by:
RSENSE =
∆VCB(TH,MIN)
21.5mV
=
ILOAD(MAX)
ILOAD(MAX) (12)
CIRCUIT BREAKER TRIPS
AND LATCHED-OFF
MILD
OVERCURRENT
ON
23
0.8V
8
TRACKS SS RAMP
VGATE – VOUT < VGS(TH)
GATE
REGULATING
FPD
FPD
GATE
40mV
POWER BAD
VFB < 0.6V
VOUT
25mV
ILOAD(MAX)
= 5A) and IINRUSH(MIN) = 7.9A respectively. Equation (19)
gives C3 = 10nF. To account for errors in C3, FILTER current
(60µA) and FILTER threshold (1.253V), the calculated value
should be multiplied by 1.5, giving the nearest standard
value of C3 = 18nF.
If a short-circuit occurs, a current of up to ISHORTCIRCUIT(MAX) = 12.1A will flow through the MOSFET for
400µs as dictated by C3 = 18nF in Equation (2). The
MOSFET must be selected based on this criterion and
checked against the SOA curve.
VCC Supply RC Network
The LTC4216 has two separate pins, VCC and SENSEP,
for supply input and sensing:
1. VCC pin for powering the internal circuitry.
2. SENSEP pin, together with the SENSEN pin, for sensing the current flowing from the load supply through the
external sense resistor and N-channel MOSFET to the
output load.
In most Hot Swap devices, VCC and SENSEP are one
common pin, providing the device’s supply and external
MOSFET’s current sensing. However, supply dips due
to output short can potentially trigger the device into an
undervoltage lockout condition, causing the device to
disable and its internal latches to reset.
As bypass capacitors are not allowed on the powered
supply side of the external MOSFET switch residing on
4216fa
For more information www.linear.com/LTC4216
19
LTC4216
Applications Information
the plug-in boards, the LTC4216 provides two separate
pins for bias supply input and load supply sensing. With
this configuration, an RC network, RY and CY, shown
in Figure 13, can be used with the VCC pin to ride out
supply glitches during output short or adjacent board
short. The RC network shown has a time constant of 7µs
and this is good enough for the supply to ride out most
supply glitches, preventing the device from entering an
undervoltage lockout condition unnecessarily. When VCC
and SENSEP pins are connected together, the RY value
should be chosen such that VCC pin voltage is lower than
VSENSEP – 70mV; otherwise, part of VCC pin current will
be diverted through SENSEP pin.
This unique scheme of separating the device’s supply input
and sensing also provides the flexibility of operating the
load supply from ground to its supply rail with a minimum
bias supply voltage of 2.3V. For proper operation, the load
supply is required to be equal to or less than the bias supply voltage (maximum 6V).
Supply Transients Protection
There are two methods used in most applications to
eliminate supply transients:
1. Transient voltage suppressor to clip the transient to
a safe level.
2. Snubber (series RC) network.
For applications with load supply voltages of 3.3V or
higher, the ringing and overshoot during hot-swapping
or output short-circuit events can easily exceed the
absolute maximum rating of the LTC4216. To minimize
the risk, a transient voltage suppressor and snubber
network are highly recommended at the SENSEP pin.
For applications with load supply voltages of 2.5V or
below, usually a snubber network is adequate to reduce
the supply ringing.
Figure 13 shows the connections of the supply transient
protection devices, Z1, RX and CX, around the LTC4216.
The RC network, RY and CY, at the VCC pin also serve
as a snubber circuit for the load supply (VIN). On the
PCB layout, these transient protection devices should
be mounted very close to the LTC4216’s load supply rail
using short lead lengths to minimize lead inductance.
RSENSE
VIN
5V
RY
22Ω
Z1
RX
10Ω
M1
VOUT
5V
R4
VCC
SENSEP SENSEN GATE
FB
R3
LTC4216**
CX
0.1µF
GND
CY
0.33µF
TIMER
C1
FILTER
C2
+
SS
C3
GND
**ADDITIONAL DETAILS
OMITTED FOR CLARITY
CLOAD
Z1: SMAJ6.0A
4216 F13
Figure 13. Connecting Transient Protection
Devices to the LTC4216’s Load Supply Rail
Staggered Pins Connections
The LTC4216 can be used on either the backplane side of
the connector or a printed circuit board, and examples for
both are shown in Figure 14 and 15. Printed circuit board
edge connectors with staggered pins are recommended as
the insertion and removal of circuit boards will sequence
the pin connections. Supplies (VCC and SENSEP) and
ground connections on the printed circuit board should
be wired to the long pins or blades of the edge connector.
Control signal (ON) and status signals (RESET and FAULT)
passing through the edge connector should be wired to
short pins or blades.
Backplane and PCB Connection Sensing
The LTC4216’s ON pin can be used in various ways to
detect whether the printed circuit board is seated properly
in the backplane connector before the LTC4216 begins a
start-up cycle.
An example is shown in Figure 14, in which the LTC4216
is mounted on the PCB and the R1/R2 resistive divider
is connected to the ON pin. On the edge connector, R2
is wired to a short pin. Before the connectors are mated,
the ON pin is held low by R1, keeping the LTC4216 in an
off state. When the connectors are mated, the resistive
divider is connected to the load supply (VIN) and the ON
pin voltage rises above 0.8V, turning the LTC4216 on.
4216fa
20
For more information www.linear.com/LTC4216
LTC4216
Applications Information
An example with LTC4216 mounted on the backplane is
shown in Figure 15. In this case, the NPN transistor, Q1,
and two resistors, R7 and R8, form the PCB connection
sensing circuit with the ON pin. With the PCB out of the
backplane connector, Q1 base is tied to load supply through
R7, turning Q1 on and pulling the LTC4216’s ON pin low.
The base of Q1 is also wired to the backplane connector
pin. When the PCB is inserted into the backplane, Q1 base
is grounded through a short pin connection on the PCB.
This turns off Q1 and the LTC4216’s ON pin is allowed
to pull high to the load supply through R8, turning it on.
circuit. M2 is held on by its gate, pulling high through
R8 to the load supply until the PCB is mated firmly to
the backplane connector. A low logic-level for both the
ON/RST and ON/OFF signals turns M2 and M3 off, allowing
the ON pin to be pulled high and turning LTC4216 on. A
high logic-level for the ON/OFF signal turns off the device
and pulls the GATE low. The device is reset by pulling the
ON/RST signal high.
5V Hot Swap Application
Figure 17 shows a Hot Swap application circuit with VCC
and SENSEP pins connected together to a 5V load supply
(VIN). The resistive divider, R1/R2, sets the undervoltage
threshold for the load supply and allows the system to
start up only after the supply voltage rises above 4V.
The resistive divider, R3/R4, monitors VOUT and signals
In the previous examples, the PCB connection sensing
circuits are not wired with interrupt capability from the
system controller. As shown in Figure 16, adding logiclevel discrete N-channel MOSFETs, M2 and M3, and a
couple of resistors allow interrupt control to the sensing
BACKPLANE PCB EDGE
CONNECTOR CONNECTOR
(FEMALE)
(MALE)
VCC
3.3V
LONG
VIN
1.5V
LONG
RX
10Ω
CX
100nF
CY
330nF
11
2
R2
3.3k
1%
R1
C4
20k 10nF
1%
10
9
FB
7
FAULT
TIMER
4
SS
C1
10nF
5
FILTER
C2
10nF
3
GND RESET
R4
13k
1%
R3
10k
1%
LTC4216
ON
PCB CONNECTION
SENSING
LONG
M1
Si4864DY
8
VCC SENSEP SENSEN GATE
SHORT
GND
RSENSE
0.004Ω
RY
22Ω
+
R6
10k
VOUT
1.5V
5A
CLOAD
4700µF
R5
10k
µP
LOGIC
12
FAULT
1
RESET
6
C3
68nF
4216 F14
Figure 14. Single Channel 1.5V Hot Swap Controller
RY
22Ω
VIN
3.3V
Z1
CX
100nF
RX
10Ω
PCB
CONNECTION
SENSING
R7
10k
R8
10k
CY
330nF
11
RSENSE
0.004Ω
10
M1
Si4864DY
LONG
8
VCC SENSEP SENSEN GATE
2
ON
Q1
9
FAULT
LTC4216
6
GND
RESET
TIMER
4
Z1: SMAJ6.0A
Q1: MMBT3904
BACKPLANE PCB EDGE
CONNECTOR CONNECTOR
(FEMALE)
(MALE)
C1
10nF
SS
5
FILTER
C2
4.7nF
3
C3
33nF
FB
12
R6
10k
LONG
SHORT
R5
10k
1
SHORT
7
SHORT
R3
10k
1%
SHORT
+
CLOAD
1000µF
FAULT
VOUT
3.3V
5A
R4
39.2k
1%
RESET
R9
100k
4216 F15
Figure 15. Hot Swap Controller on Backplane with Staggered Pin Connections
4216fa
For more information www.linear.com/LTC4216
21
LTC4216
Applications Information
BACKPLANE PCB EDGE
CONNECTOR CONNECTOR
(FEMALE)
(MALE)
LONG
VCC
5V
CY
330nF
RY
22Ω
RSENSE
0.004Ω
LONG
VIN
3.3V
SHORT
R3
20k 1%
ON/OFF
LONG
GND
11
10
9
8
VCC SENSEP SENSEN GATE
ON
R2
M2
4.42k
1%
FB
7
R4
10k
1%
LTC4216
FAULT
R1
M3 5.62k
1%
SHORT
+
R5
39.2k
1%
2
SHORT
ON/RST
CX
RX
100nF
10Ω
R8
10k
Z1
M1
Si4864DY
4
PCB CONNECTION SENSING
5
C1
10nF
GND RESET
FILTER
SS
TIMER
C2
4.7nF
3
C3
33nF
R7
10k
R6
10k
µP
LOGIC
12
FAULT
1
6
VOUT
3.3V
5A
CLOAD
1000µF
RESET
Z1: SMAJ6.0A
M2, M3: 2N7002K
4216 F16
Figure 16. PCB Connection Sensing with ON/OFF Control
VIN
5V
BACKPLANE PCB EDGE
CONNECTOR CONNECTOR
(FEMALE)
(MALE)
LONG
RY
22Ω
Z1
SHORT
RX
10Ω
CX
100nF
R2
80.6k
1%
CY
330nF
11
10
9
8
VCC SENSEP SENSEN GATE
2
FB
C1
10nF
FAULT
FILTER
SS
5
C2
4.7nF
3
GND RESET
C3
22nF
+
R4
64.9k
1%
7
R3
10k
1%
LTC4216
ON
4
LONG
M1
Si4864DY
CZ
RZ
10nF
100Ω
R1
20k
1% TIMER
GND
RSENSE
0.004Ω
12
1
R6
10k
R5
10k
CLOAD
470µF
VOUT
5V
5A
µP
LOGIC
FAULT
RESET
6
Z1: SMAJ6.0A
4216 F17
Figure 17. 5V Hot Swap Application
the RESET high when VOUT rises above 4.5V. Transient
voltage suppressor, Z1, and snubber network, RX and
CX, connected at SENSEP pin are highly recommended
to protect the 5V supply system from ringing and voltage
spikes during a fault condition. The RC network, RY and
CY, connected at the VCC pin, allows the LTC4216 bias
supply to ride out supply glitches during a fault condition
or adjacent board short.
to ground. The auto-retry circuit will attempt to restart
the LTC4216 after a circuit breaker trip, as shown in the
timing diagram of Figure 19. In addition to the cooling
cycle provided by the TIMER period during auto-retry
sequence, the RC time constant for the ON pin voltage to
reach 0.8V provides additional turn-off time to prevent
the external MOSFET from overheating. The auto-retry
duty cycle is given by:
Auto-Retry after a Fault
As shown in Figure 18, the LTC4216 can be configured to
automatically retry after a fault condition by connecting
both the FAULT and ON pins together with an RC network.
The network has a pull-up resistor, RAUTO, tied to the load
supply (VIN) and an external capacitor, CAUTO, connected
22
Duty Cycle ≈
tSS + tFILTER • 100%
tOFF + tTIMER + tSS + tFILTER (20)
where
tTIMER = TIMER period as given by Equation (1);
tOFF = time taken to charge the capacitor, CAUTO, from
For more information www.linear.com/LTC4216
4216fa
LTC4216
Applications Information
capacitor, C2, from 0V to its final value (1.65V) by 10µA
current source only.
FAULT VOL to VON(TH) threshold (0.8V). As there is an
internal 5µA current source pull-up at the FAULT pin, it
complicates the equation for tOFF. This is approximately
given by:
tOFF ≈
For the component values shown, the external RC time
constant is set at 0.2 second, tTIMER = 62ms, tOFF = 25ms
at VIN = 5V, tSS = 1.6ms, tFILTER = 480µs and the auto-retry
duty cycle is 2.3%. The auto-retry duty cycle can be further
reduced by increasing both the tTIMER delay and the RC
delay. As an example, increasing the TIMER capacitor, C1,
value from 100nF to 330nF, and RAUTO value from 200k
to 470k reduces the duty cycle to 0.8%.
RAUTO • C AUTO •(VON(TH) − VOL )
(VIN – VON(TH) ) + RAUTO • 5µA (21)
tFILTER = circuit breaker response time as given by Equation
(2); tSS = approximated time taken to charge the soft-start
BACKPLANE PCB EDGE
CONNECTOR CONNECTOR
(FEMALE)
(MALE)
LONG
VIN
5V
Z1
R5
10k
RAUTO
200k
RX
10Ω
CX
100nF
RY
22Ω
CY
330nF
1
SHORT
RESET
12
2
CAUTO
1µF
R4
64.9k
1%
11
10
9
8
VCC SENSEP SENSEN GATE
FB
RESET
ON
GND
6
SS
FILTER
TIMER
4
5
3
C1
C2
C3
100nF
4.7nF
22nF
+
VOUT
5V
CLOAD 5A
470µF
7
R3
10k
1%
LTC4216
FAULT
LONG
GND
M1
Si4864DY
RSENSE
0.004Ω
4216 F18
Z1: SMAJ6.0A
Figure 18. Auto-Retry Application
FILTER RAMPS UP WHEN
(VSENSEP–VSENSEN) >25mV
OUTPUT IN ANALOG CURRENT LIMIT
CHECK FOR GATE, FILTER,
TIMER, SS < 0.2V AND FAULT HIGH
1
ON/ FAULT PULLED LOW
DEVICE RESET
1ST TIMING CYCLE RESTART
ELECTRONIC CIRCUIT
BREAKER ARMED
CHECK FOR GATE, FILTER,
TIMER, SS < 0.2V
2
3
4
5
6
10
789
11 12
13
14
SENSEP
0.8V
0.4V
ON/FAULT
0.8V
VOL
10µA
1µA
SS
10µA
GATE
REGULATING
TRACKS SS RAMP
(VGATE – VOUT) > VGS(TH)
GATE
40mV
25mV
SENSEP–SENSEN
VTMR(TH)
TIMER
VTMR(TH)
2µA
2µA
VFILT(TH)
FILTER
2.4µA
60µA
tOFF
tTIMER
tFILTER
tSS
tRST(ONLO)
tTIMER
4216 F19
tOFF
Figure 19. Auto-Retry Timing
4216fa
For more information www.linear.com/LTC4216
23
LTC4216
Package Description
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
DE/UE Package
12-Lead Plastic DFN (4mm × 3mm)
(Reference LTC DWG # 05-08-1695 Rev D)
NOTE:
1. DRAWING PROPOSED TO BE A VARIATION OF VERSION
(WGED) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE
DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT,
SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
0.70 ±0.05
3.30 ±0.05
3.60 ±0.05
2.20 ±0.05
1.70 ±0.05
PACKAGE OUTLINE
0.25 ±0.05
0.50 BSC
2.50 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
4.00 ±0.10
(2 SIDES)
7
0.40 ±0.10
R = 0.115
TYP
12
R = 0.05
TYP
PIN 1
TOP MARK
(NOTE 6)
0.200 REF
3.30 ±0.10
3.00 ±0.10
(2 SIDES)
1.70 ±0.10
0.75 ±0.05
6
0.25 ±0.05
1
PIN 1 NOTCH
R = 0.20 OR
0.35 × 45°
CHAMFER
(UE12/DE12) DFN 0806 REV D
0.50 BSC
2.50 REF
BOTTOM VIEW—EXPOSED PAD
0.00 – 0.05
MS Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661 Rev E)
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
0.889 ± 0.127
(.035 ± .005)
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
0.254
(.010)
0.50
0.305 ± 0.038
(.0197)
(.0120 ± .0015)
BSC
TYP
RECOMMENDED SOLDER PAD LAYOUT
10 9 8 7 6
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
4.90 ± 0.152
(.193 ± .006)
DETAIL “A”
0.497 ± 0.076
(.0196 ± .003)
REF
0° – 6° TYP
GAUGE PLANE
1 2 3 4 5
0.53 ± 0.152
(.021 ± .006)
DETAIL “A”
0.18
(.007)
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
SEATING
PLANE
0.86
(.034)
REF
1.10
(.043)
MAX
0.17 – 0.27
(.007 – .011)
TYP
0.50
(.0197)
BSC
0.1016 ± 0.0508
(.004 ± .002)
MSOP (MS) 0307 REV E
4216fa
24
For more information www.linear.com/LTC4216
LTC4216
Revision History
REV
DATE
DESCRIPTION
A
4/13
Corrected Supply Voltage to Output in the tenth feature
PAGE NUMBER
1
Raised DE storage temperature limit to 150°C. Separated Order Information as per latest format
2
Condition specified for ΔVCB(TH). New specification for tCB(TRIP) without FILTER capacitor.
3
Added new curve: Analog Current Limit Delay vs Sense Voltage
4
Removed curve: VFAULT(TH) vs Temperature
5
Updated RESET pin description. Added threshold information to FILTER, TIMER and FB pin descriptions.
6
Guidance given for the value of RZ
12
RG added to Figure 7 and described before Equation 7
13
4216fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection
of its circuits
as described
herein will not infringe on existing patent rights.
For more
information
www.linear.com/LTC4216
25
LTC4216
Typical Application
LTC4216CMS with Gate Capacitor for Slew Rate Control
VIN
5V
BACKPLANE PCB EDGE
CONNECTOR CONNECTOR
(FEMALE)
(MALE)
LONG
Z1
RSENSE
0.01Ω
RX
10Ω
CX
100nF
SHORT
CY
330nF
RG
10Ω
RY
22Ω
VCC SENSEP SENSEN GATE
SHORT
RESET
R5
10k
RESET
C4
22nF
FB
LTC4216
R2
10k
R4
64.9k
1%
+
VOUT
5V
CLOAD 2A
470µF
R3
10k
1%
ON
FILTER
TIMER
LONG
GND
M1
Si9426DY
C1
10nF
GND
C3
68nF
Z1: SMAJ6.0A
4216 TA02
Related Parts
PART NUMBER
DESCRIPTION
COMMENTS
LTC1421
Dual Channels, Hot Swap Controller
Operates from 3V to 12V, Supports –12V, SSOP-24
LTC1422
Single Channel, Hot Swap Controller
Operates from 2.7V to 12V, SO-8
LTC1642
Single Channel, Hot Swap Controller
Operates from 3V to 16.5V, Overvoltage Protection up to 33V, SSOP-16
LTC1645
Dual Channel, Hot Swap Controller
Operates from 3V to 12V, Power Sequencing, SO-8 or SO-14
LTC1647-1/LTC1647-2/
LTC1647-3
Dual Channel, Hot Swap Controller
Operates from 2.7V to 16.5V, SO-8 or SSOP-16
LTC4210-1/LTC4210-2
Single Channel, Hot Swap Controller
Operates from 2.7V to 16.5V, Active Current Limiting, SOT23-6
LTC4211
Single Channel, Hot Swap Controller
Operates from 2.5V to 16.5V, Multifunction Current Control,
MSOP-8 or MSOP-10
LTC4212
Single Channel, Hot Swap Controller
Operates from 2.5V to 16.5V, Power-Up Timeout, MSOP-10
LTC4214
Negative Voltage, Hot Swap Controller
Operates from –6V to –16V, MSOP-10
LT4220
Positive and Negative Voltage,
Dual Channels, Hot Swap Controller
Operates from ±2.7V to ±16.5V, SSOP-16
LTC4221
Dual Hot Swap Controller/Sequencer
Operates from 1V to 13.5V, Multifunction Current Control, SSOP-16
LTC4230
Triple Channels, Hot Swap Controller
Operates from 1.7V to 16.5V, Multifunction Current Control, SSOP-20
4216fa
26 Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
For more information www.linear.com/LTC4216
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com/LTC4216
LT 0413 REV A • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 2013
工商网监
湘ICP备2023018690号
