LTC1043

LTC1043 Dual Precision Instrumentation Switched Capacitor Building Block DESCRIPTIO The LTC®1043 is a monolithic, charge-balanced, dual switched capacitor instrumentation building block. A pair of switches alternately connects an external capacitor to an input voltage and then connects the charged capacitor across an output port. The internal switches have a break-before-make action. An internal clock is provided and its frequency can be adjusted with an external capacitor. The LTC1043 can also be driven with an external CMOS clock. The LTC1043, when used with low clock frequencies, provides ultra precision DC functions without requiring precise external components. Such functions are differential voltage to single-ended conversion, voltage inversion, voltage multiplication and division by 2, 3, 4, 5, etc. The LTC1043 can also be used for precise V–F and F–V circuits without trimming, and it is also a building block for switched capacitor filters, oscillators and modulators. The LTC1043 is manufactured using Linear Technology’s enhanced LTCMOSTM silicon gate process. , LTC and LT are registered trademarks of Linear Technology Corporation. LTCMOS is a trademark of Linear Technology Corporation. FEATURES ■ ■ ■ ■ ■ ■ ■ Instrumentation Front End with 120dB CMRR Precise, Charge-Balanced Switching Operates from 3V to 18V Internal or External Clock Operates up to 5MHz Clock Rate Low Power Two Independent Sections with One Clock APPLICATIO S ■ ■ ■ ■ ■ Precision Instrumentation Amplifiers Ultra Precision Voltage Inverters, Multipliers and Dividers V–F and F–V Converters Sample-and-Hold Switched Capacitor Filters TYPICAL APPLICATIO 5V 4 7 8 Instrumentation Amplifier 140 5V 3 1µF CH 11 DIFFERENTIAL INPUT CS 12 1µF 13 14 R1 16 0.01µF 17 LTC1043 • TA01 CS = CH = 1µF + – 8 1 VOUT CMRR (dB) 120 100 80 60 40 20 100 1/2 LTC1013 2 4 –5V 1µF (EXTERNAL) R2 1/2 LTC1043 CMRR > 120dB AT DC CMRR > 120dB AT 60Hz DUAL SUPPLY OR SINGLE 5V GAIN = 1 + R2/R1 VOS ≈ 150µV ∆ VOS ≈ 2µV/°C ∆T COMMON MODE INPUT VOLTAGE INCLUDES THE SUPPLIES 1k 10k 100k FREQUENCY OF COMMON MODE SIGNAL LTC1043 • TA02 –5V U U U CMRR vs Frequency 1043fa 1 LTC1043 ABSOLUTE (Note 1) AXI U RATI GS PACKAGE/ORDER I FOR ATIO TOP VIEW SH B CB+ CB– V+ S2B S1B S1A S2A NC 1 2 3 4 5 6 7 8 9 18 S3B 17 V – 16 COSC 15 S4B 14 S4A 13 S3A 12 CA– 11 CA+ 10 SHA Supply Voltage ........................................................ 18V Input Voltage at Any Pin .......... –0.3V ≤ VIN ≤ V+ + 0.3V Operating Temperature Range LTC1043C ................................... –40°C ≤ TA ≤ 85°C LTC1043M (OBSOLETE).............– 55°C ≤ TA ≤ 125°C Storage Temperature Range ................. –65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C ORDER PART NUMBER LTC1043CN LTC1043CSW SW PACKAGE 18-LEAD PLASTIC SO TJMAX = 100°C, θJA = 100°C/W PACKAGE (N) TJMAX = 150°C, θJA = 85°C/W PACKAGE (SW) D PACKAGE 18-LEAD SIDE BRAZED (HERMETIC) N PACKAGE 18-LEAD PDIP LTC1043MD OBSOLETE PACKAGE Consider the N18 Package as an Alternate Source LTC1043 • POI01 Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS + SYMBOL PARAMETER IS Power Supply Current CONDITIONS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V = 10V, V– = 0V, LTC1043M operates from –55°C ≤ TA ≤ 125°C; LTC1043C operates from –40°C ≤ TA ≤ 85°C, unless otherwise noted. MIN ● LTC1043M TYP MAX 0.25 0.4 0.4 0.7 0.65 1 100 500 400 700 700 1 50 75 70 100 MIN LTC1043C TYP MAX 0.25 0.4 6 6 240 400 185 34 40 25 75 5 120 0.4 0.7 0.65 1 100 400 700 700 1 50 75 70 100 UNITS mA mA mA mA pA nA Ω Ω Ω kΩ kHz kHz kHz µA µA ns ns MHz dB Pin 16 Connected High or Low COSC (Pin 16 to V –) = 100pF ● II RON RON fOSC OFF Leakage Current ON Resistance ON Resistance Internal Oscillator Frequency Any Switch, Test Circuit 1 (Note 2) ● 6 6 240 Test Circuit 2, VIN = 7V, 1 = ± 0.5mA V+ = 10V, V – = 0V Test Circuit 2, VIN = 3.1V, 1 = ±0.5mA V + = 5V, V – = 0V COSC (Pin 16 to V –) = 0pF COSC (Pin 16 to V –) = 100pF Test Circuit 3 Pin 16 at V+ or V – ● 400 ● ● ● 20 15 185 34 40 25 20 15 IOSC Pin Source or Sink Current Break-Before-Make Time Clock to Switching Delay COSC Pin Externally Driven COSC Pin Externally Driven with CMOS Levels V+ = 5V, V – = – 5V, –5V < VCM < 5V DC to 400Hz 75 5 120 fM CMRR Max External CLK Frequency Common Mode Rejection Ratio Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: OFF leakage current is guaranteed but not tested at 25°C. 1043fa 2 U W U U WW W LTC1043 TYPICAL PERFOR A CE CHARACTERISTICS Power Supply Current vs Power Supply Voltage 1.6 TA = – 55°C COSC = 0pF 1.4 COSC = 0.0047pF SUPPLY CURRENT (mA) 1.2 TA = 25°C COSC = 0pF 1.0 COSC = 0.0047pF 0.8 TA = 125°C COSC = 0pF 0.6 COSC = 0.0047pF 0.4 0.2 0 0 2 4 6 8 10 12 14 16 18 20 VSUPPLY (V) LTC1043 • TPC01 RON (Ω) RON (Ω) RON vs VIN 260 240 220 V IN 200 RON (Ω) 180 160 140 120 100 80 0 2 4 6 8 10 12 14 16 18 20 VIN (V) LTC1043 • TPC04 RON (PEAK) I = 100µA V+ = 15V V – = 0V TA = 25°C RON (Ω) I = 100µA I = mA 500 400 300 200 100 0 0 RON (Ω) Oscillator Frequency, fOSC vs COSC 1M TA = 25°C 100k 200 175 fOSC (kHz) V+ = 10V, V – = 0V V+ = 5V, V – = 0V V+ = 15V, V – = 0V OSCILLATOR FREQUENCY NORMALIZED TO fOSC AT 5V SUPPLY fOSC (Hz) 10k 1k 100 0 2k 4k 6k COSC (pF) 8k 10k UW LTC1043 • TPC07 (Test Circuits 2 through 4) RON vs VIN 550 500 450 V IN 400 350 300 250 200 150 100 0 1 2 VIN (V) LTC1043 • TPC02 RON vs VIN I = 100µA V+ = 5V V – = 0V TA = 25°C 280 260 240 VIN 220 200 180 160 140 120 100 3 4 5 0 1 2 3 4 56 VIN (V) 7 8 9 10 I = 100µA I = mA RON (PEAK) I = 100µA V+ = 10V V – = 0V TA = 25°C RON (PEAK) I = 100µA I = mA LTC1043 • TPC03 RON (Peak) vs Power Supply Voltage 1000 900 800 700 600 VIN ≈ 3.2V VIN ≈ 7V 3V ≤ V+ + ≤18V V – = 0V TA = 25°C 2 4 6 VIN = 1.6V VIN RON (PEAK) I = 100µA 1100 1000 900 800 700 600 500 400 300 200 100 RON (Peak) vs Power Supply Voltage and Temperature RON (PEAK) VIN I = 100µA TA = 125°C VIN ≈ 11V TA = 70°C TA = –55°C 0 2 4 6 8 10 12 14 16 18 20 VSUPPLY (V) LTC1043 • TPC06 VIN ≈ 15.1V 8 10 12 14 16 18 20 VSUPPLY (V) LTC1043 • TPC05 Oscillator Frequency, fOSC vs Supply Voltage 250 225 TA = 25°C 2.0 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 0 Normalized Oscillator Frequency, fOSC vs Supply Voltage 0pF < COSC < 0.01µF TA = 25°C COSC = 0pF 150 125 100 75 50 25 0 2 4 6 8 10 12 14 16 18 20 VSUPPLY (V) LTC1043 • TPC08 COSC = 100pF 2 4 6 8 10 12 14 16 18 20 VSUPPLY (V) LTC1043 • TPC09 1043fa 3 LTC1043 TYPICAL PERFOR A CE CHARACTERISTICS Oscillator Frequency, fOSC vs Ambient Temperature, TA 350 325 300 275 fOSC (kHz) 250 225 200 175 150 125 V+ = 5V, V = 0V V+ = 15V, V– = 0V – PIN 16 SOURCE OR SINK CURRENT (µA) COSC = 0pF tNOV (ns) V+ = 10V, V– = 0V 100 50 25 0 75 100 –50 –25 AMBIENT TEMPERATURE (°C) LTC1043 • TPC10 BLOCK DIAGRA 4 UW 125 (Test Circuits 2 through 4) Break-Before-Make Time, tNOV, vs Supply Voltage 80 TA = 25°C 70 60 50 40 30 COSC Pin ISINK, ISOURCE vs Supply Voltage 100 ISINK, TA = –55°C 75 ISINK, TA = 25°C 50 ISOURCE, TA = –55°C ISOURCE, TA = 25°C 25 ISINK, TA = 125°C ISOURCE, TA = 125°C 0 0 2 4 6 8 10 12 14 16 18 20 10 0 2 4 6 8 10 12 14 16 18 20 VSUPPLY (V) LTC1043 • TPC12 LTC1043 • TPC11 W S1A 7 S2A 8 SHA 10 11 CA+ 12 CA– S3A 13 CHARGE BALANCING CIRCUITRY S4A 14 S1B 6 S2B 5 SHB 1 2 CB+ 3 CB– S3B 18 CHARGE BALANCING CIRCUITRY S4B 15 NON-OVERLAPPING CLOCK V+ V– COSC 16 V+ 4 V– 17 OSCILLATOR THE CHARGE BALANCING CIRCUITRY SAMPLES THE VOLTAGE AT S3 WITH RESPECT TO S4 (PIN 16 HIGH) AND INJECTS A SMALL CHARGE AT THE C+ PIN (PIN 16 LOW). THIS BOOSTS THE CMRR WHEN THE LTC1043 IS USED AS AN INSTRUMENTATION AMPLIFIER FRONT END. FOR MINIMUM CHARGE INJECTION IN OTHER TYPES OF APPLICATIONS, S3A AND S3B SHOULD BE GROUNDED THE SWITCHES ARE TIMED AS SHOWN WITH PIN 16 HIGH LTC1043 • BD01 1043fa LTC1043 TEST CIRCUITS Test Circuit 1. Leakage Current Test (7, 13, 6, 18) (8, 14, 5, 15) NOTE: TO OPEN SWITCHES, S1 AND S3 SHOULD BE CONNECTED TO V –. TO OPEN S2, S4, COSC PIN SHOULD BE TO V+ COSC LTC1043 • TC01 Test Circuit 2. RON Test (7, 13, 6, 18) (8, 14, 5, 15) A + 0V TO 10V + (11, 12, 2, 3) VIN (11, 12, 2, 3) 100µA to 1mA CURRENT SOURCE A LTC1043 • TC02 Test Circuit 3. Oscillator Frequency, fOSC Test Circuit 4. CMRR Test 7 8 VOUT (TEST PIN) 2 V+ V– 17 COSC 16 10 11 + 4 LTC1043 + 1µ F 1µF CAPACITORS ARE NOT ELECTROLYTIC 5 12 + 6 IV LTC1043 • TC03 13 14 + V– ≤ VCM ≤ V+ CMRR = 20 LOG () VCM VOUT LTC1043 • TC04 NOTE: FOR OPTIMUM CMRR, THE COSC SHOULD BE LARGER THAN 0.0047µF, AND THE SAMPLING CAPACITOR ACROSS PINS 11 AND 12 SHOULD BE PLACED OVER A SHIELD TIED TO PIN 10 APPLICATIO S I FOR ATIO Common Mode Rejection Ratio (CMRR) The LTC1043, when used as a differential to single-ended converter rejects common mode signals and preserves differential voltages (Figure 1). Unlike other techniques, the LTC1043’s CMRR does not degrade with increasing common mode voltage frequency. During the sampling mode, the impedance of Pins 2, 3 (and 11, 12) should be reasonably balanced, otherwise, common mode signals will appear differentially. The value of the CMRR depends on the value of the sampling and holding capacitors (CS, CH) and on the sampling frequency. Since the common mode voltages are not sampled, the common mode signal frequency can well exceed the sampling frequency without experiencing aliasing phenomena. The CMRR of Figure 1 is measured by U 1/2 LTC1043 7 8 C+ 11 VD W UU + + CS C– 12 VD CH 13 VCM 14 + CS, CH ARE MYLAR OR POLYSTRENE LTC1043 • AI01 Figure 1. Differential to Single-Ended Converter 1043fa 5 LTC1043 APPLICATIO S I FOR ATIO shorting Pins 7 and 13 and by observing, with a precision DVM, the change of the voltage across CH with respect to an input CM voltage variation. During the sampling and holding mode, charges are being transferred and minute voltage transients will appear across the holding capacitor. Although the RON on the switches is low enough to allow fast settling, as the sampling frequency increases, the rate of charge transfer increases and the average voltage measured with a DVM across it will increase proportionally; this causes the CMRR of the sampled data system, as seen by a “continuous” instrument (DVM), to decrease (Figure 2). Switch Charge Injection Figure 3 shows one out of the eight switches of the LTC1043, configured as a basic sample-and-hold circuit. When the switch opens, a ‘‘hold step’’ is observed and its magnitude depends on the value of the input voltage. Figure 4 shows charge injected into the hold capacitor. For instance, a 2pCb of charge injected into a 0.01µF capacitor causes a 200µV hold step. As shown in Figure 4, there is a predictable and repeatable charge injection cancellation when the input voltage is close to half the supply voltage of the LTC1043. This is a unique feature of this product, containing charge-balanced switches fabricated with a self-aligning gate CMOS process. Any switch of the LTC1043, when powered with symmetrical dual supplies, will sample-and-hold small signals around ground without any significant error. 140 120 100 CMRR (dB) CS = CH = 1µF CS = 1µF, CZH = 0.1µF 80 60 40 20 100 1k fOSC (Hz) 10k 100k LTC1043 • AI02 Figure 2. CMRR vs Sampling Frequency 6 U Shielding the Sampling Capacitor for Very High CMRR Internal or external parasitic capacitors from the C + pin(s) to ground affect the CMRR of the LTC1043 (Figure 1). The common mode error due to the internal junction capacitances of the C + Pin(s) 2 and 11 is cancelled through internal circuitry. The C + pin, therefore, should be used as the top plate of the sampling capacitor. The interpin capacitance between pin 2 and dummy Pin 1 (11 and 10) appears in parallel with the sampling capacitor so it does not degrade the CMRR. A shield placed underneath the sampling capacitor and connected to either Pin 1 or 3 helps to boost the CMRR in excess of 120dB (Figure 5). Excessive external parasitic capacitance between the C – pins and ground indirectly degrades CMRR; this becomes visible especially when the LTC1043 is used with clock frequencies above 2kHz. Because of this, if a shield is used, the parasitic capacitance between the shield and circuit ground should be minimized. It is recommended that the outer plate of the sampling capacitor be connected to the C – pin(s). Input Pins, SCR Sensitivity An internal 60Ω resistor is connected in series with the input of the switches (Pins 5, 6, 7, 8, 13, 14, 15, 18) and it is included in the RON specification. When the input voltage exceeds the power supply by a diode drop, current will flow into the input pin(s). The LTC1043 will not latch until the input current reaches 2mA–3mA. The device will 5V 2 1/8 LTC1043 VIN 1000pF 6 W UU + 1/2 LTC1013 VOUT – –5V V+ 0V SAMPLE HOLD TO PIN 16 LTC1043 • AI03 Figure 3 1043fa LTC1043 APPLICATIO S I FOR ATIO recover from the latch mode when the input drops 3V to 4V below the voltage value which caused the latch. For instance, if an external resistor of 200Ω is connected in series with an input pin, the input can be taken 1.3V above the supply without latching the IC. The same applies for the C + and C – pins. COSC Pin (16), Figure 6 The Cosc pin can be used with an external capacitor, Cosc, connected from Pin 16 to Pin 17, to modify the internal oscillator frequency. If Pin 16 is floating, the internal 24pF capacitor, plus any external interpin capacitance, set the oscillator frequency around 190kHz with ± 5V supply. The typical performance characteristics curves provide the necessary information to set the oscillator frequency for various power supply ranges. Pin 16 can also be driven 12 10 CHARGE INJECTION (pCb) V+ = 15V V– = 0V 8 6 4 2 0 0 2 4 6 V+ = 10V V– = 0V V+ = 5V V– = 0V 10 8 VIN (V) 12 14 16 LTC1043 • AI04 Figure 4. Individual Switch Charge Injection vs Input Voltage V+ 4 38µF COSC 16 COSC (EXTERNAL) fOSC = 190kHz • Figure 6. Internal Oscillator 1043fa U with an external clock to override the internal oscillator. Although standard 7400 series CMOS gates do not guarantee CMOS levels with the current source and sink requirements of Pin 16, they will in reality drive the Cosc pin. CMOS gates conforming to standard B series output drive have the appropriate voltage levels and more than enough output current to simultaneously drive several LTC1043 COSC pins. The typical trip levels of the Schmitt trigger (Figure 6) are given below. SUPPLY V+ = 5V, V – = 0V V+ = 10V, V – = 0V V+ = 15V, V – = 0V TRIP LEVELS VH = 3.4VVL = 1.35V VH = 6.5VVL = 2.8V VH = 9.5VVL = 4.1V 1 OUTSIDE FOIL CS 2 3 PRINTED CIRCUIT BOARD AREA LTC1043 LTC1043 • AI05 W UU Figure 5. Printed Circuit Board Layout Showing Shielding the Sampling Capacitor TO CLK GENERATOR 24pF 17 V– (24pF) (24pF + COSC) LTC1043 * AI06 7 LTC1043 TYPICAL APPLICATIO S Divide by 2 Multiply by 2 Ultra Precision Voltage Inverter 1/2 LTC1043 1/2 LTC1043 VIN 7 8 VOUT = VIN /2 VOUT 1µ F 11 1µ F 12 1µ F 12 VIN 13 14 13 14 13 14 11 1µ F 1µ F 12 1µ F 7 1/2 LTC1043 8 VIN 11 7 8 VOUT = –VIN 16 0.01µF 17 VOUT = VIN /2 ± 1ppm 0 ≤ VIN ≤ V+ 3 ≤ V+ ≤ 18V LTC1043 • A01 Precision Multiply by 3 VIN LTC1043 7 8 11 1µF 12 13 14 VOUT 6 5 2 1µF 3 1µF 1µF 18 15 16 0.01µF 17 VOUT = 3VIN ±10ppm 0 < VIN < V+/3 3V < V+ < 18V LTC1043 • A04 8 U 16 16 0.01µF VOUT = –VIN ±2ppm V – < VIN < V + V + = +5V, V – = –5V LTC1043 • A02 17 0.01µF 17 VOUT = 2VIN ± 5ppm 0 ≤ VIN ≤ V+ / 2 3 ≤ V+ ≤ 18V LTC1043 * A03 Precision Multiply by 4 LTC1043 7 8 VIN VIN 7 Divide by 3 LTC1043 8 11 1µF 12 11 1µF 12 13 14 VOUT 13 14 2VIN 6 5 VOUT = 4VIN 1µ F 6 5 2 1µF 3 1µF 1µF 2 1µF 3 18 15 VOUT 1µ F 18 15 17 0.01µF 16 16 0.01µF 17 VOUT = 4VIN ±40ppm 0 ≤ VIN ≤ V+/4 3V < V+ < 18V VOUT = VIN /3 ±3ppm 0 ≤ VIN ≤ V+ LTC1043 • A05 LTC1043 • A06 1043fa LTC1043 TYPICAL APPLICATIO S Divide by 4 LTC1043 VIN 7 8 17 5V 1/2 LTC1043 8 7 1µF 11 1µF 12 14 13 14 4 GAIN 2.5k 5V 12 16 0.01µF 6 5 2 1µF 3 1µF 18 15 Q1 2N2907A 16 0.01µF 17 –5V 0 ≤ VIN ≤ V+ VOUT = VIN /4 ±5ppm LTC1043 • A07 YINPUT 7.5k* 2 1µ F 3 2N2907A (FOR START-UP) 1µ F –5V U – + 22k 0.005% V/F Converter –5V 1k LT1009 2.5k 1µF 11 13 fOUT: 0kHz TO 30kHz VOUT VIN 0V TO 3V 6.19k – 1µF LF356 + –5V 22k 30pF 330k 1µF LTC1043 • A08 0.01% Analog Multiplier 1/4 LTC1043 14 13 LT1004-1.2V 12 5V 7 LT1056 4 –5V XINPUT 30pF 6 6 16 1/4 LTC1043 5 2 5V 7 LT1056 330k † 1k –5V 1µ F 20k OUTPUT TRIM 0.01µF 0.001µF † 80.6k* – + 6 3 OPERATE LTC1043 FROM ± 5V POLYSTYRENE, MOUNT CLOSE *1% FILM RESISTOR ADJUST OUTPUT TRIM SO X • Y = OUTPUT ± 0.01% 2 0.001µF † OUTPUT XY ±0.01% 4 –5V LTC1043 • A09 1043fa 9 LTC1043 TYPICAL APPLICATIO S Single 5V Supply, Ultra Precision Instrumentation Amplifier 5V + LTC1043 7 8 11 INPUT 12 1µF 1µF – 43k 100Ω 13 14 V+ = 5V 6 5 0.22µF 10k 2 1N914 3 1µF 1µF NONPOLARIZED 18 15 ≈ – 0.5V 16 17 4 5V INPUT AND OUTPUT VOLTAGE RANGE INCLUDES GROUND. INPUT REFERRED OFFSET ERRORS ARE TYPICALLY 3µV WITH 1µV OF NOISE CMRR ~ 120dB LTC1043 • A10 0.0047 5V 4 1/2 LTC1043 + INPUT 6 5 7 11 2 1µF 3 100Ω – INPUT 18 15 0.01 R2 100k R1 100Ω 1µF 8 CHOPPER 1/4 LTC1043 1µF 3 AC AMPLIFIER 5V PHASE SENSITIVE DEMODULATOR 1µF 6 13 12 4 –5V 100k 100k 14 3 1/4 LTC1043 100k 2 DC OUTPUT AMPLIFIER 1µF 16 0.01µF 17 10 U Voltage Controlled Current Source with Ground Referred Input and Output 5V 8 1 3 + – 4 7 LTC1052 6 8 1 0.1µF 0.1µF OUTPUT AV = 1000 INPUT 0V TO 2V 3 + – 1/2 LT1013 2 4 2 0.68µF 99.9k 1k 5V 4 8 7 11 1µF 12 1µF 100Ω 14 1/2 LTC1043 17 13 1OUT = 16 VIN 100Ω 0.001µF OPERATES FROM A SINGLE 5V SUPPLY LTC1043 • A11 Precision Instrumentation Amplifier + – 7 LT1056 1M 2 – + 5V 7 LT1056 4 –5V 6 OUTPUT –5V OFFSET = 10µV DRIFT = 0.1µV/°C FULL DIFFERENTIAL INPUT CMRR = 140dB OPEN LOOP GAIN > 10 8 GAIN = R2/R1 + 1 IBIAS = 1nA LTC1043 • A12 1043fa LTC1043 TYPICAL APPLICATIO S Lock-In Amplifier (= Extremely Narrow-Band Amplifier) THERMISTOR BRIDGE IS THE SIGNAL SOURCE 10k* T1 500Hz SINE DRIVE 4 1 6.19k 6.19k 3 3 6.19k 2 5V 2 5V SYNCHRONOUS DEMODULATOR 10k* RT PHASE TRIM 0.002 2 5V 5V 8 LT1011 3 7 4 1 –5V ZERO CROSSING DETECTOR 1k 50k 10k 5V 30k* 30k* 6 10k 1µF 3 0.01µF 10k 18 300mV 10VRMS INPUT N T2 1A GRN T1B T2B GRN RED RED T2A 1µ F 17 BRN *1% RESISTOR U + LT1007 6 13 – LM301A 1/4 LTC1043 12 100k 3 5V 8 2 1M 3 – –5V + –5V 1 – LT1012 6 VOUT = 1000 • DC BRIDGE SIGNAL 14 100Ω 16 30pF + 4 –5V 1µF + 0.01µF 47µF T1 = TF5SX17ZZ, TOROTEL RT = YSI THERMISTOR 44006 ≈ 6.19k AT 37.5°C *MATCH 0.05% 6.19k = VISHAY S-102 OPERATE LTC1043 WITH ± 5V SUPPLIES LOCK-IN AMPLIFIER TECHNIQUE USED TO EXTRACT VERY SMALL SIGNALS BURIED INTO NOISE LTC1043 • A013 + – 50MHz Termal RMS/DC Converter 5V 4 1/2 LTC1043 5 3 5V + – 8 LT1013 1 CALIBRATION ADJUST 20k 5 100k* 5V + LT1013 7 DC OUTPUT 0V TO 3.5V 10k 2 1µF 16 1µF 2 4 6 – 301Ω* 15 0.01µF 10k 10k 2% ACCURACY DC 50MHZ 100:1 CREST FACTOR CAPABILITY T1 TO T2 = YELLOW SPRINGS INST. CO. THERMISTOR COMPOSITE ENCLOSE T1 AND T2 IN STYROFOAM LTC1043 • A14 1043fa 11 LTC1043 TYPICAL APPLICATIO S Quad Single 5V Supply, Low Hold Step, Sample-and-Hold 5V 2 – + NC 7 8 3 11 VIN CL 0.01µF 6 – 1/4 LT1014 7 OUTPUT NC 18 15 NC 13 14 5 + 12 VIN CL 0.01µF HOLD LTC1043 • A15 Single Supply Precision Linearized Platinum RTD Signal Conditioner 250k* 5V 3 10k* (LINEARITY CORRECTION LOOP) + – 8 1 2.74k* 50k ZERO ADJUST 8.25k* 1/2 LT1013 2 4 0.1µF 2k 1/2 LTC1043 7 8 11 1µF 12 1µ F 887Ω 13 16 Rp = ROSEMOUNT 118MFRTD * 1% FILM RESISTOR TRIM SEQUENCE: SET SENSOR TO 0°C VALUE. ADJUST ZERO FOR 0V OUT SET SENSOR TO 100°C VALUE. ADJUST GAIN FOR 1,000V OUT SET SENSOR TO 400°C VALUE. ADJUST LINEARITY FOR 4,000V OUT REPEAT AS REQUIRED 12 U 14 4 1 OUTPUT NC 6 5 13 – 1/4 LT1014 14 OUTPUT 1/4 LT1014 11 12 + 2 VIN CL 0.01µF 9 – 1/4 LT1014 8 OUTPUT 10 + 3 VIN 16 17 4 – 5V CL 0.01µF SAMPLE FOR 1V ≤ VIN ≤ 4V, THE HOLD STEP IS ≤ 300µV ACQUISITION TIME ~ 8 • RON CH FOR 10-BIT ACCURACY LTC1043 • A16 2.4k 5V LT1009 2.5V 4 1/2 LTC1043 5 6 5 + 1/2 LT1013 0V TO 4V = 0°C TO 400°C ± 0.05°C 7 5k 6 2 1µ F 3 1µF – 1k GAIN ADJUST 8.06k* 1mA Rp 100Ω AT 0°C 15 18 1k* 17 0.01µF LTC1043 • A17 1043fa LTC1043 TYPICAL APPLICATIO S 0.005% F/V Converter 75k* 10k GAIN TRIM 1µF 1k –5V LT1004-1.2C 1µ F 13 FREQUENCY IN 0kHz TO 30kHz R1 10k R2 10k 10k RIN VIN 5V – LT1056 7 + –5V CLOCK INPUT 16 12 5V 13 RQ = 10k 14 11 200pF 1000pF BANDPASS OUTPUT 5V 4 1/2 LTC1043 LT1056 5 6 fCLK • BANDPASS CENTER FREQUENCY fO = 31.4 BANDPASS GAIN AT fO IS: RQ /RIN RQ R2 Q= R2 R1 fO MAX ≤ 100kHz QMAX AT 100kHz fO IS ≤10 (fO • Q) MAX ≤ 1MHz fCLK MAX ≤ 3MHz, Q < 2 U 1/4 LTC1043 14 5V – LF356 0V TO 3V OUTPUT 12 1000pF 4 16 17 5V + –5V *75k = TRW # MTR-5/120ppm –5V LTC1043 • A18 High Frequency Clock Tunable Bandpass Filter 1/2 LTC1043 8 – + –5V 2 200pF 3 1000pF R2 R1 15 17 –5V 18 5V – LT1056 + – 5V LTC1043 • A19 1043fa 13 LTC1043 TYPICAL APPLICATIO S Frequency-Controlled Gain Amplifier GAIN CONTROL 0kHz TO 10kHz = GAIN 0 TO 1000 FOR DIFFERENTIAL INPUT, GROUND PIN 8A AND USE PINS 13A AND 7A FOR INPUTS fIN • 0.01µF GAIN = ; GAIN IS NEGATIVE AS SHOWN 1kHz • 100pF FOR SINGLE-ENDED INPUT AND POSITIVE GAIN, GROUND PIN 8A AND USE PIN 7A FOR INPUT USE ± 5V SUPPLIES FOR LTC1043 –5V 11 470k 1k* 500 90% RH TRIM 1/4 LTC1043 13 14 2 5V 100pF 17 1µF LT1004 1.2V SENSOR * = 1% FILM RESISTOR SENSOR = PANAMETRICS # RHS ≈ 500pF AT RH = 76% 1.7 pF/%RH LTC1043 • A21 14 U 12 13A 1/2 LTC1043A 14A 13B 1/2 LTC1043B 14B 16A 12A 0.01µF 11A 16B 12B 100pF 11B 7A 8A 7B 8B VIN 5V 2 0.01µF 6 – + 7 LT1056 VOUT 3 4 –5V LTC1043 • A20 Relative Humidity Sensor Signal Conditioner 0.01µF 1/4 LTC1043 8 7 16 – + 7 LT1056 6 10k 3 + LM301A 6 8 1 OUTPUT 0V TO 1V = 0% TO 100% 3 4 –5V 2 1µF – 22M 100pF 10k 5% RH TRIM 9k* 33k 1k* 1043fa LTC1043 TYPICAL APPLICATIO S Linear Variable Differential Transformer (LVDT), Signal Conditioner 0.005µF 30k 30k 3 + – 2 AMPLITUDE STABLE SINE WAVE SOURCE 4.7k Q1 2N4338 1.2k LVDT = SCHAEVITZ E-100 SHUNT CAN BE IN POSITIVE OR NEGATIVE SUPPLY LEAD Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. U + 1/4 LTC1043 0.005µF 5V 8 LT1013 4 – 5V BLUE GRN 10k 1N914 LT1004 1.2V YEL-RED BLK LVDT 10µF 7.5k 12 17 13 1/4 LTC1043 14 –5V 10k GAIN TRIM 1µF 6 1 1.5kHz YEL-BLK 100k 5 5V 7 4 11 RD-BLUE 8 + 1/2 LT1013 7 – OUTPUT 0V ±2.5V 0M 2.50M 200k 5V 100k 0.01µF 3 100k PHASE TRIM 5V 1k 7 1 TO PIN 16, LTC1043 + – 4 8 LT1011 2 –5V LTC1043 • A22 Precision Current Sensing in Supply Rails IIN RSHUNT 1/2 LTC1043 7 8 VOUT 11 + 1µF 12 1µF 13 14 16 0.01µF 17 LTC1043 • A23 1043fa 15 LTC1043 PACKAGE DESCRIPTIO .020 – .060 (0.508 – 1.524) .008 – .015 (0.203 – 0.381) .300 (7.620) REF .125 (3.175) MIN .100 (2.54) BSC .054 (1.372) TYP .900* (22.860) MAX 18 17 16 15 14 13 12 11 10 .255 ± .015* (6.477 ± 0.381) 1 2 3 4 5 6 7 .030 ±.005 TYP N .420 MIN 1 2 3 RECOMMENDED SOLDER PAD LAYOUT .291 – .299 (7.391 – 7.595) NOTE 4 .010 – .029 × 45° (0.254 – 0.737) 0° – 8° TYP .005 (0.127) RAD MIN .009 – .013 (0.229 – 0.330) NOTE 3 .016 – .050 (0.406 – 1.270) 16 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● U D Package 18-Lead Side Brazed (Hermetic) (Reference LTC DWG # 05-08-1210) .485 (12.319) MAX .165 (4.191) MAX .005 (0.127) MIN .910 (23.114) MAX 18 17 16 15 14 13 12 11 10 .290 (7.366) TYP PIN NO. 1 IDENT 1 2 3 4 5 6 7 8 9 D18 0801 .015 – .023 (0.381 – 0.584) OBSOLETE PACKAGE N Package 18-Lead PDIP (Narrow .300 Inch) (Reference LTC DWG # 05-08-1510) .300 – .325 (7.620 – 8.255) .130 ± .005 (3.302 ± 0.127) .020 (0.508) MIN .008 – .015 (0.203 – 0.381) +.035 .325 –.015 8 9 .120 (3.048) MIN .045 – .065 (1.143 – 1.651) .065 (1.651) TYP .005 (0.127) MIN .018 ± .003 (0.457 ± 0.076) ( 8.255 +0.889 –0.381 ) .100 (2.54) BSC INCHES MILLIMETERS *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm) NOTE: 1. DIMENSIONS ARE N18 1002 SW Package 18-Lead Plastic Small Outline (Wide .300 Inch) (Reference LTC DWG # 05-08-1620) .050 BSC .045 ±.005 .447 – .463 (11.354 – 11.760) NOTE 4 18 17 16 15 14 13 12 11 10 N .325 ±.005 NOTE 3 .394 – .419 (10.007 – 10.643) NOTE: 1. DIMENSIONS IN N/2 N/2 1 .093 – .104 (2.362 – 2.642) 2 3 4 5 6 7 8 9 .037 – .045 (0.940 – 1.143) INCHES (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS. THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS 4. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) .050 (1.270) BSC .004 – .012 (0.102 – 0.305) S18 (WIDE) 0502 .014 – .019 (0.356 – 0.482) TYP 1043fa LW/TP 1202 1K REV A • PRINTED IN USA www.linear.com  LINEAR TECHNOLOGY CORPORATION 1985